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00027 #include "libavutil/cpu.h"
00028 #include "libavutil/mem.h"
00029 #include "libavutil/x86/asm.h"
00030 #include "libavutil/x86/cpu.h"
00031 #include "libavcodec/dsputil.h"
00032 #include "dsputil_mmx.h"
00033 #include "libavcodec/vc1dsp.h"
00034 #include "vc1dsp.h"
00035
00036 #if HAVE_INLINE_ASM
00037
00038 #define OP_PUT(S,D)
00039 #define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t"
00040
00042 #define NORMALIZE_MMX(SHIFT) \
00043 "paddw %%mm7, %%mm3 \n\t" \
00044 "paddw %%mm7, %%mm4 \n\t" \
00045 "psraw "SHIFT", %%mm3 \n\t" \
00046 "psraw "SHIFT", %%mm4 \n\t"
00047
00048 #define TRANSFER_DO_PACK(OP) \
00049 "packuswb %%mm4, %%mm3 \n\t" \
00050 OP((%2), %%mm3) \
00051 "movq %%mm3, (%2) \n\t"
00052
00053 #define TRANSFER_DONT_PACK(OP) \
00054 OP(0(%2), %%mm3) \
00055 OP(8(%2), %%mm4) \
00056 "movq %%mm3, 0(%2) \n\t" \
00057 "movq %%mm4, 8(%2) \n\t"
00058
00060 #define DO_UNPACK(reg) "punpcklbw %%mm0, " reg "\n\t"
00061 #define DONT_UNPACK(reg)
00062
00064 #define LOAD_ROUNDER_MMX(ROUND) \
00065 "movd "ROUND", %%mm7 \n\t" \
00066 "punpcklwd %%mm7, %%mm7 \n\t" \
00067 "punpckldq %%mm7, %%mm7 \n\t"
00068
00069 #define SHIFT2_LINE(OFF, R0,R1,R2,R3) \
00070 "paddw %%mm"#R2", %%mm"#R1" \n\t" \
00071 "movd (%0,%3), %%mm"#R0" \n\t" \
00072 "pmullw %%mm6, %%mm"#R1" \n\t" \
00073 "punpcklbw %%mm0, %%mm"#R0" \n\t" \
00074 "movd (%0,%2), %%mm"#R3" \n\t" \
00075 "psubw %%mm"#R0", %%mm"#R1" \n\t" \
00076 "punpcklbw %%mm0, %%mm"#R3" \n\t" \
00077 "paddw %%mm7, %%mm"#R1" \n\t" \
00078 "psubw %%mm"#R3", %%mm"#R1" \n\t" \
00079 "psraw %4, %%mm"#R1" \n\t" \
00080 "movq %%mm"#R1", "#OFF"(%1) \n\t" \
00081 "add %2, %0 \n\t"
00082
00084 static void vc1_put_ver_16b_shift2_mmx(int16_t *dst,
00085 const uint8_t *src, x86_reg stride,
00086 int rnd, int64_t shift)
00087 {
00088 __asm__ volatile(
00089 "mov $3, %%"REG_c" \n\t"
00090 LOAD_ROUNDER_MMX("%5")
00091 "movq "MANGLE(ff_pw_9)", %%mm6 \n\t"
00092 "1: \n\t"
00093 "movd (%0), %%mm2 \n\t"
00094 "add %2, %0 \n\t"
00095 "movd (%0), %%mm3 \n\t"
00096 "punpcklbw %%mm0, %%mm2 \n\t"
00097 "punpcklbw %%mm0, %%mm3 \n\t"
00098 SHIFT2_LINE( 0, 1, 2, 3, 4)
00099 SHIFT2_LINE( 24, 2, 3, 4, 1)
00100 SHIFT2_LINE( 48, 3, 4, 1, 2)
00101 SHIFT2_LINE( 72, 4, 1, 2, 3)
00102 SHIFT2_LINE( 96, 1, 2, 3, 4)
00103 SHIFT2_LINE(120, 2, 3, 4, 1)
00104 SHIFT2_LINE(144, 3, 4, 1, 2)
00105 SHIFT2_LINE(168, 4, 1, 2, 3)
00106 "sub %6, %0 \n\t"
00107 "add $8, %1 \n\t"
00108 "dec %%"REG_c" \n\t"
00109 "jnz 1b \n\t"
00110 : "+r"(src), "+r"(dst)
00111 : "r"(stride), "r"(-2*stride),
00112 "m"(shift), "m"(rnd), "r"(9*stride-4)
00113 : "%"REG_c, "memory"
00114 );
00115 }
00116
00121 #define VC1_HOR_16b_SHIFT2(OP, OPNAME)\
00122 static void OPNAME ## vc1_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,\
00123 const int16_t *src, int rnd)\
00124 {\
00125 int h = 8;\
00126 \
00127 src -= 1;\
00128 rnd -= (-1+9+9-1)*1024; \
00129 __asm__ volatile(\
00130 LOAD_ROUNDER_MMX("%4")\
00131 "movq "MANGLE(ff_pw_128)", %%mm6\n\t"\
00132 "movq "MANGLE(ff_pw_9)", %%mm5 \n\t"\
00133 "1: \n\t"\
00134 "movq 2*0+0(%1), %%mm1 \n\t"\
00135 "movq 2*0+8(%1), %%mm2 \n\t"\
00136 "movq 2*1+0(%1), %%mm3 \n\t"\
00137 "movq 2*1+8(%1), %%mm4 \n\t"\
00138 "paddw 2*3+0(%1), %%mm1 \n\t"\
00139 "paddw 2*3+8(%1), %%mm2 \n\t"\
00140 "paddw 2*2+0(%1), %%mm3 \n\t"\
00141 "paddw 2*2+8(%1), %%mm4 \n\t"\
00142 "pmullw %%mm5, %%mm3 \n\t"\
00143 "pmullw %%mm5, %%mm4 \n\t"\
00144 "psubw %%mm1, %%mm3 \n\t"\
00145 "psubw %%mm2, %%mm4 \n\t"\
00146 NORMALIZE_MMX("$7")\
00147 \
00148 "paddw %%mm6, %%mm3 \n\t"\
00149 "paddw %%mm6, %%mm4 \n\t"\
00150 TRANSFER_DO_PACK(OP)\
00151 "add $24, %1 \n\t"\
00152 "add %3, %2 \n\t"\
00153 "decl %0 \n\t"\
00154 "jnz 1b \n\t"\
00155 : "+r"(h), "+r" (src), "+r" (dst)\
00156 : "r"(stride), "m"(rnd)\
00157 : "memory"\
00158 );\
00159 }
00160
00161 VC1_HOR_16b_SHIFT2(OP_PUT, put_)
00162 VC1_HOR_16b_SHIFT2(OP_AVG, avg_)
00163
00164
00169 #define VC1_SHIFT2(OP, OPNAME)\
00170 static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\
00171 x86_reg stride, int rnd, x86_reg offset)\
00172 {\
00173 rnd = 8-rnd;\
00174 __asm__ volatile(\
00175 "mov $8, %%"REG_c" \n\t"\
00176 LOAD_ROUNDER_MMX("%5")\
00177 "movq "MANGLE(ff_pw_9)", %%mm6\n\t"\
00178 "1: \n\t"\
00179 "movd 0(%0 ), %%mm3 \n\t"\
00180 "movd 4(%0 ), %%mm4 \n\t"\
00181 "movd 0(%0,%2), %%mm1 \n\t"\
00182 "movd 4(%0,%2), %%mm2 \n\t"\
00183 "add %2, %0 \n\t"\
00184 "punpcklbw %%mm0, %%mm3 \n\t"\
00185 "punpcklbw %%mm0, %%mm4 \n\t"\
00186 "punpcklbw %%mm0, %%mm1 \n\t"\
00187 "punpcklbw %%mm0, %%mm2 \n\t"\
00188 "paddw %%mm1, %%mm3 \n\t"\
00189 "paddw %%mm2, %%mm4 \n\t"\
00190 "movd 0(%0,%3), %%mm1 \n\t"\
00191 "movd 4(%0,%3), %%mm2 \n\t"\
00192 "pmullw %%mm6, %%mm3 \n\t" \
00193 "pmullw %%mm6, %%mm4 \n\t" \
00194 "punpcklbw %%mm0, %%mm1 \n\t"\
00195 "punpcklbw %%mm0, %%mm2 \n\t"\
00196 "psubw %%mm1, %%mm3 \n\t" \
00197 "psubw %%mm2, %%mm4 \n\t" \
00198 "movd 0(%0,%2), %%mm1 \n\t"\
00199 "movd 4(%0,%2), %%mm2 \n\t"\
00200 "punpcklbw %%mm0, %%mm1 \n\t"\
00201 "punpcklbw %%mm0, %%mm2 \n\t"\
00202 "psubw %%mm1, %%mm3 \n\t" \
00203 "psubw %%mm2, %%mm4 \n\t" \
00204 NORMALIZE_MMX("$4")\
00205 "packuswb %%mm4, %%mm3 \n\t"\
00206 OP((%1), %%mm3)\
00207 "movq %%mm3, (%1) \n\t"\
00208 "add %6, %0 \n\t"\
00209 "add %4, %1 \n\t"\
00210 "dec %%"REG_c" \n\t"\
00211 "jnz 1b \n\t"\
00212 : "+r"(src), "+r"(dst)\
00213 : "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\
00214 "g"(stride-offset)\
00215 : "%"REG_c, "memory"\
00216 );\
00217 }
00218
00219 VC1_SHIFT2(OP_PUT, put_)
00220 VC1_SHIFT2(OP_AVG, avg_)
00221
00232 #define MSPEL_FILTER13_CORE(UNPACK, MOVQ, A1, A2, A3, A4) \
00233 MOVQ "*0+"A1", %%mm1 \n\t" \
00234 MOVQ "*4+"A1", %%mm2 \n\t" \
00235 UNPACK("%%mm1") \
00236 UNPACK("%%mm2") \
00237 "pmullw "MANGLE(ff_pw_3)", %%mm1\n\t" \
00238 "pmullw "MANGLE(ff_pw_3)", %%mm2\n\t" \
00239 MOVQ "*0+"A2", %%mm3 \n\t" \
00240 MOVQ "*4+"A2", %%mm4 \n\t" \
00241 UNPACK("%%mm3") \
00242 UNPACK("%%mm4") \
00243 "pmullw %%mm6, %%mm3 \n\t" \
00244 "pmullw %%mm6, %%mm4 \n\t" \
00245 "psubw %%mm1, %%mm3 \n\t" \
00246 "psubw %%mm2, %%mm4 \n\t" \
00247 MOVQ "*0+"A4", %%mm1 \n\t" \
00248 MOVQ "*4+"A4", %%mm2 \n\t" \
00249 UNPACK("%%mm1") \
00250 UNPACK("%%mm2") \
00251 "psllw $2, %%mm1 \n\t" \
00252 "psllw $2, %%mm2 \n\t" \
00253 "psubw %%mm1, %%mm3 \n\t" \
00254 "psubw %%mm2, %%mm4 \n\t" \
00255 MOVQ "*0+"A3", %%mm1 \n\t" \
00256 MOVQ "*4+"A3", %%mm2 \n\t" \
00257 UNPACK("%%mm1") \
00258 UNPACK("%%mm2") \
00259 "pmullw %%mm5, %%mm1 \n\t" \
00260 "pmullw %%mm5, %%mm2 \n\t" \
00261 "paddw %%mm1, %%mm3 \n\t" \
00262 "paddw %%mm2, %%mm4 \n\t"
00263
00272 #define MSPEL_FILTER13_VER_16B(NAME, A1, A2, A3, A4) \
00273 static void \
00274 vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src, \
00275 x86_reg src_stride, \
00276 int rnd, int64_t shift) \
00277 { \
00278 int h = 8; \
00279 src -= src_stride; \
00280 __asm__ volatile( \
00281 LOAD_ROUNDER_MMX("%5") \
00282 "movq "MANGLE(ff_pw_53)", %%mm5\n\t" \
00283 "movq "MANGLE(ff_pw_18)", %%mm6\n\t" \
00284 ".p2align 3 \n\t" \
00285 "1: \n\t" \
00286 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00287 NORMALIZE_MMX("%6") \
00288 TRANSFER_DONT_PACK(OP_PUT) \
00289 \
00290 "movd 8+"A1", %%mm1 \n\t" \
00291 DO_UNPACK("%%mm1") \
00292 "movq %%mm1, %%mm3 \n\t" \
00293 "paddw %%mm1, %%mm1 \n\t" \
00294 "paddw %%mm3, %%mm1 \n\t" \
00295 "movd 8+"A2", %%mm3 \n\t" \
00296 DO_UNPACK("%%mm3") \
00297 "pmullw %%mm6, %%mm3 \n\t" \
00298 "psubw %%mm1, %%mm3 \n\t" \
00299 "movd 8+"A3", %%mm1 \n\t" \
00300 DO_UNPACK("%%mm1") \
00301 "pmullw %%mm5, %%mm1 \n\t" \
00302 "paddw %%mm1, %%mm3 \n\t" \
00303 "movd 8+"A4", %%mm1 \n\t" \
00304 DO_UNPACK("%%mm1") \
00305 "psllw $2, %%mm1 \n\t" \
00306 "psubw %%mm1, %%mm3 \n\t" \
00307 "paddw %%mm7, %%mm3 \n\t" \
00308 "psraw %6, %%mm3 \n\t" \
00309 "movq %%mm3, 16(%2) \n\t" \
00310 "add %3, %1 \n\t" \
00311 "add $24, %2 \n\t" \
00312 "decl %0 \n\t" \
00313 "jnz 1b \n\t" \
00314 : "+r"(h), "+r" (src), "+r" (dst) \
00315 : "r"(src_stride), "r"(3*src_stride), \
00316 "m"(rnd), "m"(shift) \
00317 : "memory" \
00318 ); \
00319 }
00320
00328 #define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00329 static void \
00330 OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \
00331 const int16_t *src, int rnd) \
00332 { \
00333 int h = 8; \
00334 src -= 1; \
00335 rnd -= (-4+58+13-3)*256; \
00336 __asm__ volatile( \
00337 LOAD_ROUNDER_MMX("%4") \
00338 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00339 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00340 ".p2align 3 \n\t" \
00341 "1: \n\t" \
00342 MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4) \
00343 NORMALIZE_MMX("$7") \
00344 \
00345 "paddw "MANGLE(ff_pw_128)", %%mm3 \n\t" \
00346 "paddw "MANGLE(ff_pw_128)", %%mm4 \n\t" \
00347 TRANSFER_DO_PACK(OP) \
00348 "add $24, %1 \n\t" \
00349 "add %3, %2 \n\t" \
00350 "decl %0 \n\t" \
00351 "jnz 1b \n\t" \
00352 : "+r"(h), "+r" (src), "+r" (dst) \
00353 : "r"(stride), "m"(rnd) \
00354 : "memory" \
00355 ); \
00356 }
00357
00366 #define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00367 static void \
00368 OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \
00369 x86_reg stride, int rnd, x86_reg offset) \
00370 { \
00371 int h = 8; \
00372 src -= offset; \
00373 rnd = 32-rnd; \
00374 __asm__ volatile ( \
00375 LOAD_ROUNDER_MMX("%6") \
00376 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00377 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00378 ".p2align 3 \n\t" \
00379 "1: \n\t" \
00380 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00381 NORMALIZE_MMX("$6") \
00382 TRANSFER_DO_PACK(OP) \
00383 "add %5, %1 \n\t" \
00384 "add %5, %2 \n\t" \
00385 "decl %0 \n\t" \
00386 "jnz 1b \n\t" \
00387 : "+r"(h), "+r" (src), "+r" (dst) \
00388 : "r"(offset), "r"(3*offset), "g"(stride), "m"(rnd) \
00389 : "memory" \
00390 ); \
00391 }
00392
00394 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_PUT, put_)
00395 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_AVG, avg_)
00396 MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )")
00397 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_)
00398 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_)
00399
00401 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_PUT, put_)
00402 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_AVG, avg_)
00403 MSPEL_FILTER13_VER_16B(shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )")
00404 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_)
00405 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_)
00406
00407 typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift);
00408 typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd);
00409 typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_reg stride, int rnd, x86_reg offset);
00410
00422 #define VC1_MSPEL_MC(OP)\
00423 static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\
00424 int hmode, int vmode, int rnd)\
00425 {\
00426 static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\
00427 { NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\
00428 static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\
00429 { NULL, OP ## vc1_hor_16b_shift1_mmx, OP ## vc1_hor_16b_shift2_mmx, OP ## vc1_hor_16b_shift3_mmx };\
00430 static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\
00431 { NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\
00432 \
00433 __asm__ volatile(\
00434 "pxor %%mm0, %%mm0 \n\t"\
00435 ::: "memory"\
00436 );\
00437 \
00438 if (vmode) { \
00439 if (hmode) { \
00440 static const int shift_value[] = { 0, 5, 1, 5 };\
00441 int shift = (shift_value[hmode]+shift_value[vmode])>>1;\
00442 int r;\
00443 DECLARE_ALIGNED(16, int16_t, tmp)[12*8];\
00444 \
00445 r = (1<<(shift-1)) + rnd-1;\
00446 vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\
00447 \
00448 vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\
00449 return;\
00450 }\
00451 else { \
00452 vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\
00453 return;\
00454 }\
00455 }\
00456 \
00457 \
00458 vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\
00459 }
00460
00461 VC1_MSPEL_MC(put_)
00462 VC1_MSPEL_MC(avg_)
00463
00465 #define DECLARE_FUNCTION(a, b) \
00466 static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00467 put_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00468 }\
00469 static void avg_vc1_mspel_mc ## a ## b ## _mmxext(uint8_t *dst, \
00470 const uint8_t *src, \
00471 int stride, int rnd) \
00472 { \
00473 avg_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00474 }
00475
00476 DECLARE_FUNCTION(0, 1)
00477 DECLARE_FUNCTION(0, 2)
00478 DECLARE_FUNCTION(0, 3)
00479
00480 DECLARE_FUNCTION(1, 0)
00481 DECLARE_FUNCTION(1, 1)
00482 DECLARE_FUNCTION(1, 2)
00483 DECLARE_FUNCTION(1, 3)
00484
00485 DECLARE_FUNCTION(2, 0)
00486 DECLARE_FUNCTION(2, 1)
00487 DECLARE_FUNCTION(2, 2)
00488 DECLARE_FUNCTION(2, 3)
00489
00490 DECLARE_FUNCTION(3, 0)
00491 DECLARE_FUNCTION(3, 1)
00492 DECLARE_FUNCTION(3, 2)
00493 DECLARE_FUNCTION(3, 3)
00494
00495 static void vc1_inv_trans_4x4_dc_mmxext(uint8_t *dest, int linesize,
00496 DCTELEM *block)
00497 {
00498 int dc = block[0];
00499 dc = (17 * dc + 4) >> 3;
00500 dc = (17 * dc + 64) >> 7;
00501 __asm__ volatile(
00502 "movd %0, %%mm0 \n\t"
00503 "pshufw $0, %%mm0, %%mm0 \n\t"
00504 "pxor %%mm1, %%mm1 \n\t"
00505 "psubw %%mm0, %%mm1 \n\t"
00506 "packuswb %%mm0, %%mm0 \n\t"
00507 "packuswb %%mm1, %%mm1 \n\t"
00508 ::"r"(dc)
00509 );
00510 __asm__ volatile(
00511 "movd %0, %%mm2 \n\t"
00512 "movd %1, %%mm3 \n\t"
00513 "movd %2, %%mm4 \n\t"
00514 "movd %3, %%mm5 \n\t"
00515 "paddusb %%mm0, %%mm2 \n\t"
00516 "paddusb %%mm0, %%mm3 \n\t"
00517 "paddusb %%mm0, %%mm4 \n\t"
00518 "paddusb %%mm0, %%mm5 \n\t"
00519 "psubusb %%mm1, %%mm2 \n\t"
00520 "psubusb %%mm1, %%mm3 \n\t"
00521 "psubusb %%mm1, %%mm4 \n\t"
00522 "psubusb %%mm1, %%mm5 \n\t"
00523 "movd %%mm2, %0 \n\t"
00524 "movd %%mm3, %1 \n\t"
00525 "movd %%mm4, %2 \n\t"
00526 "movd %%mm5, %3 \n\t"
00527 :"+m"(*(uint32_t*)(dest+0*linesize)),
00528 "+m"(*(uint32_t*)(dest+1*linesize)),
00529 "+m"(*(uint32_t*)(dest+2*linesize)),
00530 "+m"(*(uint32_t*)(dest+3*linesize))
00531 );
00532 }
00533
00534 static void vc1_inv_trans_4x8_dc_mmxext(uint8_t *dest, int linesize,
00535 DCTELEM *block)
00536 {
00537 int dc = block[0];
00538 dc = (17 * dc + 4) >> 3;
00539 dc = (12 * dc + 64) >> 7;
00540 __asm__ volatile(
00541 "movd %0, %%mm0 \n\t"
00542 "pshufw $0, %%mm0, %%mm0 \n\t"
00543 "pxor %%mm1, %%mm1 \n\t"
00544 "psubw %%mm0, %%mm1 \n\t"
00545 "packuswb %%mm0, %%mm0 \n\t"
00546 "packuswb %%mm1, %%mm1 \n\t"
00547 ::"r"(dc)
00548 );
00549 __asm__ volatile(
00550 "movd %0, %%mm2 \n\t"
00551 "movd %1, %%mm3 \n\t"
00552 "movd %2, %%mm4 \n\t"
00553 "movd %3, %%mm5 \n\t"
00554 "paddusb %%mm0, %%mm2 \n\t"
00555 "paddusb %%mm0, %%mm3 \n\t"
00556 "paddusb %%mm0, %%mm4 \n\t"
00557 "paddusb %%mm0, %%mm5 \n\t"
00558 "psubusb %%mm1, %%mm2 \n\t"
00559 "psubusb %%mm1, %%mm3 \n\t"
00560 "psubusb %%mm1, %%mm4 \n\t"
00561 "psubusb %%mm1, %%mm5 \n\t"
00562 "movd %%mm2, %0 \n\t"
00563 "movd %%mm3, %1 \n\t"
00564 "movd %%mm4, %2 \n\t"
00565 "movd %%mm5, %3 \n\t"
00566 :"+m"(*(uint32_t*)(dest+0*linesize)),
00567 "+m"(*(uint32_t*)(dest+1*linesize)),
00568 "+m"(*(uint32_t*)(dest+2*linesize)),
00569 "+m"(*(uint32_t*)(dest+3*linesize))
00570 );
00571 dest += 4*linesize;
00572 __asm__ volatile(
00573 "movd %0, %%mm2 \n\t"
00574 "movd %1, %%mm3 \n\t"
00575 "movd %2, %%mm4 \n\t"
00576 "movd %3, %%mm5 \n\t"
00577 "paddusb %%mm0, %%mm2 \n\t"
00578 "paddusb %%mm0, %%mm3 \n\t"
00579 "paddusb %%mm0, %%mm4 \n\t"
00580 "paddusb %%mm0, %%mm5 \n\t"
00581 "psubusb %%mm1, %%mm2 \n\t"
00582 "psubusb %%mm1, %%mm3 \n\t"
00583 "psubusb %%mm1, %%mm4 \n\t"
00584 "psubusb %%mm1, %%mm5 \n\t"
00585 "movd %%mm2, %0 \n\t"
00586 "movd %%mm3, %1 \n\t"
00587 "movd %%mm4, %2 \n\t"
00588 "movd %%mm5, %3 \n\t"
00589 :"+m"(*(uint32_t*)(dest+0*linesize)),
00590 "+m"(*(uint32_t*)(dest+1*linesize)),
00591 "+m"(*(uint32_t*)(dest+2*linesize)),
00592 "+m"(*(uint32_t*)(dest+3*linesize))
00593 );
00594 }
00595
00596 static void vc1_inv_trans_8x4_dc_mmxext(uint8_t *dest, int linesize,
00597 DCTELEM *block)
00598 {
00599 int dc = block[0];
00600 dc = ( 3 * dc + 1) >> 1;
00601 dc = (17 * dc + 64) >> 7;
00602 __asm__ volatile(
00603 "movd %0, %%mm0 \n\t"
00604 "pshufw $0, %%mm0, %%mm0 \n\t"
00605 "pxor %%mm1, %%mm1 \n\t"
00606 "psubw %%mm0, %%mm1 \n\t"
00607 "packuswb %%mm0, %%mm0 \n\t"
00608 "packuswb %%mm1, %%mm1 \n\t"
00609 ::"r"(dc)
00610 );
00611 __asm__ volatile(
00612 "movq %0, %%mm2 \n\t"
00613 "movq %1, %%mm3 \n\t"
00614 "movq %2, %%mm4 \n\t"
00615 "movq %3, %%mm5 \n\t"
00616 "paddusb %%mm0, %%mm2 \n\t"
00617 "paddusb %%mm0, %%mm3 \n\t"
00618 "paddusb %%mm0, %%mm4 \n\t"
00619 "paddusb %%mm0, %%mm5 \n\t"
00620 "psubusb %%mm1, %%mm2 \n\t"
00621 "psubusb %%mm1, %%mm3 \n\t"
00622 "psubusb %%mm1, %%mm4 \n\t"
00623 "psubusb %%mm1, %%mm5 \n\t"
00624 "movq %%mm2, %0 \n\t"
00625 "movq %%mm3, %1 \n\t"
00626 "movq %%mm4, %2 \n\t"
00627 "movq %%mm5, %3 \n\t"
00628 :"+m"(*(uint32_t*)(dest+0*linesize)),
00629 "+m"(*(uint32_t*)(dest+1*linesize)),
00630 "+m"(*(uint32_t*)(dest+2*linesize)),
00631 "+m"(*(uint32_t*)(dest+3*linesize))
00632 );
00633 }
00634
00635 static void vc1_inv_trans_8x8_dc_mmxext(uint8_t *dest, int linesize,
00636 DCTELEM *block)
00637 {
00638 int dc = block[0];
00639 dc = (3 * dc + 1) >> 1;
00640 dc = (3 * dc + 16) >> 5;
00641 __asm__ volatile(
00642 "movd %0, %%mm0 \n\t"
00643 "pshufw $0, %%mm0, %%mm0 \n\t"
00644 "pxor %%mm1, %%mm1 \n\t"
00645 "psubw %%mm0, %%mm1 \n\t"
00646 "packuswb %%mm0, %%mm0 \n\t"
00647 "packuswb %%mm1, %%mm1 \n\t"
00648 ::"r"(dc)
00649 );
00650 __asm__ volatile(
00651 "movq %0, %%mm2 \n\t"
00652 "movq %1, %%mm3 \n\t"
00653 "movq %2, %%mm4 \n\t"
00654 "movq %3, %%mm5 \n\t"
00655 "paddusb %%mm0, %%mm2 \n\t"
00656 "paddusb %%mm0, %%mm3 \n\t"
00657 "paddusb %%mm0, %%mm4 \n\t"
00658 "paddusb %%mm0, %%mm5 \n\t"
00659 "psubusb %%mm1, %%mm2 \n\t"
00660 "psubusb %%mm1, %%mm3 \n\t"
00661 "psubusb %%mm1, %%mm4 \n\t"
00662 "psubusb %%mm1, %%mm5 \n\t"
00663 "movq %%mm2, %0 \n\t"
00664 "movq %%mm3, %1 \n\t"
00665 "movq %%mm4, %2 \n\t"
00666 "movq %%mm5, %3 \n\t"
00667 :"+m"(*(uint32_t*)(dest+0*linesize)),
00668 "+m"(*(uint32_t*)(dest+1*linesize)),
00669 "+m"(*(uint32_t*)(dest+2*linesize)),
00670 "+m"(*(uint32_t*)(dest+3*linesize))
00671 );
00672 dest += 4*linesize;
00673 __asm__ volatile(
00674 "movq %0, %%mm2 \n\t"
00675 "movq %1, %%mm3 \n\t"
00676 "movq %2, %%mm4 \n\t"
00677 "movq %3, %%mm5 \n\t"
00678 "paddusb %%mm0, %%mm2 \n\t"
00679 "paddusb %%mm0, %%mm3 \n\t"
00680 "paddusb %%mm0, %%mm4 \n\t"
00681 "paddusb %%mm0, %%mm5 \n\t"
00682 "psubusb %%mm1, %%mm2 \n\t"
00683 "psubusb %%mm1, %%mm3 \n\t"
00684 "psubusb %%mm1, %%mm4 \n\t"
00685 "psubusb %%mm1, %%mm5 \n\t"
00686 "movq %%mm2, %0 \n\t"
00687 "movq %%mm3, %1 \n\t"
00688 "movq %%mm4, %2 \n\t"
00689 "movq %%mm5, %3 \n\t"
00690 :"+m"(*(uint32_t*)(dest+0*linesize)),
00691 "+m"(*(uint32_t*)(dest+1*linesize)),
00692 "+m"(*(uint32_t*)(dest+2*linesize)),
00693 "+m"(*(uint32_t*)(dest+3*linesize))
00694 );
00695 }
00696
00697 av_cold void ff_vc1dsp_init_mmx(VC1DSPContext *dsp)
00698 {
00699 dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx;
00700 dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx;
00701 dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx;
00702 dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_mmx;
00703
00704 dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_mmx;
00705 dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_mmx;
00706 dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_mmx;
00707 dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_mmx;
00708
00709 dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_mmx;
00710 dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_mmx;
00711 dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_mmx;
00712 dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_mmx;
00713
00714 dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_mmx;
00715 dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx;
00716 dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx;
00717 dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx;
00718 }
00719
00720 av_cold void ff_vc1dsp_init_mmxext(VC1DSPContext *dsp)
00721 {
00722 dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmxext;
00723 dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmxext;
00724 dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmxext;
00725 dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_mmxext;
00726
00727 dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_mmxext;
00728 dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_mmxext;
00729 dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_mmxext;
00730 dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_mmxext;
00731
00732 dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_mmxext;
00733 dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_mmxext;
00734 dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_mmxext;
00735 dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_mmxext;
00736
00737 dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_mmxext;
00738 dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_mmxext;
00739 dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_mmxext;
00740 dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_mmxext;
00741
00742 dsp->vc1_inv_trans_8x8_dc = vc1_inv_trans_8x8_dc_mmxext;
00743 dsp->vc1_inv_trans_4x8_dc = vc1_inv_trans_4x8_dc_mmxext;
00744 dsp->vc1_inv_trans_8x4_dc = vc1_inv_trans_8x4_dc_mmxext;
00745 dsp->vc1_inv_trans_4x4_dc = vc1_inv_trans_4x4_dc_mmxext;
00746 }
00747 #endif