[FFmpeg-devel] [RFC] snow SSE2 optimizations

Reimar Doeffinger Reimar.Doeffinger
Tue Aug 28 19:27:19 CEST 2007


Hello,
On Tue, Aug 28, 2007 at 06:25:46PM +0200, Luca Barbato wrote:
> Michael Niedermayer wrote:
> > On Tue, Aug 28, 2007 at 05:10:18PM +0200, Luca Barbato wrote:
> >> Start guessing why there is just one altivec (across 3 generations of
> >> cpus) and SPU is still quite similar...
> >>
> >> The intel design for instructions set wasn't and isn't the smarter and
> >> they keep adding irregular changes...
> > 
> > true, but it also isnt the most stupid, sparc-vis beats them by quite a bit
> > and i dont think a perfectly regular set is a good idea either, because
> > 90% of the resulting instructions are never used by anyone, but the
> > cpu must support them, it makes the cpu more complex and slower
> > 
> 
> Check altivec/vmx or SPU. The instruction set rarely gets annoing and it
> isn't that big or underfeatured.

They only forgot to provide a useable way to detect if (or which parts
of) it is available.

Greetings,
Reimar Doeffinger




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