[FFmpeg-devel] pre discussion around Blackfin dct_quantize_bfin routine
Tue Jun 12 21:22:02 CEST 2007
On Tue, 12 Jun 2007, Marc Hoffman wrote:
> > Just out of curiousity:
> > can the compiler handle "=d" (t0) ?
> > getting rid of the seperate lo in some way removes one possibility for
> > the compiler to mess up...
> YEP THATS IT! just curious if r1 has really been allocated or not
> tho.. I was walking through print_insn inside the compiler and %H0
> just selects the successor register i.e. REGNO+1. I'm not sure if
> this really does what we want it to.
> asm volatile ("%0=cycles; %H0=cycles2;" : "=d" (t0));
> LINK 0;
> R0=cycles; R1=cycles2;
I don't know blackfin asm, but would it be ok if the compiler picked R1?
The asm would then be:
Maybe you need to use the 'D' constraint for an even numbered D register?
I bet that the compiler doesn't know that you have clobbered R1, and might
try to keep something in it. The timer function will probably end up
inlined into whatever code you are benchmarking, so there could be stuff
already loaded into a register.
Here's another random guess at a way to do it:
unsigned uint64_t read_time9(void)
uint64_t lo, hi;
asm volatile ("%0=cycles; %1=cycles2;" : "=D"(lo), "=W"(hi));
return lo | (hi<<32);
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