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cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include "cpu.h"
20 #include "config.h"
21 #include "opt.h"
22 #include "common.h"
23 
24 #if HAVE_SCHED_GETAFFINITY
25 #ifndef _GNU_SOURCE
26 # define _GNU_SOURCE
27 #endif
28 #include <sched.h>
29 #endif
30 #if HAVE_GETPROCESSAFFINITYMASK
31 #include <windows.h>
32 #endif
33 #if HAVE_SYSCTL
34 #if HAVE_SYS_PARAM_H
35 #include <sys/param.h>
36 #endif
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/sysctl.h>
40 #endif
41 #if HAVE_SYSCONF
42 #include <unistd.h>
43 #endif
44 
45 static int flags, checked;
46 
47 void av_force_cpu_flags(int arg){
48  flags = arg;
49  checked = arg != -1;
50 }
51 
52 int av_get_cpu_flags(void)
53 {
54  if (checked)
55  return flags;
56 
57  if (ARCH_ARM) flags = ff_get_cpu_flags_arm();
58  if (ARCH_PPC) flags = ff_get_cpu_flags_ppc();
59  if (ARCH_X86) flags = ff_get_cpu_flags_x86();
60 
61  checked = 1;
62  return flags;
63 }
64 
65 void av_set_cpu_flags_mask(int mask)
66 {
67  checked = 0;
68  flags = av_get_cpu_flags() & mask;
69  checked = 1;
70 }
71 
72 int av_parse_cpu_flags(const char *s)
73 {
74 #define CPUFLAG_MMXEXT (AV_CPU_FLAG_MMX | AV_CPU_FLAG_MMXEXT | AV_CPU_FLAG_CMOV)
75 #define CPUFLAG_3DNOW (AV_CPU_FLAG_3DNOW | AV_CPU_FLAG_MMX)
76 #define CPUFLAG_3DNOWEXT (AV_CPU_FLAG_3DNOWEXT | CPUFLAG_3DNOW)
77 #define CPUFLAG_SSE (AV_CPU_FLAG_SSE | CPUFLAG_MMXEXT)
78 #define CPUFLAG_SSE2 (AV_CPU_FLAG_SSE2 | CPUFLAG_SSE)
79 #define CPUFLAG_SSE2SLOW (AV_CPU_FLAG_SSE2SLOW | CPUFLAG_SSE2)
80 #define CPUFLAG_SSE3 (AV_CPU_FLAG_SSE3 | CPUFLAG_SSE2)
81 #define CPUFLAG_SSE3SLOW (AV_CPU_FLAG_SSE3SLOW | CPUFLAG_SSE3)
82 #define CPUFLAG_SSSE3 (AV_CPU_FLAG_SSSE3 | CPUFLAG_SSE3)
83 #define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
84 #define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
85 #define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
86 #define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
87 #define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
88  static const AVOption cpuflags_opts[] = {
89  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
90 #if ARCH_PPC
91  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
92 #elif ARCH_X86
93  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
94  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_MMXEXT }, .unit = "flags" },
95  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE }, .unit = "flags" },
96  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2 }, .unit = "flags" },
97  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2SLOW }, .unit = "flags" },
98  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3 }, .unit = "flags" },
99  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3SLOW }, .unit = "flags" },
100  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSSE3 }, .unit = "flags" },
101  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
102  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },
103  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },
104  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },
105  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },
106  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },
107  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" },
108  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" },
109  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
110 #elif ARCH_ARM
111  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
112  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
113  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
114  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
115  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
116  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
117 #endif
118  { NULL },
119  };
120  static const AVClass class = {
121  .class_name = "cpuflags",
122  .item_name = av_default_item_name,
123  .option = cpuflags_opts,
124  .version = LIBAVUTIL_VERSION_INT,
125  };
126 
127  int flags = 0, ret;
128  const AVClass *pclass = &class;
129 
130  if ((ret = av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, &flags)) < 0)
131  return ret;
132 
133  return flags & INT_MAX;
134 }
135 
136 int av_parse_cpu_caps(unsigned *flags, const char *s)
137 {
138  static const AVOption cpuflags_opts[] = {
139  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
140 #if ARCH_PPC
141  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
142 #elif ARCH_X86
143  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
144  { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
145  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
146  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
147  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
148  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
149  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
150  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
151  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
152  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
153  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
154  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
155  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
156  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
157  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
158  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
159  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
160  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
161 
162 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
163 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
164 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
165  { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
166  { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
167  { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
168 
169 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
170 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
171 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
172 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
173  { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
174  { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
175  { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
176  { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
177  { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
178 #elif ARCH_ARM
179  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
180  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
181  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
182  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
183  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
184  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
185 #endif
186  { NULL },
187  };
188  static const AVClass class = {
189  .class_name = "cpuflags",
190  .item_name = av_default_item_name,
191  .option = cpuflags_opts,
192  .version = LIBAVUTIL_VERSION_INT,
193  };
194  const AVClass *pclass = &class;
195 
196  return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
197 }
198 
199 int av_cpu_count(void)
200 {
201  static volatile int printed;
202 
203  int nb_cpus = 1;
204 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
205  cpu_set_t cpuset;
206 
207  CPU_ZERO(&cpuset);
208 
209  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
210  nb_cpus = CPU_COUNT(&cpuset);
211 #elif HAVE_GETPROCESSAFFINITYMASK
212  DWORD_PTR proc_aff, sys_aff;
213  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
214  nb_cpus = av_popcount64(proc_aff);
215 #elif HAVE_SYSCTL && defined(HW_NCPU)
216  int mib[2] = { CTL_HW, HW_NCPU };
217  size_t len = sizeof(nb_cpus);
218 
219  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
220  nb_cpus = 0;
221 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
222  nb_cpus = sysconf(_SC_NPROC_ONLN);
223 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
224  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
225 #endif
226 
227  if (!printed) {
228  av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
229  printed = 1;
230  }
231 
232  return nb_cpus;
233 }
234 
235 #ifdef TEST
236 
237 #include <stdio.h>
238 
239 static const struct {
240  int flag;
241  const char *name;
242 } cpu_flag_tab[] = {
243 #if ARCH_ARM
244  { AV_CPU_FLAG_ARMV5TE, "armv5te" },
245  { AV_CPU_FLAG_ARMV6, "armv6" },
246  { AV_CPU_FLAG_ARMV6T2, "armv6t2" },
247  { AV_CPU_FLAG_VFP, "vfp" },
248  { AV_CPU_FLAG_VFPV3, "vfpv3" },
249  { AV_CPU_FLAG_NEON, "neon" },
250 #elif ARCH_PPC
251  { AV_CPU_FLAG_ALTIVEC, "altivec" },
252 #elif ARCH_X86
253  { AV_CPU_FLAG_MMX, "mmx" },
254  { AV_CPU_FLAG_MMXEXT, "mmxext" },
255  { AV_CPU_FLAG_SSE, "sse" },
256  { AV_CPU_FLAG_SSE2, "sse2" },
257  { AV_CPU_FLAG_SSE2SLOW, "sse2(slow)" },
258  { AV_CPU_FLAG_SSE3, "sse3" },
259  { AV_CPU_FLAG_SSE3SLOW, "sse3(slow)" },
260  { AV_CPU_FLAG_SSSE3, "ssse3" },
261  { AV_CPU_FLAG_ATOM, "atom" },
262  { AV_CPU_FLAG_SSE4, "sse4.1" },
263  { AV_CPU_FLAG_SSE42, "sse4.2" },
264  { AV_CPU_FLAG_AVX, "avx" },
265  { AV_CPU_FLAG_XOP, "xop" },
266  { AV_CPU_FLAG_FMA4, "fma4" },
267  { AV_CPU_FLAG_3DNOW, "3dnow" },
268  { AV_CPU_FLAG_3DNOWEXT, "3dnowext" },
269  { AV_CPU_FLAG_CMOV, "cmov" },
270 #endif
271  { 0 }
272 };
273 
274 int main(void)
275 {
276  int cpu_flags = av_get_cpu_flags();
277  int i;
278 
279  printf("cpu_flags = 0x%08X\n", cpu_flags);
280  printf("cpu_flags =");
281  for (i = 0; cpu_flag_tab[i].flag; i++)
282  if (cpu_flags & cpu_flag_tab[i].flag)
283  printf(" %s", cpu_flag_tab[i].name);
284  printf("\n");
285 
286  return 0;
287 }
288 
289 #endif
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