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cores.h
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1/* Autogenerated with gen-arm-core-table.sh */
2/* clang-format off */
3static const struct arm_core cores_arm[] = {
4 { 0x810, "ARM810" },
5 { 0x920, "ARM920" },
6 { 0x922, "ARM922" },
7 { 0x926, "ARM926" },
8 { 0x940, "ARM940" },
9 { 0x946, "ARM946" },
10 { 0x966, "ARM966" },
11 { 0xa20, "ARM1020" },
12 { 0xa22, "ARM1022" },
13 { 0xa26, "ARM1026" },
14 { 0xb02, "ARM11-MPCore" },
15 { 0xb36, "ARM1136" },
16 { 0xb56, "ARM1156" },
17 { 0xb76, "ARM1176" },
18 { 0xc05, "Cortex-A5" },
19 { 0xc07, "Cortex-A7" },
20 { 0xc08, "Cortex-A8" },
21 { 0xc09, "Cortex-A9" },
22 { 0xc0d, "Cortex-A17" },
23 { 0xc0f, "Cortex-A15" },
24 { 0xc0e, "Cortex-A17" },
25 { 0xc14, "Cortex-R4" },
26 { 0xc15, "Cortex-R5" },
27 { 0xc17, "Cortex-R7" },
28 { 0xc18, "Cortex-R8" },
29 { 0xc20, "Cortex-M0" },
30 { 0xc21, "Cortex-M1" },
31 { 0xc23, "Cortex-M3" },
32 { 0xc24, "Cortex-M4" },
33 { 0xc27, "Cortex-M7" },
34 { 0xc60, "Cortex-M0+" },
35 { 0xd01, "Cortex-A32" },
36 { 0xd02, "Cortex-A34" },
37 { 0xd03, "Cortex-A53" },
38 { 0xd04, "Cortex-A35" },
39 { 0xd05, "Cortex-A55" },
40 { 0xd06, "Cortex-A65" },
41 { 0xd07, "Cortex-A57" },
42 { 0xd08, "Cortex-A72" },
43 { 0xd09, "Cortex-A73" },
44 { 0xd0a, "Cortex-A75" },
45 { 0xd0b, "Cortex-A76" },
46 { 0xd0c, "Neoverse-N1" },
47 { 0xd0d, "Cortex-A77" },
48 { 0xd0e, "Cortex-A76AE" },
49 { 0xd13, "Cortex-R52" },
50 { 0xd14, "Cortex-R82AE" },
51 { 0xd15, "Cortex-R82" },
52 { 0xd16, "Cortex-R52+" },
53 { 0xd20, "Cortex-M23" },
54 { 0xd21, "Cortex-M33" },
55 { 0xd24, "Cortex-M52" },
56 { 0xd22, "Cortex-M55" },
57 { 0xd23, "Cortex-M85" },
58 { 0xd40, "Neoverse-V1" },
59 { 0xd41, "Cortex-A78" },
60 { 0xd42, "Cortex-A78AE" },
61 { 0xd43, "Cortex-A65AE" },
62 { 0xd44, "Cortex-X1" },
63 { 0xd46, "Cortex-A510" },
64 { 0xd47, "Cortex-A710" },
65 { 0xd48, "Cortex-X2" },
66 { 0xd49, "Neoverse-N2" },
67 { 0xd4a, "Neoverse-E1" },
68 { 0xd4b, "Cortex-A78C" },
69 { 0xd4c, "Cortex-X1C" },
70 { 0xd4d, "Cortex-A715" },
71 { 0xd4e, "Cortex-X3" },
72 { 0xd4f, "Neoverse-V2" },
73 { 0xd80, "Cortex-A520" },
74 { 0xd81, "Cortex-A720" },
75 { 0xd82, "Cortex-X4" },
76 { 0xd83, "Neoverse-V3AE" },
77 { 0xd84, "Neoverse-V3" },
78 { 0xd85, "Cortex-X925" },
79 { 0xd87, "Cortex-A725" },
80 { 0xd88, "Cortex-A520AE" },
81 { 0xd89, "Cortex-A720AE" },
82 { 0xd8a, "C1-Nano" },
83 { 0xd8b, "C1-Pro" },
84 { 0xd8c, "C1-Ultra" },
85 { 0xd8e, "Neoverse-N3" },
86 { 0xd8f, "Cortex-A320" },
87 { 0xd90, "C1-Premium" },
88 { 0, NULL },
89};
90
91static const struct arm_core cores_broadcom[] = {
92 { 0x00f, "Brahma-B15" },
93 { 0x100, "Brahma-B53" },
94 { 0x516, "ThunderX2" },
95 { 0, NULL },
96};
97
98static const struct arm_core cores_cavium[] = {
99 { 0x0a0, "ThunderX" },
100 { 0x0a1, "ThunderX-88XX" },
101 { 0x0a2, "ThunderX-81XX" },
102 { 0x0a3, "ThunderX-83XX" },
103 { 0x0af, "ThunderX2-99xx" },
104 { 0x0b0, "OcteonTX2" },
105 { 0x0b1, "OcteonTX2-98XX" },
106 { 0x0b2, "OcteonTX2-96XX" },
107 { 0x0b3, "OcteonTX2-95XX" },
108 { 0x0b4, "OcteonTX2-95XXN" },
109 { 0x0b5, "OcteonTX2-95XXMM" },
110 { 0x0b6, "OcteonTX2-95XXO" },
111 { 0x0b8, "ThunderX3-T110" },
112 { 0, NULL },
113};
114
115static const struct arm_core cores_dec[] = {
116 { 0xa10, "SA110" },
117 { 0xa11, "SA1100" },
118 { 0, NULL },
119};
120
121static const struct arm_core cores_fujitsu[] = {
122 { 0x001, "A64FX" },
123 { 0x003, "MONAKA" },
124 { 0, NULL },
125};
126
127static const struct arm_core cores_hisilicon[] = {
128 { 0xd01, "TaiShan-v110" },
129 { 0xd02, "TaiShan-v120" },
130 { 0xd40, "Cortex-A76" },
131 { 0xd41, "Cortex-A77" },
132 { 0, NULL },
133};
134
135static const struct arm_core cores_infineon[] = {
136 { 0, NULL },
137};
138
139static const struct arm_core cores_motorola_freescale[] = {
140 { 0, NULL },
141};
142
143static const struct arm_core cores_nvidia[] = {
144 { 0x000, "Denver" },
145 { 0x003, "Denver-2" },
146 { 0x004, "Carmel" },
147 { 0x010, "Olympus" },
148 { 0, NULL },
149};
150
151static const struct arm_core cores_apm[] = {
152 { 0x000, "X-Gene" },
153 { 0, NULL },
154};
155
156static const struct arm_core cores_qualcomm[] = {
157 { 0x001, "Oryon" },
158 { 0x00f, "Scorpion" },
159 { 0x02d, "Scorpion" },
160 { 0x04d, "Krait" },
161 { 0x06f, "Krait" },
162 { 0x201, "Kryo" },
163 { 0x205, "Kryo" },
164 { 0x211, "Kryo" },
165 { 0x800, "Falkor-V1/Kryo" },
166 { 0x801, "Kryo-V2" },
167 { 0x802, "Kryo-3XX-Gold" },
168 { 0x803, "Kryo-3XX-Silver" },
169 { 0x804, "Kryo-4XX-Gold" },
170 { 0x805, "Kryo-4XX-Silver" },
171 { 0xc00, "Falkor" },
172 { 0xc01, "Saphira" },
173 { 0, NULL },
174};
175
176static const struct arm_core cores_samsung[] = {
177 { 0x001, "exynos-m1" },
178 { 0x002, "exynos-m3" },
179 { 0x003, "exynos-m4" },
180 { 0x004, "exynos-m5" },
181 { 0, NULL },
182};
183
184static const struct arm_core cores_marvell[] = {
185 { 0x131, "Feroceon-88FR131" },
186 { 0x581, "PJ4/PJ4b" },
187 { 0x584, "PJ4B-MP" },
188 { 0, NULL },
189};
190
191static const struct arm_core cores_apple[] = {
192 { 0x000, "Swift" },
193 { 0x001, "Cyclone" },
194 { 0x002, "Typhoon" },
195 { 0x003, "Typhoon/Capri" },
196 { 0x004, "Twister" },
197 { 0x005, "Twister/Elba/Malta" },
198 { 0x006, "Hurricane" },
199 { 0x007, "Hurricane/Myst" },
200 { 0x008, "Monsoon" },
201 { 0x009, "Mistral" },
202 { 0x00b, "Vortex" },
203 { 0x00c, "Tempest" },
204 { 0x00f, "Tempest-M9" },
205 { 0x010, "Vortex/Aruba" },
206 { 0x011, "Tempest/Aruba" },
207 { 0x012, "Lightning" },
208 { 0x013, "Thunder" },
209 { 0x020, "Icestorm-A14" },
210 { 0x021, "Firestorm-A14" },
211 { 0x022, "Icestorm-M1" },
212 { 0x023, "Firestorm-M1" },
213 { 0x024, "Icestorm-M1-Pro" },
214 { 0x025, "Firestorm-M1-Pro" },
215 { 0x026, "Thunder-M10" },
216 { 0x028, "Icestorm-M1-Max" },
217 { 0x029, "Firestorm-M1-Max" },
218 { 0x030, "Blizzard-A15" },
219 { 0x031, "Avalanche-A15" },
220 { 0x032, "Blizzard-M2" },
221 { 0x033, "Avalanche-M2" },
222 { 0x034, "Blizzard-M2-Pro" },
223 { 0x035, "Avalanche-M2-Pro" },
224 { 0x036, "Sawtooth-A16" },
225 { 0x037, "Everest-A16" },
226 { 0x038, "Blizzard-M2-Max" },
227 { 0x039, "Avalanche-M2-Max" },
228 { 0, NULL },
229};
230
231static const struct arm_core cores_faraday[] = {
232 { 0x526, "FA526" },
233 { 0x626, "FA626" },
234 { 0, NULL },
235};
236
237static const struct arm_core cores_intel[] = {
238 { 0x200, "i80200" },
239 { 0x210, "PXA250A" },
240 { 0x212, "PXA210A" },
241 { 0x242, "i80321-400" },
242 { 0x243, "i80321-600" },
243 { 0x290, "PXA250B/PXA26x" },
244 { 0x292, "PXA210B" },
245 { 0x2c2, "i80321-400-B0" },
246 { 0x2c3, "i80321-600-B0" },
247 { 0x2d0, "PXA250C/PXA255/PXA26x" },
248 { 0x2d2, "PXA210C" },
249 { 0x411, "PXA27x" },
250 { 0x41c, "IPX425-533" },
251 { 0x41d, "IPX425-400" },
252 { 0x41f, "IPX425-266" },
253 { 0x682, "PXA32x" },
254 { 0x683, "PXA930/PXA935" },
255 { 0x688, "PXA30x" },
256 { 0x689, "PXA31x" },
257 { 0xb11, "SA1110" },
258 { 0xc12, "IPX1200" },
259 { 0, NULL },
260};
261
262static const struct arm_core cores_microsoft[] = {
263 { 0xd49, "Azure-Cobalt-100" },
264 { 0, NULL },
265};
266
267static const struct arm_core cores_phytium[] = {
268 { 0x303, "FTC310" },
269 { 0x660, "FTC660" },
270 { 0x661, "FTC661" },
271 { 0x662, "FTC662" },
272 { 0x663, "FTC663" },
273 { 0x664, "FTC664" },
274 { 0x862, "FTC862" },
275 { 0, NULL },
276};
277
278static const struct arm_core cores_ampere[] = {
279 { 0xac3, "Ampere-1" },
280 { 0xac4, "Ampere-1a" },
281 { 0, NULL },
282};
283
284static const struct arm_implementer arm_implementers[] = {
285 { 0x41, cores_arm, "ARM" },
286 { 0x42, cores_broadcom, "Broadcom" },
287 { 0x43, cores_cavium, "Cavium" },
288 { 0x44, cores_dec, "DEC" },
289 { 0x46, cores_fujitsu, "FUJITSU" },
290 { 0x48, cores_hisilicon, "HiSilicon" },
291 { 0x49, cores_infineon, "Infineon" },
292 { 0x4d, cores_motorola_freescale, "Motorola/Freescale" },
293 { 0x4e, cores_nvidia, "NVIDIA" },
294 { 0x50, cores_apm, "APM" },
295 { 0x51, cores_qualcomm, "Qualcomm" },
296 { 0x53, cores_samsung, "Samsung" },
297 { 0x56, cores_marvell, "Marvell" },
298 { 0x61, cores_apple, "Apple" },
299 { 0x66, cores_faraday, "Faraday" },
300 { 0x69, cores_intel, "Intel" },
301 { 0x6d, cores_microsoft, "Microsoft" },
302 { 0x70, cores_phytium, "Phytium" },
303 { 0xc0, cores_ampere, "Ampere" },
304 { 0, NULL, NULL },
305};
static const struct arm_core cores_apple[]
Definition cores.h:191
static const struct arm_core cores_arm[]
Definition cores.h:3
static const struct arm_core cores_apm[]
Definition cores.h:151
static const struct arm_core cores_intel[]
Definition cores.h:237
static const struct arm_core cores_dec[]
Definition cores.h:115
static const struct arm_core cores_cavium[]
Definition cores.h:98
static const struct arm_core cores_samsung[]
Definition cores.h:176
static const struct arm_implementer arm_implementers[]
Definition cores.h:284
static const struct arm_core cores_nvidia[]
Definition cores.h:143
static const struct arm_core cores_fujitsu[]
Definition cores.h:121
static const struct arm_core cores_hisilicon[]
Definition cores.h:127
static const struct arm_core cores_phytium[]
Definition cores.h:267
static const struct arm_core cores_marvell[]
Definition cores.h:184
static const struct arm_core cores_microsoft[]
Definition cores.h:262
static const struct arm_core cores_broadcom[]
Definition cores.h:91
static const struct arm_core cores_infineon[]
Definition cores.h:135
static const struct arm_core cores_motorola_freescale[]
Definition cores.h:139
static const struct arm_core cores_faraday[]
Definition cores.h:231
static const struct arm_core cores_ampere[]
Definition cores.h:278
static const struct arm_core cores_qualcomm[]
Definition cores.h:156
#define NULL
Definition coverity.c:32