[FFmpeg-devel] [PATCH] forgotten "enable ppc64" for arch == ppc64

[Reimar Döffinger]

On Mon, May 25, 2009 at 11:11:22PM +0100, M?ns Rullg?rd wrote:
> > @@ -1808,12 +1808,13 @@
> >          G5|g5|970|ppc970|PowerPC970|power4*|Power4*)
> >              add_cflags -mcpu=970 -mpowerpc-gfxopt -mpowerpc64
> >              warn_altivec disabled PPC970
> > -            enable ppc64
> > +            subarch="ppc64"
> >          ;;
> >          Cell|CELL|cell)
> >              add_cflags -mcpu=cell
> >              warn_altivec disabled Cell
> > -            enable ppc64 ldbrx
> > +            subarch="ppc64"
> > +            enable ldbrx
> >          ;;
> 
> Remove all ppc64 manipulations here.


I have some doubts that's going to really work in general, but patch
attached.
I does fix "make test" (i.e. mp2/mp3 decoding) on the PPC64 that runs
FATE though.
-------------- next part --------------
Index: configure
===================================================================
--- configure	(revision 18945)
+++ configure	(working copy)
@@ -833,6 +833,7 @@
     mips64
     parisc
     ppc
+    ppc64
     s390
     sh4
     sparc
@@ -906,7 +907,6 @@
     mkstemp
     pld
     posix_memalign
-    ppc64
     round
     roundf
     sdl
@@ -1514,6 +1514,7 @@
     ;;
     ppc64)
         arch="ppc"
+        subarch="ppc64"
         enable fast_64bit
         enable fast_unaligned
     ;;
@@ -1808,12 +1809,11 @@
         G5|g5|970|ppc970|PowerPC970|power4*|Power4*)
             add_cflags -mcpu=970 -mpowerpc-gfxopt -mpowerpc64
             warn_altivec disabled PPC970
-            enable ppc64
         ;;
         Cell|CELL|cell)
             add_cflags -mcpu=cell
             warn_altivec disabled Cell
-            enable ppc64 ldbrx
+            enable ldbrx
         ;;
         # targets that do NOT support conditional mov (cmov)
         i[345]86|pentium|pentium-mmx|k6|k6-[23]|winchip-c6|winchip2|c3)
Index: libavcodec/ppc/mathops.h
===================================================================
--- libavcodec/ppc/mathops.h	(revision 18945)
+++ libavcodec/ppc/mathops.h	(working copy)
@@ -44,7 +44,7 @@
     return r;
 }
 
-#if !HAVE_PPC64
+#if !ARCH_PPC64
 static inline av_const int64_t MAC64(int64_t d, int a, int b)
 {
     union { uint64_t x; unsigned hl[2]; } x = { d };
Index: libavcodec/ppc/dsputil_ppc.h
===================================================================
--- libavcodec/ppc/dsputil_ppc.h	(revision 18945)
+++ libavcodec/ppc/dsputil_ppc.h	(working copy)
@@ -27,7 +27,7 @@
 void powerpc_display_perf_report(void);
 /* the 604* have 2, the G3* have 4, the G4s have 6,
    and the G5 are completely different (they MUST use
-   HAVE_PPC64, and let's hope all future 64 bis PPC
+   ARCH_PPC64, and let's hope all future 64 bis PPC
    will use the same PMCs... */
 #define POWERPC_NUM_PMC_ENABLED 6
 /* if you add to the enum below, also add to the perfname array
@@ -70,7 +70,7 @@
 };
 extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
 
-#if !HAVE_PPC64
+#if !ARCH_PPC64
 #define POWERP_PMC_DATATYPE unsigned long
 #define POWERPC_GET_PMC1(a) __asm__ volatile("mfspr %0, 937" : "=r" (a))
 #define POWERPC_GET_PMC2(a) __asm__ volatile("mfspr %0, 938" : "=r" (a))
@@ -88,7 +88,7 @@
 #define POWERPC_GET_PMC5(a) do {} while (0)
 #define POWERPC_GET_PMC6(a) do {} while (0)
 #endif
-#else /* HAVE_PPC64 */
+#else /* ARCH_PPC64 */
 #define POWERP_PMC_DATATYPE unsigned long long
 #define POWERPC_GET_PMC1(a) __asm__ volatile("mfspr %0, 771" : "=r" (a))
 #define POWERPC_GET_PMC2(a) __asm__ volatile("mfspr %0, 772" : "=r" (a))
@@ -106,7 +106,7 @@
 #define POWERPC_GET_PMC5(a) do {} while (0)
 #define POWERPC_GET_PMC6(a) do {} while (0)
 #endif
-#endif /* HAVE_PPC64 */
+#endif /* ARCH_PPC64 */
 #define POWERPC_PERF_DECLARE(a, cond)       \
     POWERP_PMC_DATATYPE                     \
         pmc_start[POWERPC_NUM_PMC_ENABLED], \