[FFmpeg-devel] [PATCH 7/8] lavc/flacenc: add AVX2 version of the 32-bit LPC encoder

James Darnley james.darnley at gmail.com
Mon Nov 27 01:26:01 EET 2017


On 2017-11-27 00:13, Rostislav Pehlivanov wrote:
> On 26 November 2017 at 22:51, James Darnley <james.darnley at gmail.com> wrote:
>> @@ -123,7 +123,10 @@ RET
>>  %endmacro
>>
>>  %macro PMINSQ 3
>> -    pcmpgtq %3, %2, %1
>> +    mova    %3, %2
>> +    ; We cannot use the 3-operand format because the memory location
>> cannot be
>> +    ; the second operand, only the third.
>> +    pcmpgtq %3, %1
>>
> 
> I don't get it, how did it work before then?

Easy.  3-operand instructions were never generated using it meaning it
was always emulated with a move.

>> @@ -197,8 +200,20 @@ mova  [rsp],    m4            ; save sign extend mask
>>      xor  negj, negj
>>
>>      .looporder1:
>> +%if cpuflag(avx)
>> +        vbroadcastss m2, [coefsq+posj*4]
>> +%else
>>          movd   m2,  [coefsq+posj*4] ; c = coefs[j]
>>          SPLATD m2
>> +%endif
>> +%if cpuflag(avx)
>> +        vpmuldq  m1, m2, [smpq+negj*4-4]
>> +        vpmuldq  m5, m2, [smpq+negj*4-4+mmsize]
>> +        vpmuldq  m7, m2, [smpq+negj*4-4+mmsize*2]
>> +        vpaddq   m0, m1
>> +        vpaddq   m4, m5
>> +        vpaddq   m6, m7
>>
> 
> Why force VEX encoding for these instructions, on avx no less?

Not sure.  Legacy code written before I knew what I was doing?  Perhaps
some issue arose with the assembler or x86inc at that time and this is
how I worked around it.



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