[FFmpeg-devel] [PATCH 16/41] avcodec/x86/rv40dsp_init: Disable overridden functions on x64

Andreas Rheinhardt andreas.rheinhardt at outlook.com
Fri Jun 10 02:54:58 EEST 2022


x64 always has MMX, MMXEXT, SSE and SSE2 and this means
that some functions for MMX, MMXEXT, SSE and 3dnow are always
overridden by other functions (unless one e.g. explicitly
disables SSE2). This commit therefore disables such RV40-dsp
functions at compile-time.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt at outlook.com>
---
 libavcodec/x86/h264_chromamc.asm |  4 ++--
 libavcodec/x86/rv40dsp.asm       |  2 ++
 libavcodec/x86/rv40dsp_init.c    | 10 ++++++----
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/libavcodec/x86/h264_chromamc.asm b/libavcodec/x86/h264_chromamc.asm
index 0421fa8695..d59c183371 100644
--- a/libavcodec/x86/h264_chromamc.asm
+++ b/libavcodec/x86/h264_chromamc.asm
@@ -450,10 +450,10 @@ INIT_MMX 3dnow
 chroma_mc8_mmx_func avg, h264, _rnd
 %if ARCH_X86_32
 chroma_mc8_mmx_func avg, vc1,  _nornd
-%endif
 chroma_mc8_mmx_func avg, rv40
-chroma_mc4_mmx_func avg, h264
 chroma_mc4_mmx_func avg, rv40
+%endif
+chroma_mc4_mmx_func avg, h264
 
 %macro chroma_mc8_ssse3_func 2-3
 cglobal %1_%2_chroma_mc8%3, 6, 7, 8
diff --git a/libavcodec/x86/rv40dsp.asm b/libavcodec/x86/rv40dsp.asm
index bcad1aee80..7fa271a5d5 100644
--- a/libavcodec/x86/rv40dsp.asm
+++ b/libavcodec/x86/rv40dsp.asm
@@ -481,11 +481,13 @@ cglobal rv40_weight_func_%1_%2, 6, 7, 8
     REP_RET
 %endmacro
 
+%if ARCH_X86_32
 INIT_MMX mmxext
 RV40_WEIGHT   rnd,    8, 3
 RV40_WEIGHT   rnd,   16, 4
 RV40_WEIGHT   nornd,  8, 3
 RV40_WEIGHT   nornd, 16, 4
+%endif
 
 INIT_XMM sse2
 RV40_WEIGHT   rnd,    8, 3
diff --git a/libavcodec/x86/rv40dsp_init.c b/libavcodec/x86/rv40dsp_init.c
index 7a05ab14ad..7a60a30295 100644
--- a/libavcodec/x86/rv40dsp_init.c
+++ b/libavcodec/x86/rv40dsp_init.c
@@ -207,10 +207,12 @@ DEFINE_FN(avg, 16, ssse3)
 
 #if HAVE_MMX_INLINE
 DEFINE_FN(put, 8, mmx)
+#if ARCH_X86_32
 DEFINE_FN(avg, 8, mmx)
 DEFINE_FN(put, 16, mmx)
 DEFINE_FN(avg, 16, mmx)
 #endif
+#endif
 
 av_cold void ff_rv40dsp_init_x86(RV34DSPContext *c)
 {
@@ -218,10 +220,12 @@ av_cold void ff_rv40dsp_init_x86(RV34DSPContext *c)
 
 #if HAVE_MMX_INLINE
     if (INLINE_MMX(cpu_flags)) {
-        c->put_pixels_tab[0][15] = put_rv40_qpel16_mc33_mmx;
         c->put_pixels_tab[1][15] = put_rv40_qpel8_mc33_mmx;
+#if ARCH_X86_32
+        c->put_pixels_tab[0][15] = put_rv40_qpel16_mc33_mmx;
         c->avg_pixels_tab[0][15] = avg_rv40_qpel16_mc33_mmx;
         c->avg_pixels_tab[1][15] = avg_rv40_qpel8_mc33_mmx;
+#endif
     }
 #endif /* HAVE_MMX_INLINE */
 
@@ -231,12 +235,10 @@ av_cold void ff_rv40dsp_init_x86(RV34DSPContext *c)
         c->put_chroma_pixels_tab[1] = ff_put_rv40_chroma_mc4_mmx;
 #if ARCH_X86_32
         QPEL_MC_SET(put_, _mmx)
-#endif
     }
     if (EXTERNAL_AMD3DNOW(cpu_flags)) {
         c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_3dnow;
         c->avg_chroma_pixels_tab[1] = ff_avg_rv40_chroma_mc4_3dnow;
-#if ARCH_X86_32
         QPEL_MC_SET(avg_, _3dnow)
 #endif
     }
@@ -244,11 +246,11 @@ av_cold void ff_rv40dsp_init_x86(RV34DSPContext *c)
         c->avg_pixels_tab[1][15]        = avg_rv40_qpel8_mc33_mmxext;
         c->avg_chroma_pixels_tab[0]     = ff_avg_rv40_chroma_mc8_mmxext;
         c->avg_chroma_pixels_tab[1]     = ff_avg_rv40_chroma_mc4_mmxext;
+#if ARCH_X86_32
         c->rv40_weight_pixels_tab[0][0] = ff_rv40_weight_func_rnd_16_mmxext;
         c->rv40_weight_pixels_tab[0][1] = ff_rv40_weight_func_rnd_8_mmxext;
         c->rv40_weight_pixels_tab[1][0] = ff_rv40_weight_func_nornd_16_mmxext;
         c->rv40_weight_pixels_tab[1][1] = ff_rv40_weight_func_nornd_8_mmxext;
-#if ARCH_X86_32
         QPEL_MC_SET(avg_, _mmxext)
 #endif
     }
-- 
2.34.1



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