[FFmpeg-devel] [PATCH] lavc/vc1dsp: match C block layout in inv_trans_4x8_rvv

[James Almer]

On 6/11/2024 9:19 AM, Rémi Denis-Courmont wrote:
> 
> 
> Le 11 juin 2024 15:09:42 GMT+03:00, "Ronald S. Bultje" <rsbultje at gmail.com> a écrit :
>> Hi,
>>
>> On Mon, Jun 10, 2024 at 3:20 PM Rémi Denis-Courmont <remi at remlab.net> wrote:
>>
>>> Although checkasm does not verify this, the decoder requires that the
>>> transform updates the input block exactly like the C code does.
>>>
>>
>> Would it be possible to update the checkasm test to verify this?
> 
> In theory, it has to be possible. I can't do it for lack of knowledge about VC-1 though. James tried to make such a patch but it ended up failing both AArch64 and RVV 8x4 transforms. I don't know if this points to a latent bug or is a false positive.

My patch added a memcmp of the block buffer. If it fails, then the asm 
implementation is probably writing more than it should.
Can you see what bytes don't match? It might give you an idea of what 
store instruction is touching the wrong bytes.

> 
>>
>> Ronald
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