63 static void ac3_bit_alloc_calc_bap_mips(int16_t *
mask, int16_t *psd,
65 int snr_offset,
int floor,
68 int band, band_end,
cond;
69 int m, address1, address2;
70 int16_t *psd1, *psd_end;
73 if (snr_offset == -960) {
83 m = (
FFMAX(mask[band] - snr_offset - floor, 0) & 0x1FE0) + floor;
85 band_end =
FFMIN(band_end, end);
86 psd_end = psd + band_end - 1;
89 "slt %[cond], %[psd1], %[psd_end] \n\t" 90 "beqz %[cond], 1f \n\t" 92 "lh %[address1], 0(%[psd1]) \n\t" 93 "lh %[address2], 2(%[psd1]) \n\t" 95 "subu %[address1], %[address1], %[m] \n\t" 96 "sra %[address1], %[address1], 5 \n\t" 97 "addiu %[address1], %[address1], -32 \n\t" 98 "shll_s.w %[address1], %[address1], 26 \n\t" 99 "subu %[address2], %[address2], %[m] \n\t" 100 "sra %[address2], %[address2], 5 \n\t" 101 "sra %[address1], %[address1], 26 \n\t" 102 "addiu %[address1], %[address1], 32 \n\t" 103 "lbux %[address1], %[address1](%[bap_tab]) \n\t" 104 "addiu %[address2], %[address2], -32 \n\t" 105 "shll_s.w %[address2], %[address2], 26 \n\t" 106 "sb %[address1], 0(%[bap1]) \n\t" 107 "slt %[cond], %[psd1], %[psd_end] \n\t" 108 "sra %[address2], %[address2], 26 \n\t" 109 "addiu %[address2], %[address2], 32 \n\t" 110 "lbux %[address2], %[address2](%[bap_tab]) \n\t" 111 "sb %[address2], 1(%[bap1]) \n\t" 113 "bnez %[cond], 2b \n\t" 114 PTR_ADDIU " %[psd_end], %[psd_end], 2 \n\t" 115 "slt %[cond], %[psd1], %[psd_end] \n\t" 116 "beqz %[cond], 3f \n\t" 118 "lh %[address1], 0(%[psd1]) \n\t" 120 "subu %[address1], %[address1], %[m] \n\t" 121 "sra %[address1], %[address1], 5 \n\t" 122 "addiu %[address1], %[address1], -32 \n\t" 123 "shll_s.w %[address1], %[address1], 26 \n\t" 124 "sra %[address1], %[address1], 26 \n\t" 125 "addiu %[address1], %[address1], 32 \n\t" 126 "lbux %[address1], %[address1](%[bap_tab]) \n\t" 127 "sb %[address1], 0(%[bap1]) \n\t" 131 : [address1]
"=&r"(address1), [address2]
"=&r"(address2),
132 [
cond]
"=&r"(
cond), [bap1]
"+r"(bap1),
133 [psd1]
"+r"(psd1), [psd_end]
"+r"(psd_end)
134 : [m]
"r"(m), [bap_tab]
"r"(bap_tab)
137 }
while (end > band_end);
140 static void ac3_update_bap_counts_mips(uint16_t mant_cnt[16],
uint8_t *bap,
143 void *temp0, *temp2, *temp4, *temp5, *temp6, *temp7;
147 "andi %[temp3], %[len], 3 \n\t" 148 PTR_ADDU "%[temp2], %[bap], %[len] \n\t" 149 PTR_ADDU "%[temp4], %[bap], %[temp3] \n\t" 150 "beq %[temp2], %[temp4], 4f \n\t" 152 "lbu %[temp0], -1(%[temp2]) \n\t" 153 "lbu %[temp5], -2(%[temp2]) \n\t" 154 "lbu %[temp6], -3(%[temp2]) \n\t" 155 "sll %[temp0], %[temp0], 1 \n\t" 156 PTR_ADDU "%[temp0], %[mant_cnt], %[temp0] \n\t" 157 "sll %[temp5], %[temp5], 1 \n\t" 158 PTR_ADDU "%[temp5], %[mant_cnt], %[temp5] \n\t" 159 "lhu %[temp1], 0(%[temp0]) \n\t" 160 "sll %[temp6], %[temp6], 1 \n\t" 161 PTR_ADDU "%[temp6], %[mant_cnt], %[temp6] \n\t" 162 "addiu %[temp1], %[temp1], 1 \n\t" 163 "sh %[temp1], 0(%[temp0]) \n\t" 164 "lhu %[temp1], 0(%[temp5]) \n\t" 165 "lbu %[temp7], -4(%[temp2]) \n\t" 167 "addiu %[temp1], %[temp1], 1 \n\t" 168 "sh %[temp1], 0(%[temp5]) \n\t" 169 "lhu %[temp1], 0(%[temp6]) \n\t" 170 "sll %[temp7], %[temp7], 1 \n\t" 171 PTR_ADDU "%[temp7], %[mant_cnt], %[temp7] \n\t" 172 "addiu %[temp1], %[temp1],1 \n\t" 173 "sh %[temp1], 0(%[temp6]) \n\t" 174 "lhu %[temp1], 0(%[temp7]) \n\t" 175 "addiu %[temp1], %[temp1], 1 \n\t" 176 "sh %[temp1], 0(%[temp7]) \n\t" 177 "bne %[temp2], %[temp4], 1b \n\t" 179 "beqz %[temp3], 2f \n\t" 181 "addiu %[temp3], %[temp3], -1 \n\t" 182 "lbu %[temp0], -1(%[temp2]) \n\t" 184 "sll %[temp0], %[temp0], 1 \n\t" 185 PTR_ADDU "%[temp0], %[mant_cnt], %[temp0] \n\t" 186 "lhu %[temp1], 0(%[temp0]) \n\t" 187 "addiu %[temp1], %[temp1], 1 \n\t" 188 "sh %[temp1], 0(%[temp0]) \n\t" 189 "bgtz %[temp3], 3b \n\t" 192 : [temp0]
"=&r" (temp0), [temp1]
"=&r" (temp1),
193 [temp2]
"=&r" (temp2), [temp3]
"=&r" (temp3),
194 [temp4]
"=&r" (temp4), [temp5]
"=&r" (temp5),
195 [temp6]
"=&r" (temp6), [temp7]
"=&r" (temp7)
196 : [
len]
"r" (
len), [bap]
"r" (bap),
197 [mant_cnt]
"r" (mant_cnt)
204 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 205 static void float_to_fixed24_mips(
int32_t *dst,
const float *
src,
unsigned int len)
207 const float scale = 1 << 24;
208 float src0,
src1, src2, src3, src4, src5, src6, src7;
209 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
213 "lwc1 %[src0], 0(%[src]) \n\t" 214 "lwc1 %[src1], 4(%[src]) \n\t" 215 "lwc1 %[src2], 8(%[src]) \n\t" 216 "lwc1 %[src3], 12(%[src]) \n\t" 217 "lwc1 %[src4], 16(%[src]) \n\t" 218 "lwc1 %[src5], 20(%[src]) \n\t" 219 "lwc1 %[src6], 24(%[src]) \n\t" 220 "lwc1 %[src7], 28(%[src]) \n\t" 221 "mul.s %[src0], %[src0], %[scale] \n\t" 222 "mul.s %[src1], %[src1], %[scale] \n\t" 223 "mul.s %[src2], %[src2], %[scale] \n\t" 224 "mul.s %[src3], %[src3], %[scale] \n\t" 225 "mul.s %[src4], %[src4], %[scale] \n\t" 226 "mul.s %[src5], %[src5], %[scale] \n\t" 227 "mul.s %[src6], %[src6], %[scale] \n\t" 228 "mul.s %[src7], %[src7], %[scale] \n\t" 229 "cvt.w.s %[src0], %[src0] \n\t" 230 "cvt.w.s %[src1], %[src1] \n\t" 231 "cvt.w.s %[src2], %[src2] \n\t" 232 "cvt.w.s %[src3], %[src3] \n\t" 233 "cvt.w.s %[src4], %[src4] \n\t" 234 "cvt.w.s %[src5], %[src5] \n\t" 235 "cvt.w.s %[src6], %[src6] \n\t" 236 "cvt.w.s %[src7], %[src7] \n\t" 237 "mfc1 %[temp0], %[src0] \n\t" 238 "mfc1 %[temp1], %[src1] \n\t" 239 "mfc1 %[temp2], %[src2] \n\t" 240 "mfc1 %[temp3], %[src3] \n\t" 241 "mfc1 %[temp4], %[src4] \n\t" 242 "mfc1 %[temp5], %[src5] \n\t" 243 "mfc1 %[temp6], %[src6] \n\t" 244 "mfc1 %[temp7], %[src7] \n\t" 245 "sw %[temp0], 0(%[dst]) \n\t" 246 "sw %[temp1], 4(%[dst]) \n\t" 247 "sw %[temp2], 8(%[dst]) \n\t" 248 "sw %[temp3], 12(%[dst]) \n\t" 249 "sw %[temp4], 16(%[dst]) \n\t" 250 "sw %[temp5], 20(%[dst]) \n\t" 251 "sw %[temp6], 24(%[dst]) \n\t" 252 "sw %[temp7], 28(%[dst]) \n\t" 254 : [dst]
"+r" (dst), [src]
"+r" (src),
255 [
src0]
"=&f" (
src0), [src1]
"=&f" (src1),
256 [src2]
"=&f" (src2), [src3]
"=&f" (src3),
257 [src4]
"=&f" (src4), [src5]
"=&f" (src5),
258 [src6]
"=&f" (src6), [src7]
"=&f" (src7),
259 [temp0]
"=r" (temp0), [temp1]
"=r" (temp1),
260 [temp2]
"=r" (temp2), [temp3]
"=r" (temp3),
261 [temp4]
"=r" (temp4), [temp5]
"=r" (temp5),
262 [temp6]
"=r" (temp6), [temp7]
"=r" (temp7)
263 : [scale]
"f" (scale)
272 static void ac3_downmix_mips(
float **
samples,
float (*matrix)[2],
273 int out_ch,
int in_ch,
int len)
275 int i, j, i1, i2, i3;
276 float v0, v1, v2, v3;
277 float v4, v5, v6, v7;
278 float samples0, samples1, samples2, samples3, matrix_j, matrix_j2;
279 float *samples_p, *samples_sw, *matrix_p, **samples_x, **samples_end;
283 ".set noreorder \n\t" 287 "move %[i], $zero \n\t" 288 "sll %[j], %[in_ch], " PTRLOG " \n\t" 290 "bne %[out_ch], %[i1], 3f \n\t" 294 "move %[matrix_p], %[matrix] \n\t" 295 "move %[samples_x], %[samples] \n\t" 296 "mtc1 $zero, %[v0] \n\t" 297 "mtc1 $zero, %[v1] \n\t" 298 "mtc1 $zero, %[v2] \n\t" 299 "mtc1 $zero, %[v3] \n\t" 300 "mtc1 $zero, %[v4] \n\t" 301 "mtc1 $zero, %[v5] \n\t" 302 "mtc1 $zero, %[v6] \n\t" 303 "mtc1 $zero, %[v7] \n\t" 304 "addiu %[i1], %[i], 4 \n\t" 305 "addiu %[i2], %[i], 8 \n\t" 306 PTR_L " %[samples_p], 0(%[samples_x]) \n\t" 307 "addiu %[i3], %[i], 12 \n\t" 308 PTR_ADDU "%[samples_end],%[samples_x], %[j] \n\t" 309 "move %[samples_sw], %[samples_p] \n\t" 312 "lwc1 %[matrix_j], 0(%[matrix_p]) \n\t" 313 "lwc1 %[matrix_j2], 4(%[matrix_p]) \n\t" 314 "lwxc1 %[samples0], %[i](%[samples_p]) \n\t" 315 "lwxc1 %[samples1], %[i1](%[samples_p]) \n\t" 316 "lwxc1 %[samples2], %[i2](%[samples_p]) \n\t" 317 "lwxc1 %[samples3], %[i3](%[samples_p]) \n\t" 320 "madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t" 321 "madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t" 322 "madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t" 323 "madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t" 324 "madd.s %[v4], %[v4], %[samples0], %[matrix_j2]\n\t" 325 "madd.s %[v5], %[v5], %[samples1], %[matrix_j2]\n\t" 326 "madd.s %[v6], %[v6], %[samples2], %[matrix_j2]\n\t" 327 "madd.s %[v7], %[v7], %[samples3], %[matrix_j2]\n\t" 328 "bne %[samples_x], %[samples_end], 1b \n\t" 329 PTR_L " %[samples_p], 0(%[samples_x]) \n\t" 332 "swxc1 %[v0], %[i](%[samples_sw]) \n\t" 333 "swxc1 %[v1], %[i1](%[samples_sw]) \n\t" 334 "swxc1 %[v2], %[i2](%[samples_sw]) \n\t" 335 "swxc1 %[v3], %[i3](%[samples_sw]) \n\t" 336 "swxc1 %[v4], %[i](%[samples_p]) \n\t" 337 "addiu %[i], 16 \n\t" 338 "swxc1 %[v5], %[i1](%[samples_p]) \n\t" 339 "swxc1 %[v6], %[i2](%[samples_p]) \n\t" 340 "bne %[i], %[len], 2b \n\t" 341 " swxc1 %[v7], %[i3](%[samples_p]) \n\t" 344 "bne %[out_ch], %[i2], 6f \n\t" 348 "move %[matrix_p], %[matrix] \n\t" 349 "move %[samples_x], %[samples] \n\t" 350 "mtc1 $zero, %[v0] \n\t" 351 "mtc1 $zero, %[v1] \n\t" 352 "mtc1 $zero, %[v2] \n\t" 353 "mtc1 $zero, %[v3] \n\t" 354 "addiu %[i1], %[i], 4 \n\t" 355 "addiu %[i2], %[i], 8 \n\t" 356 PTR_L " %[samples_p], 0(%[samples_x]) \n\t" 357 "addiu %[i3], %[i], 12 \n\t" 358 PTR_ADDU "%[samples_end],%[samples_x], %[j] \n\t" 359 "move %[samples_sw], %[samples_p] \n\t" 362 "lwc1 %[matrix_j], 0(%[matrix_p]) \n\t" 363 "lwxc1 %[samples0], %[i](%[samples_p]) \n\t" 364 "lwxc1 %[samples1], %[i1](%[samples_p]) \n\t" 365 "lwxc1 %[samples2], %[i2](%[samples_p]) \n\t" 366 "lwxc1 %[samples3], %[i3](%[samples_p]) \n\t" 369 "madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t" 370 "madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t" 371 "madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t" 372 "madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t" 373 "bne %[samples_x], %[samples_end], 4b \n\t" 374 PTR_L " %[samples_p], 0(%[samples_x]) \n\t" 376 "swxc1 %[v0], %[i](%[samples_sw]) \n\t" 377 "addiu %[i], 16 \n\t" 378 "swxc1 %[v1], %[i1](%[samples_sw]) \n\t" 379 "swxc1 %[v2], %[i2](%[samples_sw]) \n\t" 380 "bne %[i], %[len], 5b \n\t" 381 " swxc1 %[v3], %[i3](%[samples_sw]) \n\t" 385 :[samples_p]
"=&r"(samples_p), [matrix_j]
"=&f"(matrix_j), [matrix_j2]
"=&f"(matrix_j2),
386 [samples0]
"=&f"(samples0), [samples1]
"=&f"(samples1),
387 [samples2]
"=&f"(samples2), [samples3]
"=&f"(samples3),
388 [v0]
"=&f"(v0), [v1]
"=&f"(v1), [v2]
"=&f"(v2), [v3]
"=&f"(v3),
389 [v4]
"=&f"(v4), [v5]
"=&f"(v5), [v6]
"=&f"(v6), [v7]
"=&f"(v7),
390 [samples_x]
"=&r"(samples_x), [matrix_p]
"=&r"(matrix_p),
391 [samples_end]
"=&r"(samples_end), [samples_sw]
"=&r"(samples_sw),
392 [i1]
"=&r"(i1), [i2]
"=&r"(i2), [i3]
"=&r"(i3), [
i]
"=&r"(
i),
393 [j]
"=&r"(j), [
len]
"+r"(
len)
394 :[samples]
"r"(samples), [matrix]
"r"(matrix),
395 [in_ch]
"r"(in_ch), [out_ch]
"r"(out_ch)
410 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 MIPS assembly defines from sys/asm.h but rewritten for use with C inline assembly (rather than from w...
void(* update_bap_counts)(uint16_t mant_cnt[16], uint8_t *bap, int len)
Update bap counts using the supplied array of bap.
static __device__ float floor(float a)
const uint8_t ff_ac3_bin_to_band_tab[253]
Map each frequency coefficient bin to the critical band that contains it.
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
void(* bit_alloc_calc_bap)(int16_t *mask, int16_t *psd, int start, int end, int snr_offset, int floor, const uint8_t *bap_tab, uint8_t *bap)
Calculate bit allocation pointers.
static const uint16_t mask[17]
static const uint8_t bap_tab[64]
const uint8_t ff_ac3_band_start_tab[AC3_CRITICAL_BANDS+1]
Starting frequency coefficient bin for each critical band.
void ff_ac3dsp_init_mips(AC3DSPContext *c, int bit_exact)
int(* cond)(enum AVPixelFormat pix_fmt)
__asm__(".macro parse_r var r\n\t""\\var = -1\n\t"_IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)".iflt \\var\n\t"".error \"Unable to parse register name \\r\"\n\t"".endif\n\t"".endm")
Filter the word “frame” indicates either a video frame or a group of audio samples
Common code between the AC-3 encoder and decoder.
void(* float_to_fixed24)(int32_t *dst, const float *src, unsigned int len)
Convert an array of float in range [-1.0,1.0] to int32_t with range [-(1<<24),(1<<24)].