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cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stdint.h>
20 
21 #include "cpu.h"
22 #include "cpu_internal.h"
23 #include "config.h"
24 #include "opt.h"
25 #include "common.h"
26 
27 #if HAVE_SCHED_GETAFFINITY
28 #ifndef _GNU_SOURCE
29 # define _GNU_SOURCE
30 #endif
31 #include <sched.h>
32 #endif
33 #if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
34 #include <windows.h>
35 #endif
36 #if HAVE_SYSCTL
37 #if HAVE_SYS_PARAM_H
38 #include <sys/param.h>
39 #endif
40 #include <sys/types.h>
41 #include <sys/sysctl.h>
42 #endif
43 #if HAVE_UNISTD_H
44 #include <unistd.h>
45 #endif
46 
47 static int flags, checked;
48 
50  if ( (arg & ( AV_CPU_FLAG_3DNOW |
67  && !(arg & AV_CPU_FLAG_MMX)) {
68  av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
69  arg |= AV_CPU_FLAG_MMX;
70  }
71 
72  flags = arg;
73  checked = arg != -1;
74 }
75 
77 {
78  if (checked)
79  return flags;
80 
81  if (ARCH_AARCH64)
83  if (ARCH_ARM)
85  if (ARCH_PPC)
87  if (ARCH_X86)
89 
90  checked = 1;
91  return flags;
92 }
93 
95 {
96  checked = 0;
98  checked = 1;
99 }
100 
101 int av_parse_cpu_flags(const char *s)
102 {
103 #define CPUFLAG_MMXEXT (AV_CPU_FLAG_MMX | AV_CPU_FLAG_MMXEXT | AV_CPU_FLAG_CMOV)
104 #define CPUFLAG_3DNOW (AV_CPU_FLAG_3DNOW | AV_CPU_FLAG_MMX)
105 #define CPUFLAG_3DNOWEXT (AV_CPU_FLAG_3DNOWEXT | CPUFLAG_3DNOW)
106 #define CPUFLAG_SSE (AV_CPU_FLAG_SSE | CPUFLAG_MMXEXT)
107 #define CPUFLAG_SSE2 (AV_CPU_FLAG_SSE2 | CPUFLAG_SSE)
108 #define CPUFLAG_SSE2SLOW (AV_CPU_FLAG_SSE2SLOW | CPUFLAG_SSE2)
109 #define CPUFLAG_SSE3 (AV_CPU_FLAG_SSE3 | CPUFLAG_SSE2)
110 #define CPUFLAG_SSE3SLOW (AV_CPU_FLAG_SSE3SLOW | CPUFLAG_SSE3)
111 #define CPUFLAG_SSSE3 (AV_CPU_FLAG_SSSE3 | CPUFLAG_SSE3)
112 #define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
113 #define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
114 #define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
115 #define CPUFLAG_AVXSLOW (AV_CPU_FLAG_AVXSLOW | CPUFLAG_AVX)
116 #define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
117 #define CPUFLAG_FMA3 (AV_CPU_FLAG_FMA3 | CPUFLAG_AVX)
118 #define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
119 #define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX)
120 #define CPUFLAG_BMI2 (AV_CPU_FLAG_BMI2 | AV_CPU_FLAG_BMI1)
121 #define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)
122  static const AVOption cpuflags_opts[] = {
123  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
124 #if ARCH_PPC
125  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
126 #elif ARCH_X86
127  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
128  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_MMXEXT }, .unit = "flags" },
129  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE }, .unit = "flags" },
130  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2 }, .unit = "flags" },
131  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2SLOW }, .unit = "flags" },
132  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3 }, .unit = "flags" },
133  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3SLOW }, .unit = "flags" },
134  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSSE3 }, .unit = "flags" },
135  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
136  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },
137  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },
138  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },
139  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVXSLOW }, .unit = "flags" },
140  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },
141  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA3 }, .unit = "flags" },
142  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },
143  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX2 }, .unit = "flags" },
144  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
145  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_BMI2 }, .unit = "flags" },
146  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" },
147  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" },
148  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
149  { "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI }, .unit = "flags" },
150 #elif ARCH_ARM
151  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
152  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
153  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
154  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
155  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
156  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
157  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
158 #elif ARCH_AARCH64
159  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
160  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
161  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
162 #endif
163  { NULL },
164  };
165  static const AVClass class = {
166  .class_name = "cpuflags",
167  .item_name = av_default_item_name,
168  .option = cpuflags_opts,
169  .version = LIBAVUTIL_VERSION_INT,
170  };
171 
172  int flags = 0, ret;
173  const AVClass *pclass = &class;
174 
175  if ((ret = av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, &flags)) < 0)
176  return ret;
177 
178  return flags & INT_MAX;
179 }
180 
181 int av_parse_cpu_caps(unsigned *flags, const char *s)
182 {
183  static const AVOption cpuflags_opts[] = {
184  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
185 #if ARCH_PPC
186  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
187 #elif ARCH_X86
188  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
189  { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
190  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
191  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
192  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
193  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
194  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
195  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
196  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
197  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
198  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
199  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
200  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
201  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
202  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
203  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
204  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
205  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
206  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
207  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
208  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
209  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
210  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
211  { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
212 
213 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
214 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
215 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
216  { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
217  { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
218  { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
219 
220 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
221 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
222 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
223 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
224  { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
225  { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
226  { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
227  { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
228  { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
229 #elif ARCH_ARM
230  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
231  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
232  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
233  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
234  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
235  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
236  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
237  { "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
238 #elif ARCH_AARCH64
239  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
240  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
241  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
242 #endif
243  { NULL },
244  };
245  static const AVClass class = {
246  .class_name = "cpuflags",
247  .item_name = av_default_item_name,
248  .option = cpuflags_opts,
249  .version = LIBAVUTIL_VERSION_INT,
250  };
251  const AVClass *pclass = &class;
252 
253  return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
254 }
255 
256 int av_cpu_count(void)
257 {
258  static volatile int printed;
259 
260  int nb_cpus = 1;
261 #if HAVE_WINRT
262  SYSTEM_INFO sysinfo;
263 #endif
264 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
265  cpu_set_t cpuset;
266 
267  CPU_ZERO(&cpuset);
268 
269  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
270  nb_cpus = CPU_COUNT(&cpuset);
271 #elif HAVE_GETPROCESSAFFINITYMASK
272  DWORD_PTR proc_aff, sys_aff;
273  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
274  nb_cpus = av_popcount64(proc_aff);
275 #elif HAVE_SYSCTL && defined(HW_NCPU)
276  int mib[2] = { CTL_HW, HW_NCPU };
277  size_t len = sizeof(nb_cpus);
278 
279  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
280  nb_cpus = 0;
281 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
282  nb_cpus = sysconf(_SC_NPROC_ONLN);
283 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
284  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
285 #elif HAVE_WINRT
286  GetNativeSystemInfo(&sysinfo);
287  nb_cpus = sysinfo.dwNumberOfProcessors;
288 #endif
289 
290  if (!printed) {
291  av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
292  printed = 1;
293  }
294 
295  return nb_cpus;
296 }
297 
298 #ifdef TEST
299 
300 #include <stdio.h>
301 #include "avstring.h"
302 
303 #if !HAVE_GETOPT
304 #include "compat/getopt.c"
305 #endif
306 
307 static const struct {
308  int flag;
309  const char *name;
310 } cpu_flag_tab[] = {
311 #if ARCH_AARCH64
312  { AV_CPU_FLAG_ARMV8, "armv8" },
313  { AV_CPU_FLAG_NEON, "neon" },
314  { AV_CPU_FLAG_VFP, "vfp" },
315 #elif ARCH_ARM
316  { AV_CPU_FLAG_ARMV5TE, "armv5te" },
317  { AV_CPU_FLAG_ARMV6, "armv6" },
318  { AV_CPU_FLAG_ARMV6T2, "armv6t2" },
319  { AV_CPU_FLAG_VFP, "vfp" },
320  { AV_CPU_FLAG_VFP_VM, "vfp_vm" },
321  { AV_CPU_FLAG_VFPV3, "vfpv3" },
322  { AV_CPU_FLAG_NEON, "neon" },
323  { AV_CPU_FLAG_SETEND, "setend" },
324 #elif ARCH_PPC
325  { AV_CPU_FLAG_ALTIVEC, "altivec" },
326 #elif ARCH_X86
327  { AV_CPU_FLAG_MMX, "mmx" },
328  { AV_CPU_FLAG_MMXEXT, "mmxext" },
329  { AV_CPU_FLAG_SSE, "sse" },
330  { AV_CPU_FLAG_SSE2, "sse2" },
331  { AV_CPU_FLAG_SSE2SLOW, "sse2slow" },
332  { AV_CPU_FLAG_SSE3, "sse3" },
333  { AV_CPU_FLAG_SSE3SLOW, "sse3slow" },
334  { AV_CPU_FLAG_SSSE3, "ssse3" },
335  { AV_CPU_FLAG_ATOM, "atom" },
336  { AV_CPU_FLAG_SSE4, "sse4.1" },
337  { AV_CPU_FLAG_SSE42, "sse4.2" },
338  { AV_CPU_FLAG_AVX, "avx" },
339  { AV_CPU_FLAG_AVXSLOW, "avxslow" },
340  { AV_CPU_FLAG_XOP, "xop" },
341  { AV_CPU_FLAG_FMA3, "fma3" },
342  { AV_CPU_FLAG_FMA4, "fma4" },
343  { AV_CPU_FLAG_3DNOW, "3dnow" },
344  { AV_CPU_FLAG_3DNOWEXT, "3dnowext" },
345  { AV_CPU_FLAG_CMOV, "cmov" },
346  { AV_CPU_FLAG_AVX2, "avx2" },
347  { AV_CPU_FLAG_BMI1, "bmi1" },
348  { AV_CPU_FLAG_BMI2, "bmi2" },
349  { AV_CPU_FLAG_AESNI, "aesni" },
350 #endif
351  { 0 }
352 };
353 
354 static void print_cpu_flags(int cpu_flags, const char *type)
355 {
356  int i;
357 
358  printf("cpu_flags(%s) = 0x%08X\n", type, cpu_flags);
359  printf("cpu_flags_str(%s) =", type);
360  for (i = 0; cpu_flag_tab[i].flag; i++)
361  if (cpu_flags & cpu_flag_tab[i].flag)
362  printf(" %s", cpu_flag_tab[i].name);
363  printf("\n");
364 }
365 
366 
367 int main(int argc, char **argv)
368 {
369  int cpu_flags_raw = av_get_cpu_flags();
370  int cpu_flags_eff;
371  int cpu_count = av_cpu_count();
372  char threads[5] = "auto";
373  int i;
374 
375  for(i = 0; cpu_flag_tab[i].flag; i++) {
376  unsigned tmp = 0;
377  if (av_parse_cpu_caps(&tmp, cpu_flag_tab[i].name) < 0) {
378  fprintf(stderr, "Table missing %s\n", cpu_flag_tab[i].name);
379  return 4;
380  }
381  }
382 
383  if (cpu_flags_raw < 0)
384  return 1;
385 
386  for (;;) {
387  int c = getopt(argc, argv, "c:t:");
388  if (c == -1)
389  break;
390  switch (c) {
391  case 'c':
392  {
393  unsigned flags = av_get_cpu_flags();
394  if (av_parse_cpu_caps(&flags, optarg) < 0)
395  return 2;
396 
397  av_force_cpu_flags(flags);
398  break;
399  }
400  case 't':
401  {
402  int len = av_strlcpy(threads, optarg, sizeof(threads));
403  if (len >= sizeof(threads)) {
404  fprintf(stderr, "Invalid thread count '%s'\n", optarg);
405  return 2;
406  }
407  }
408  }
409  }
410 
411  cpu_flags_eff = av_get_cpu_flags();
412 
413  if (cpu_flags_eff < 0)
414  return 3;
415 
416  print_cpu_flags(cpu_flags_raw, "raw");
417  print_cpu_flags(cpu_flags_eff, "effective");
418  printf("threads = %s (cpu_count = %d)\n", threads, cpu_count);
419 
420  return 0;
421 }
422 
423 #endif
#define CPUFLAG_3DNOW
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:46
#define NULL
Definition: coverity.c:32
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:56
const char * s
Definition: avisynth_c.h:631
AVOption.
Definition: opt.h:245
int av_cpu_count(void)
Definition: cpu.c:256
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:182
#define LIBAVUTIL_VERSION_INT
Definition: version.h:70
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:33
#define CPUFLAG_SSE3
void av_set_cpu_flags_mask(int mask)
Set a mask on flags returned by av_get_cpu_flags().
Definition: cpu.c:94
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
Definition: cpu.h:31
#define CPUFLAG_SSE4
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:50
#define AV_CPU_FLAG_VFP
Definition: cpu.h:63
#define CPUFLAG_AESNI
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition: log.h:72
static int checked
Definition: cpu.c:47
AVOptions.
#define CPUFLAG_SSE3SLOW
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:52
#define AV_CPU_FLAG_NEON
Definition: cpu.h:65
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:30
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition: cpu.c:48
int av_parse_cpu_flags(const char *s)
Parse CPU flags from a string.
Definition: cpu.c:101
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:42
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:51
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:35
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:48
#define av_log(a,...)
int flag
Definition: checkasm.c:112
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:44
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:41
static const uint16_t mask[17]
Definition: lzw.c:38
av_default_item_name
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
Definition: log.h:197
const char * arg
Definition: jacosubdec.c:66
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:62
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:67
#define CPUFLAG_SSE
size_t av_strlcpy(char *dst, const char *src, size_t size)
Copy the string src to dst, but no more than size - 1 bytes, and null-terminate dst.
Definition: avstring.c:83
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:181
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:60
#define CPUFLAG_SSE2
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:38
int ff_get_cpu_flags_x86(void)
Definition: cpu.c:90
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:54
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:64
#define CPUFLAG_BMI2
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:32
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:61
int ff_get_cpu_flags_aarch64(void)
Definition: cpu.c:23
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:39
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:47
#define CPUFLAG_FMA4
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:53
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:29
#define CPUFLAG_FMA3
static int getopt(int argc, char *argv[], char *opts)
Definition: getopt.c:41
GLint GLenum type
Definition: opengl_enc.c:105
Describe the class of an AVClass context structure.
Definition: log.h:67
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:49
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:43
#define CPUFLAG_AVXSLOW
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:45
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:76
#define CPUFLAG_SSE2SLOW
#define CPUFLAG_XOP
static int flags
Definition: cpu.c:47
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:37
common internal and external API header
static double c[64]
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:66
static char * optarg
Definition: getopt.c:39
#define CPUFLAG_AVX2
int len
DWORD * DWORD_PTR
int ff_get_cpu_flags_arm(void)
Definition: cpu.c:149
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:68
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:34
#define CPUFLAG_3DNOWEXT
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:49
int main(int argc, char **argv)
Definition: main.c:22
#define CPUFLAG_MMXEXT
#define CPUFLAG_AVX
#define CPUFLAG_SSE42
#define CPUFLAG_SSSE3
const char * name
Definition: opengl_enc.c:103