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cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stddef.h>
20 #include <stdint.h>
21 #include <stdatomic.h>
22 
23 #include "attributes.h"
24 #include "cpu.h"
25 #include "cpu_internal.h"
26 #include "config.h"
27 #include "opt.h"
28 #include "common.h"
29 
30 #if HAVE_SCHED_GETAFFINITY
31 #ifndef _GNU_SOURCE
32 # define _GNU_SOURCE
33 #endif
34 #include <sched.h>
35 #endif
36 #if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
37 #include <windows.h>
38 #endif
39 #if HAVE_SYSCTL
40 #if HAVE_SYS_PARAM_H
41 #include <sys/param.h>
42 #endif
43 #include <sys/types.h>
44 #include <sys/sysctl.h>
45 #endif
46 #if HAVE_UNISTD_H
47 #include <unistd.h>
48 #endif
49 
51 
52 static int get_cpu_flags(void)
53 {
54  if (ARCH_AARCH64)
55  return ff_get_cpu_flags_aarch64();
56  if (ARCH_ARM)
57  return ff_get_cpu_flags_arm();
58  if (ARCH_PPC)
59  return ff_get_cpu_flags_ppc();
60  if (ARCH_X86)
61  return ff_get_cpu_flags_x86();
62  return 0;
63 }
64 
66  if (ARCH_X86 &&
67  (arg & ( AV_CPU_FLAG_3DNOW |
85  && !(arg & AV_CPU_FLAG_MMX)) {
86  av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
87  arg |= AV_CPU_FLAG_MMX;
88  }
89 
90  atomic_store_explicit(&cpu_flags, arg, memory_order_relaxed);
91 }
92 
94 {
95  int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
96  if (flags == -1) {
97  flags = get_cpu_flags();
98  atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
99  }
100  return flags;
101 }
102 
104 {
106  memory_order_relaxed);
107 }
108 
109 int av_parse_cpu_flags(const char *s)
110 {
111 #define CPUFLAG_MMXEXT (AV_CPU_FLAG_MMX | AV_CPU_FLAG_MMXEXT | AV_CPU_FLAG_CMOV)
112 #define CPUFLAG_3DNOW (AV_CPU_FLAG_3DNOW | AV_CPU_FLAG_MMX)
113 #define CPUFLAG_3DNOWEXT (AV_CPU_FLAG_3DNOWEXT | CPUFLAG_3DNOW)
114 #define CPUFLAG_SSE (AV_CPU_FLAG_SSE | CPUFLAG_MMXEXT)
115 #define CPUFLAG_SSE2 (AV_CPU_FLAG_SSE2 | CPUFLAG_SSE)
116 #define CPUFLAG_SSE2SLOW (AV_CPU_FLAG_SSE2SLOW | CPUFLAG_SSE2)
117 #define CPUFLAG_SSE3 (AV_CPU_FLAG_SSE3 | CPUFLAG_SSE2)
118 #define CPUFLAG_SSE3SLOW (AV_CPU_FLAG_SSE3SLOW | CPUFLAG_SSE3)
119 #define CPUFLAG_SSSE3 (AV_CPU_FLAG_SSSE3 | CPUFLAG_SSE3)
120 #define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
121 #define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
122 #define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
123 #define CPUFLAG_AVXSLOW (AV_CPU_FLAG_AVXSLOW | CPUFLAG_AVX)
124 #define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
125 #define CPUFLAG_FMA3 (AV_CPU_FLAG_FMA3 | CPUFLAG_AVX)
126 #define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
127 #define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX)
128 #define CPUFLAG_BMI2 (AV_CPU_FLAG_BMI2 | AV_CPU_FLAG_BMI1)
129 #define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)
130 #define CPUFLAG_AVX512 (AV_CPU_FLAG_AVX512 | CPUFLAG_AVX2)
131  static const AVOption cpuflags_opts[] = {
132  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
133 #if ARCH_PPC
134  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
135 #elif ARCH_X86
136  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
137  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_MMXEXT }, .unit = "flags" },
138  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE }, .unit = "flags" },
139  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2 }, .unit = "flags" },
140  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2SLOW }, .unit = "flags" },
141  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3 }, .unit = "flags" },
142  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3SLOW }, .unit = "flags" },
143  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSSE3 }, .unit = "flags" },
144  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
145  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },
146  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },
147  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },
148  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVXSLOW }, .unit = "flags" },
149  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },
150  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA3 }, .unit = "flags" },
151  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },
152  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX2 }, .unit = "flags" },
153  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
154  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_BMI2 }, .unit = "flags" },
155  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" },
156  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" },
157  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
158  { "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI }, .unit = "flags" },
159  { "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX512 }, .unit = "flags" },
160 #elif ARCH_ARM
161  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
162  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
163  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
164  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
165  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
166  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
167  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
168 #elif ARCH_AARCH64
169  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
170  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
171  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
172 #endif
173  { NULL },
174  };
175  static const AVClass class = {
176  .class_name = "cpuflags",
177  .item_name = av_default_item_name,
178  .option = cpuflags_opts,
179  .version = LIBAVUTIL_VERSION_INT,
180  };
181 
182  int flags = 0, ret;
183  const AVClass *pclass = &class;
184 
185  if ((ret = av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, &flags)) < 0)
186  return ret;
187 
188  return flags & INT_MAX;
189 }
190 
191 int av_parse_cpu_caps(unsigned *flags, const char *s)
192 {
193  static const AVOption cpuflags_opts[] = {
194  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
195 #if ARCH_PPC
196  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
197 #elif ARCH_X86
198  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
199  { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
200  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
201  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
202  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
203  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
204  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
205  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
206  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
207  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
208  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
209  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
210  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
211  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
212  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
213  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
214  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
215  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
216  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
217  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
218  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
219  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
220  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
221  { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
222  { "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512 }, .unit = "flags" },
223 
224 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
225 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
226 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
227  { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
228  { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
229  { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
230 
231 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
232 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
233 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
234 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
235  { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
236  { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
237  { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
238  { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
239  { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
240 #elif ARCH_ARM
241  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
242  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
243  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
244  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
245  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
246  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
247  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
248  { "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
249 #elif ARCH_AARCH64
250  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
251  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
252  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
253 #endif
254  { NULL },
255  };
256  static const AVClass class = {
257  .class_name = "cpuflags",
258  .item_name = av_default_item_name,
259  .option = cpuflags_opts,
260  .version = LIBAVUTIL_VERSION_INT,
261  };
262  const AVClass *pclass = &class;
263 
264  return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
265 }
266 
267 int av_cpu_count(void)
268 {
269  static volatile int printed;
270 
271  int nb_cpus = 1;
272 #if HAVE_WINRT
273  SYSTEM_INFO sysinfo;
274 #endif
275 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
276  cpu_set_t cpuset;
277 
278  CPU_ZERO(&cpuset);
279 
280  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
281  nb_cpus = CPU_COUNT(&cpuset);
282 #elif HAVE_GETPROCESSAFFINITYMASK
283  DWORD_PTR proc_aff, sys_aff;
284  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
285  nb_cpus = av_popcount64(proc_aff);
286 #elif HAVE_SYSCTL && defined(HW_NCPU)
287  int mib[2] = { CTL_HW, HW_NCPU };
288  size_t len = sizeof(nb_cpus);
289 
290  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
291  nb_cpus = 0;
292 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
293  nb_cpus = sysconf(_SC_NPROC_ONLN);
294 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
295  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
296 #elif HAVE_WINRT
297  GetNativeSystemInfo(&sysinfo);
298  nb_cpus = sysinfo.dwNumberOfProcessors;
299 #endif
300 
301  if (!printed) {
302  av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
303  printed = 1;
304  }
305 
306  return nb_cpus;
307 }
308 
309 size_t av_cpu_max_align(void)
310 {
311  if (ARCH_AARCH64)
313  if (ARCH_ARM)
314  return ff_get_cpu_max_align_arm();
315  if (ARCH_PPC)
316  return ff_get_cpu_max_align_ppc();
317  if (ARCH_X86)
318  return ff_get_cpu_max_align_x86();
319 
320  return 8;
321 }
#define CPUFLAG_3DNOW
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:49
#define ATOMIC_VAR_INIT(value)
Definition: stdatomic.h:31
#define NULL
Definition: coverity.c:32
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:60
AVOption.
Definition: opt.h:246
int av_cpu_count(void)
Definition: cpu.c:267
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:182
#define LIBAVUTIL_VERSION_INT
Definition: version.h:85
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:35
#define CPUFLAG_SSE3
const char * av_default_item_name(void *ptr)
Return the context name.
Definition: log.c:191
void av_set_cpu_flags_mask(int mask)
Set a mask on flags returned by av_get_cpu_flags().
Definition: cpu.c:103
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
Definition: cpu.h:33
#define CPUFLAG_SSE4
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:53
#define AV_CPU_FLAG_VFP
Definition: cpu.h:67
static atomic_int cpu_flags
Definition: cpu.c:50
intptr_t atomic_int
Definition: stdatomic.h:55
Macro definitions for various function/variable attributes.
#define CPUFLAG_AESNI
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition: log.h:72
size_t av_cpu_max_align(void)
Get the maximum data alignment that may be required by FFmpeg.
Definition: cpu.c:309
AVOptions.
#define CPUFLAG_SSE3SLOW
#define CPUFLAG_AVX512
size_t ff_get_cpu_max_align_x86(void)
Definition: cpu.c:245
size_t ff_get_cpu_max_align_ppc(void)
Definition: cpu.c:152
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:55
size_t ff_get_cpu_max_align_aarch64(void)
Definition: cpu.c:30
#define AV_CPU_FLAG_NEON
Definition: cpu.h:69
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:32
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition: cpu.c:48
int av_parse_cpu_flags(const char *s)
Parse CPU flags from a string.
Definition: cpu.c:109
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:45
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:54
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:37
#define flags(name, subs,...)
Definition: cbs_h2645.c:263
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:51
#define av_log(a,...)
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:47
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:43
static const uint16_t mask[17]
Definition: lzw.c:38
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
Definition: log.h:197
const char * arg
Definition: jacosubdec.c:66
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:66
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
Definition: cpu.h:58
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:71
#define CPUFLAG_SSE
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:191
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:64
#define CPUFLAG_SSE2
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:40
int ff_get_cpu_flags_x86(void)
Definition: cpu.c:90
#define atomic_load_explicit(object, order)
Definition: stdatomic.h:96
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:57
#define s(width, name)
Definition: cbs_vp9.c:257
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:68
#define CPUFLAG_BMI2
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:34
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:65
int ff_get_cpu_flags_aarch64(void)
Definition: cpu.c:23
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:41
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:50
#define CPUFLAG_FMA4
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:56
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:31
#define CPUFLAG_FMA3
Describe the class of an AVClass context structure.
Definition: log.h:67
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:52
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:46
#define CPUFLAG_AVXSLOW
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:48
#define atomic_store_explicit(object, desired, order)
Definition: stdatomic.h:90
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:93
#define CPUFLAG_SSE2SLOW
#define CPUFLAG_XOP
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:39
common internal and external API header
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:70
#define CPUFLAG_AVX2
int len
DWORD * DWORD_PTR
int ff_get_cpu_flags_arm(void)
Definition: cpu.c:149
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:72
static int get_cpu_flags(void)
Definition: cpu.c:52
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:36
#define CPUFLAG_3DNOWEXT
size_t ff_get_cpu_max_align_arm(void)
Definition: cpu.c:162
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:65
#define CPUFLAG_MMXEXT
#define CPUFLAG_AVX
#define CPUFLAG_SSE42
#define CPUFLAG_SSSE3