FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc_sei.h"
27 
28 #include "libavutil/hwcontext_cuda.h"
29 #include "libavutil/hwcontext.h"
30 #include "libavutil/cuda_check.h"
31 #include "libavutil/imgutils.h"
32 #include "libavutil/mem.h"
33 #include "libavutil/pixdesc.h"
34 #include "atsc_a53.h"
35 #include "encode.h"
36 #include "internal.h"
37 #include "packet_internal.h"
38 
39 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
40 
41 #define NVENC_CAP 0x30
42 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
43  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
44  rc == NV_ENC_PARAMS_RC_CBR_HQ)
45 
46 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
47  AV_PIX_FMT_YUV420P,
48  AV_PIX_FMT_NV12,
49  AV_PIX_FMT_P010,
50  AV_PIX_FMT_YUV444P,
51  AV_PIX_FMT_P016, // Truncated to 10bits
52  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
53  AV_PIX_FMT_0RGB32,
54  AV_PIX_FMT_RGB32,
55  AV_PIX_FMT_0BGR32,
56  AV_PIX_FMT_BGR32,
57  AV_PIX_FMT_X2RGB10,
58  AV_PIX_FMT_X2BGR10,
59  AV_PIX_FMT_GBRP,
60  AV_PIX_FMT_GBRP16, // Truncated to 10bits
61  AV_PIX_FMT_CUDA,
62 #if CONFIG_D3D11VA
63  AV_PIX_FMT_D3D11,
64 #endif
65  AV_PIX_FMT_NONE
66 };
67 
68 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
69  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
70  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
71 #if CONFIG_D3D11VA
72  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
73  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
74 #endif
75  NULL,
76 };
77 
78 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
79  pix_fmt == AV_PIX_FMT_P016 || \
80  pix_fmt == AV_PIX_FMT_YUV444P16 || \
81  pix_fmt == AV_PIX_FMT_GBRP16)
82 
83 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
84  pix_fmt == AV_PIX_FMT_YUV444P16 || \
85  pix_fmt == AV_PIX_FMT_GBRP || \
86  pix_fmt == AV_PIX_FMT_GBRP16)
87 
88 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
89  pix_fmt == AV_PIX_FMT_GBRP16)
90 
91 static const struct {
92  NVENCSTATUS nverr;
93  int averr;
94  const char *desc;
95 } nvenc_errors[] = {
96  { NV_ENC_SUCCESS, 0, "success" },
97  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
98  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
99  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
100  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
101  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
102  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
103  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
104  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
105  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
106  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
107  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
108  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
109  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
110  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
111  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
112  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
113  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
114  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
115  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
116  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
117  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
118  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
119  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
120  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
121  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
122 };
123 
124 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
125 {
126  int i;
127  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
128  if (nvenc_errors[i].nverr == err) {
129  if (desc)
130  *desc = nvenc_errors[i].desc;
131  return nvenc_errors[i].averr;
132  }
133  }
134  if (desc)
135  *desc = "unknown error";
136  return AVERROR_UNKNOWN;
137 }
138 
139 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
140  const char *error_string)
141 {
142  const char *desc;
143  const char *details = "(no details)";
144  int ret = nvenc_map_error(err, &desc);
145 
146 #ifdef NVENC_HAVE_GETLASTERRORSTRING
147  NvencContext *ctx = avctx->priv_data;
148  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
149 
150  if (p_nvenc && ctx->nvencoder)
151  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
152 #endif
153 
154  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
155 
156  return ret;
157 }
158 
159 typedef struct GUIDTuple {
160  const GUID guid;
161  int flags;
162 } GUIDTuple;
163 
164 #define PRESET_ALIAS(alias, name, ...) \
165  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
166 
167 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
168 
169 static void nvenc_map_preset(NvencContext *ctx)
170 {
171  GUIDTuple presets[] = {
172 #ifdef NVENC_HAVE_NEW_PRESETS
173  PRESET(P1),
174  PRESET(P2),
175  PRESET(P3),
176  PRESET(P4),
177  PRESET(P5),
178  PRESET(P6),
179  PRESET(P7),
180  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
181  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
182  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
183  // Compat aliases
184  PRESET_ALIAS(DEFAULT, P4, NVENC_DEPRECATED_PRESET),
185  PRESET_ALIAS(HP, P1, NVENC_DEPRECATED_PRESET),
186  PRESET_ALIAS(HQ, P7, NVENC_DEPRECATED_PRESET),
187  PRESET_ALIAS(BD, P5, NVENC_DEPRECATED_PRESET),
188  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
189  PRESET_ALIAS(LOW_LATENCY_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
190  PRESET_ALIAS(LOW_LATENCY_HQ, P7, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
191  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
192  PRESET_ALIAS(LOSSLESS_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
193 #else
194  PRESET(DEFAULT),
195  PRESET(HP),
196  PRESET(HQ),
197  PRESET(BD),
198  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
199  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
200  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
201  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
202  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
203  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
204  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
205  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
206 #endif
207  };
208 
209  GUIDTuple *t = &presets[ctx->preset];
210 
211  ctx->init_encode_params.presetGUID = t->guid;
212  ctx->flags = t->flags;
213 
214 #ifdef NVENC_HAVE_NEW_PRESETS
215  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
216  ctx->flags |= NVENC_LOSSLESS;
217 #endif
218 }
219 
220 #undef PRESET
221 #undef PRESET_ALIAS
222 
223 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
224 {
225 #if NVENCAPI_CHECK_VERSION(11, 2)
226  const char *minver = "(unknown)";
227 #elif NVENCAPI_CHECK_VERSION(11, 1)
228 # if defined(_WIN32) || defined(__CYGWIN__)
229  const char *minver = "471.41";
230 # else
231  const char *minver = "470.57.02";
232 # endif
233 #elif NVENCAPI_CHECK_VERSION(11, 0)
234 # if defined(_WIN32) || defined(__CYGWIN__)
235  const char *minver = "456.71";
236 # else
237  const char *minver = "455.28";
238 # endif
239 #elif NVENCAPI_CHECK_VERSION(10, 0)
240 # if defined(_WIN32) || defined(__CYGWIN__)
241  const char *minver = "450.51";
242 # else
243  const char *minver = "445.87";
244 # endif
245 #elif NVENCAPI_CHECK_VERSION(9, 1)
246 # if defined(_WIN32) || defined(__CYGWIN__)
247  const char *minver = "436.15";
248 # else
249  const char *minver = "435.21";
250 # endif
251 #elif NVENCAPI_CHECK_VERSION(9, 0)
252 # if defined(_WIN32) || defined(__CYGWIN__)
253  const char *minver = "418.81";
254 # else
255  const char *minver = "418.30";
256 # endif
257 #elif NVENCAPI_CHECK_VERSION(8, 2)
258 # if defined(_WIN32) || defined(__CYGWIN__)
259  const char *minver = "397.93";
260 # else
261  const char *minver = "396.24";
262 #endif
263 #elif NVENCAPI_CHECK_VERSION(8, 1)
264 # if defined(_WIN32) || defined(__CYGWIN__)
265  const char *minver = "390.77";
266 # else
267  const char *minver = "390.25";
268 # endif
269 #else
270 # if defined(_WIN32) || defined(__CYGWIN__)
271  const char *minver = "378.66";
272 # else
273  const char *minver = "378.13";
274 # endif
275 #endif
276  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
277 }
278 
279 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
280 {
281  NvencContext *ctx = avctx->priv_data;
282  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
283  NVENCSTATUS err;
284  uint32_t nvenc_max_ver;
285  int ret;
286 
287  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
288  if (ret < 0)
289  return ret;
290 
291  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
292  if (ret < 0) {
293  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
294  return ret;
295  }
296 
297  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
298  if (err != NV_ENC_SUCCESS)
299  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
300 
301  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
302 
303  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
304  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
305  "Required: %d.%d Found: %d.%d\n",
306  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
307  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
308  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
309  return AVERROR(ENOSYS);
310  }
311 
312  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
313 
314  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
315  if (err != NV_ENC_SUCCESS)
316  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
317 
318  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
319 
320  return 0;
321 }
322 
323 static int nvenc_push_context(AVCodecContext *avctx)
324 {
325  NvencContext *ctx = avctx->priv_data;
326  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
327 
328  if (ctx->d3d11_device)
329  return 0;
330 
331  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
332 }
333 
334 static int nvenc_pop_context(AVCodecContext *avctx)
335 {
336  NvencContext *ctx = avctx->priv_data;
337  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
338  CUcontext dummy;
339 
340  if (ctx->d3d11_device)
341  return 0;
342 
343  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
344 }
345 
346 static av_cold int nvenc_open_session(AVCodecContext *avctx)
347 {
348  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
349  NvencContext *ctx = avctx->priv_data;
350  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
351  NVENCSTATUS ret;
352 
353  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
354  params.apiVersion = NVENCAPI_VERSION;
355  if (ctx->d3d11_device) {
356  params.device = ctx->d3d11_device;
357  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
358  } else {
359  params.device = ctx->cu_context;
360  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
361  }
362 
363  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
364  if (ret != NV_ENC_SUCCESS) {
365  ctx->nvencoder = NULL;
366  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
367  }
368 
369  return 0;
370 }
371 
372 static int nvenc_check_codec_support(AVCodecContext *avctx)
373 {
374  NvencContext *ctx = avctx->priv_data;
375  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
376  int i, ret, count = 0;
377  GUID *guids = NULL;
378 
379  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
380 
381  if (ret != NV_ENC_SUCCESS || !count)
382  return AVERROR(ENOSYS);
383 
384  guids = av_malloc(count * sizeof(GUID));
385  if (!guids)
386  return AVERROR(ENOMEM);
387 
388  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
389  if (ret != NV_ENC_SUCCESS) {
390  ret = AVERROR(ENOSYS);
391  goto fail;
392  }
393 
394  ret = AVERROR(ENOSYS);
395  for (i = 0; i < count; i++) {
396  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
397  ret = 0;
398  break;
399  }
400  }
401 
402 fail:
403  av_free(guids);
404 
405  return ret;
406 }
407 
408 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
409 {
410  NvencContext *ctx = avctx->priv_data;
411  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
412  NV_ENC_CAPS_PARAM params = { 0 };
413  int ret, val = 0;
414 
415  params.version = NV_ENC_CAPS_PARAM_VER;
416  params.capsToQuery = cap;
417 
418  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
419 
420  if (ret == NV_ENC_SUCCESS)
421  return val;
422  return 0;
423 }
424 
425 static int nvenc_check_capabilities(AVCodecContext *avctx)
426 {
427  NvencContext *ctx = avctx->priv_data;
428  int ret;
429 
430  ret = nvenc_check_codec_support(avctx);
431  if (ret < 0) {
432  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
433  return ret;
434  }
435 
436  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
437  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
438  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
439  return AVERROR(ENOSYS);
440  }
441 
442  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
443  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
444  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
445  return AVERROR(ENOSYS);
446  }
447 
448  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
449  if (ret < avctx->width) {
450  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
451  avctx->width, ret);
452  return AVERROR(ENOSYS);
453  }
454 
455  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
456  if (ret < avctx->height) {
457  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
458  avctx->height, ret);
459  return AVERROR(ENOSYS);
460  }
461 
462  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
463  if (ret < avctx->max_b_frames) {
464  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
465  avctx->max_b_frames, ret);
466 
467  return AVERROR(ENOSYS);
468  }
469 
470  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
471  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
472  av_log(avctx, AV_LOG_WARNING,
473  "Interlaced encoding is not supported. Supported level: %d\n",
474  ret);
475  return AVERROR(ENOSYS);
476  }
477 
478  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
479  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
480  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
481  return AVERROR(ENOSYS);
482  }
483 
484  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
485  if (ctx->rc_lookahead > 0 && ret <= 0) {
486  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
487  return AVERROR(ENOSYS);
488  }
489 
490  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
491  if (ctx->temporal_aq > 0 && ret <= 0) {
492  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
493  return AVERROR(ENOSYS);
494  }
495 
496  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
497  if (ctx->weighted_pred > 0 && ret <= 0) {
498  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
499  return AVERROR(ENOSYS);
500  }
501 
502  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
503  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
504  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
505  return AVERROR(ENOSYS);
506  }
507 
508 #ifdef NVENC_HAVE_BFRAME_REF_MODE
509  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
510  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
511  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
512  return AVERROR(ENOSYS);
513  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
514  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
515  return AVERROR(ENOSYS);
516  }
517 #else
518  if (ctx->b_ref_mode != 0) {
519  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
520  return AVERROR(ENOSYS);
521  }
522 #endif
523 
524 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
525  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
526  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
527  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
528  return AVERROR(ENOSYS);
529  }
530 #else
531  if(avctx->refs != 0) {
532  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
533  return AVERROR(ENOSYS);
534  }
535 #endif
536 
537 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
538  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
539  if(ctx->single_slice_intra_refresh && ret <= 0) {
540  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
541  return AVERROR(ENOSYS);
542  }
543 #else
544  if(ctx->single_slice_intra_refresh) {
545  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
546  return AVERROR(ENOSYS);
547  }
548 #endif
549 
550  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
551  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
552  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
553  return AVERROR(ENOSYS);
554  }
555 
556 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
557  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
558  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
559  return AVERROR(ENOSYS);
560  }
561 #endif
562 
563  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
564  if(ctx->constrained_encoding && ret <= 0) {
565  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
566  return AVERROR(ENOSYS);
567  }
568 
569  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
570 
571  return 0;
572 }
573 
574 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
575 {
576  NvencContext *ctx = avctx->priv_data;
577  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
578  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
579  char name[128] = { 0};
580  int major, minor, ret;
581  CUdevice cu_device;
582  int loglevel = AV_LOG_VERBOSE;
583 
584  if (ctx->device == LIST_DEVICES)
585  loglevel = AV_LOG_INFO;
586 
587  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
588  if (ret < 0)
589  return ret;
590 
591  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
592  if (ret < 0)
593  return ret;
594 
595  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
596  if (ret < 0)
597  return ret;
598 
599  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
600  if (((major << 4) | minor) < NVENC_CAP) {
601  av_log(avctx, loglevel, "does not support NVENC\n");
602  goto fail;
603  }
604 
605  if (ctx->device != idx && ctx->device != ANY_DEVICE)
606  return -1;
607 
608  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
609  if (ret < 0)
610  goto fail;
611 
612  ctx->cu_context = ctx->cu_context_internal;
613  ctx->cu_stream = NULL;
614 
615  if ((ret = nvenc_pop_context(avctx)) < 0)
616  goto fail2;
617 
618  if ((ret = nvenc_open_session(avctx)) < 0)
619  goto fail2;
620 
621  if ((ret = nvenc_check_capabilities(avctx)) < 0)
622  goto fail3;
623 
624  av_log(avctx, loglevel, "supports NVENC\n");
625 
626  dl_fn->nvenc_device_count++;
627 
628  if (ctx->device == idx || ctx->device == ANY_DEVICE)
629  return 0;
630 
631 fail3:
632  if ((ret = nvenc_push_context(avctx)) < 0)
633  return ret;
634 
635  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
636  ctx->nvencoder = NULL;
637 
638  if ((ret = nvenc_pop_context(avctx)) < 0)
639  return ret;
640 
641 fail2:
642  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
643  ctx->cu_context_internal = NULL;
644 
645 fail:
646  return AVERROR(ENOSYS);
647 }
648 
649 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
650 {
651  NvencContext *ctx = avctx->priv_data;
652  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
653 
654  switch (avctx->codec->id) {
655  case AV_CODEC_ID_H264:
656  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
657  break;
658  case AV_CODEC_ID_HEVC:
659  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
660  break;
661  default:
662  return AVERROR_BUG;
663  }
664 
665  nvenc_map_preset(ctx);
666 
667  if (ctx->flags & NVENC_DEPRECATED_PRESET)
668  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
669 
670  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
671  AVHWFramesContext *frames_ctx;
672  AVHWDeviceContext *hwdev_ctx;
673  AVCUDADeviceContext *cuda_device_hwctx = NULL;
674 #if CONFIG_D3D11VA
675  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
676 #endif
677  int ret;
678 
679  if (avctx->hw_frames_ctx) {
680  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
681  if (frames_ctx->format == AV_PIX_FMT_CUDA)
682  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
683 #if CONFIG_D3D11VA
684  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
685  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
686 #endif
687  else
688  return AVERROR(EINVAL);
689  } else if (avctx->hw_device_ctx) {
690  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
691  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
692  cuda_device_hwctx = hwdev_ctx->hwctx;
693 #if CONFIG_D3D11VA
694  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
695  d3d11_device_hwctx = hwdev_ctx->hwctx;
696 #endif
697  else
698  return AVERROR(EINVAL);
699  } else {
700  return AVERROR(EINVAL);
701  }
702 
703  if (cuda_device_hwctx) {
704  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
705  ctx->cu_stream = cuda_device_hwctx->stream;
706  }
707 #if CONFIG_D3D11VA
708  else if (d3d11_device_hwctx) {
709  ctx->d3d11_device = d3d11_device_hwctx->device;
710  ID3D11Device_AddRef(ctx->d3d11_device);
711  }
712 #endif
713 
714  ret = nvenc_open_session(avctx);
715  if (ret < 0)
716  return ret;
717 
718  ret = nvenc_check_capabilities(avctx);
719  if (ret < 0) {
720  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
721  return ret;
722  }
723  } else {
724  int i, nb_devices = 0;
725 
726  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
727  return AVERROR_UNKNOWN;
728 
729  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
730  return AVERROR_UNKNOWN;
731 
732  if (!nb_devices) {
733  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
734  return AVERROR_EXTERNAL;
735  }
736 
737  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
738 
739  dl_fn->nvenc_device_count = 0;
740  for (i = 0; i < nb_devices; ++i) {
741  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
742  return 0;
743  }
744 
745  if (ctx->device == LIST_DEVICES)
746  return AVERROR_EXIT;
747 
748  if (!dl_fn->nvenc_device_count) {
749  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
750  return AVERROR_EXTERNAL;
751  }
752 
753  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
754  return AVERROR(EINVAL);
755  }
756 
757  return 0;
758 }
759 
760 static av_cold void set_constqp(AVCodecContext *avctx)
761 {
762  NvencContext *ctx = avctx->priv_data;
763  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
764 
765  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
766 
767  if (ctx->init_qp_p >= 0) {
768  rc->constQP.qpInterP = ctx->init_qp_p;
769  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
770  rc->constQP.qpIntra = ctx->init_qp_i;
771  rc->constQP.qpInterB = ctx->init_qp_b;
772  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
773  rc->constQP.qpIntra = av_clip(
774  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
775  rc->constQP.qpInterB = av_clip(
776  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
777  } else {
778  rc->constQP.qpIntra = rc->constQP.qpInterP;
779  rc->constQP.qpInterB = rc->constQP.qpInterP;
780  }
781  } else if (ctx->cqp >= 0) {
782  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
783  if (avctx->b_quant_factor != 0.0)
784  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
785  if (avctx->i_quant_factor != 0.0)
786  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
787  }
788 
789  avctx->qmin = -1;
790  avctx->qmax = -1;
791 }
792 
793 static av_cold void set_vbr(AVCodecContext *avctx)
794 {
795  NvencContext *ctx = avctx->priv_data;
796  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
797  int qp_inter_p;
798 
799  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
800  rc->enableMinQP = 1;
801  rc->enableMaxQP = 1;
802 
803  rc->minQP.qpInterB = avctx->qmin;
804  rc->minQP.qpInterP = avctx->qmin;
805  rc->minQP.qpIntra = avctx->qmin;
806 
807  rc->maxQP.qpInterB = avctx->qmax;
808  rc->maxQP.qpInterP = avctx->qmax;
809  rc->maxQP.qpIntra = avctx->qmax;
810 
811  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
812  } else if (avctx->qmin >= 0) {
813  rc->enableMinQP = 1;
814 
815  rc->minQP.qpInterB = avctx->qmin;
816  rc->minQP.qpInterP = avctx->qmin;
817  rc->minQP.qpIntra = avctx->qmin;
818 
819  qp_inter_p = avctx->qmin;
820  } else {
821  qp_inter_p = 26; // default to 26
822  }
823 
824  rc->enableInitialRCQP = 1;
825 
826  if (ctx->init_qp_p < 0) {
827  rc->initialRCQP.qpInterP = qp_inter_p;
828  } else {
829  rc->initialRCQP.qpInterP = ctx->init_qp_p;
830  }
831 
832  if (ctx->init_qp_i < 0) {
833  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
834  rc->initialRCQP.qpIntra = av_clip(
835  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
836  } else {
837  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
838  }
839  } else {
840  rc->initialRCQP.qpIntra = ctx->init_qp_i;
841  }
842 
843  if (ctx->init_qp_b < 0) {
844  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
845  rc->initialRCQP.qpInterB = av_clip(
846  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
847  } else {
848  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
849  }
850  } else {
851  rc->initialRCQP.qpInterB = ctx->init_qp_b;
852  }
853 }
854 
855 static av_cold void set_lossless(AVCodecContext *avctx)
856 {
857  NvencContext *ctx = avctx->priv_data;
858  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
859 
860  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
861  rc->constQP.qpInterB = 0;
862  rc->constQP.qpInterP = 0;
863  rc->constQP.qpIntra = 0;
864 
865  avctx->qmin = -1;
866  avctx->qmax = -1;
867 }
868 
869 static void nvenc_override_rate_control(AVCodecContext *avctx)
870 {
871  NvencContext *ctx = avctx->priv_data;
872  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
873 
874  switch (ctx->rc) {
875  case NV_ENC_PARAMS_RC_CONSTQP:
876  set_constqp(avctx);
877  return;
878  case NV_ENC_PARAMS_RC_VBR_MINQP:
879  if (avctx->qmin < 0) {
880  av_log(avctx, AV_LOG_WARNING,
881  "The variable bitrate rate-control requires "
882  "the 'qmin' option set.\n");
883  set_vbr(avctx);
884  return;
885  }
886  /* fall through */
887  case NV_ENC_PARAMS_RC_VBR_HQ:
888  case NV_ENC_PARAMS_RC_VBR:
889  set_vbr(avctx);
890  break;
891  case NV_ENC_PARAMS_RC_CBR:
892  case NV_ENC_PARAMS_RC_CBR_HQ:
893  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
894  break;
895  }
896 
897  rc->rateControlMode = ctx->rc;
898 }
899 
900 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
901 {
902  NvencContext *ctx = avctx->priv_data;
903  // default minimum of 4 surfaces
904  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
905  // another multiply by 2 to avoid blocking next PBB group
906  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
907 
908  // lookahead enabled
909  if (ctx->rc_lookahead > 0) {
910  // +1 is to account for lkd_bound calculation later
911  // +4 is to allow sufficient pipelining with lookahead
912  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
913  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
914  {
915  av_log(avctx, AV_LOG_WARNING,
916  "Defined rc_lookahead requires more surfaces, "
917  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
918  }
919  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
920  } else {
921  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
922  {
923  av_log(avctx, AV_LOG_WARNING,
924  "Defined b-frame requires more surfaces, "
925  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
926  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
927  }
928  else if (ctx->nb_surfaces <= 0)
929  ctx->nb_surfaces = nb_surfaces;
930  // otherwise use user specified value
931  }
932 
933  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
934  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
935 
936  return 0;
937 }
938 
939 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
940 {
941  NvencContext *ctx = avctx->priv_data;
942 
943  if (avctx->global_quality > 0)
944  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
945 
946  if (ctx->cqp < 0 && avctx->global_quality > 0)
947  ctx->cqp = avctx->global_quality;
948 
949  if (avctx->bit_rate > 0) {
950  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
951  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
952  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
953  }
954 
955  if (avctx->rc_max_rate > 0)
956  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
957 
958 #ifdef NVENC_HAVE_MULTIPASS
959  ctx->encode_config.rcParams.multiPass = ctx->multipass;
960 
961  if (ctx->flags & NVENC_ONE_PASS)
962  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
963  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
964  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
965 
966  if (ctx->rc < 0) {
967  if (ctx->cbr) {
968  ctx->rc = NV_ENC_PARAMS_RC_CBR;
969  } else if (ctx->cqp >= 0) {
970  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
971  } else if (ctx->quality >= 0.0f) {
972  ctx->rc = NV_ENC_PARAMS_RC_VBR;
973  }
974  }
975 #else
976  if (ctx->rc < 0) {
977  if (ctx->flags & NVENC_ONE_PASS)
978  ctx->twopass = 0;
979  if (ctx->flags & NVENC_TWO_PASSES)
980  ctx->twopass = 1;
981 
982  if (ctx->twopass < 0)
983  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
984 
985  if (ctx->cbr) {
986  if (ctx->twopass) {
987  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
988  } else {
989  ctx->rc = NV_ENC_PARAMS_RC_CBR;
990  }
991  } else if (ctx->cqp >= 0) {
992  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
993  } else if (ctx->twopass) {
994  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
995  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
996  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
997  }
998  }
999 #endif
1000 
1001  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1002  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1003  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1004 
1005  ctx->rc &= ~RC_MODE_DEPRECATED;
1006  }
1007 
1008 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1009  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1010  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1011 #else
1012  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1013  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1014 #endif
1015 
1016 #ifdef NVENC_HAVE_LDKFS
1017  if (ctx->ldkfs)
1018  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1019 #endif
1020 
1021  if (ctx->flags & NVENC_LOSSLESS) {
1022  set_lossless(avctx);
1023  } else if (ctx->rc >= 0) {
1024  nvenc_override_rate_control(avctx);
1025  } else {
1026  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1027  set_vbr(avctx);
1028  }
1029 
1030  if (avctx->rc_buffer_size > 0) {
1031  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1032  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1033  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1034  }
1035 
1036  if (ctx->aq) {
1037  ctx->encode_config.rcParams.enableAQ = 1;
1038  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1039  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1040  }
1041 
1042  if (ctx->temporal_aq) {
1043  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1044  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1045  }
1046 
1047  if (ctx->rc_lookahead > 0) {
1048  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1049  ctx->encode_config.frameIntervalP - 4;
1050 
1051  if (lkd_bound < 0) {
1052  av_log(avctx, AV_LOG_WARNING,
1053  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1054  } else {
1055  ctx->encode_config.rcParams.enableLookahead = 1;
1056  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1057  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1058  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1059  av_log(avctx, AV_LOG_VERBOSE,
1060  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1061  ctx->encode_config.rcParams.lookaheadDepth,
1062  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1063  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1064  }
1065  }
1066 
1067  if (ctx->strict_gop) {
1068  ctx->encode_config.rcParams.strictGOPTarget = 1;
1069  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1070  }
1071 
1072  if (ctx->nonref_p)
1073  ctx->encode_config.rcParams.enableNonRefP = 1;
1074 
1075  if (ctx->zerolatency)
1076  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1077 
1078  if (ctx->quality) {
1079  //convert from float to fixed point 8.8
1080  int tmp_quality = (int)(ctx->quality * 256.0f);
1081  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1082  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1083 
1084  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1085 
1086  //CQ mode shall discard avg bitrate & honor max bitrate;
1087  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1088  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1089  }
1090 }
1091 
1092 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1093 {
1094  NvencContext *ctx = avctx->priv_data;
1095  NV_ENC_CONFIG *cc = &ctx->encode_config;
1096  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1097  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1098 
1099  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1100  vui->colourPrimaries = avctx->color_primaries;
1101  vui->transferCharacteristics = avctx->color_trc;
1102  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1103  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1104 
1105  vui->colourDescriptionPresentFlag =
1106  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1107 
1108  vui->videoSignalTypePresentFlag =
1109  (vui->colourDescriptionPresentFlag
1110  || vui->videoFormat != 5
1111  || vui->videoFullRangeFlag != 0);
1112 
1113  h264->sliceMode = 3;
1114  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1115 
1116  if (ctx->intra_refresh) {
1117  h264->enableIntraRefresh = 1;
1118  h264->intraRefreshPeriod = avctx->gop_size;
1119  h264->intraRefreshCnt = avctx->gop_size - 1;
1120 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1121  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1122 #endif
1123  }
1124 
1125  if (ctx->constrained_encoding)
1126  h264->enableConstrainedEncoding = 1;
1127 
1128  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1129  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1130  h264->outputAUD = ctx->aud;
1131 
1132  if (ctx->dpb_size >= 0) {
1133  /* 0 means "let the hardware decide" */
1134  h264->maxNumRefFrames = ctx->dpb_size;
1135  }
1136 
1137  if (ctx->intra_refresh) {
1138  h264->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1139  } else if (avctx->gop_size >= 0) {
1140  h264->idrPeriod = avctx->gop_size;
1141  }
1142 
1143  if (IS_CBR(cc->rcParams.rateControlMode)) {
1144  h264->outputBufferingPeriodSEI = 1;
1145  }
1146 
1147  h264->outputPictureTimingSEI = 1;
1148 
1149  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1150  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1151  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1152  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1153  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1154  }
1155 
1156  if (ctx->flags & NVENC_LOSSLESS) {
1157  h264->qpPrimeYZeroTransformBypassFlag = 1;
1158  } else {
1159  switch(ctx->profile) {
1160  case NV_ENC_H264_PROFILE_BASELINE:
1161  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1162  avctx->profile = FF_PROFILE_H264_BASELINE;
1163  break;
1164  case NV_ENC_H264_PROFILE_MAIN:
1165  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1166  avctx->profile = FF_PROFILE_H264_MAIN;
1167  break;
1168  case NV_ENC_H264_PROFILE_HIGH:
1169  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1170  avctx->profile = FF_PROFILE_H264_HIGH;
1171  break;
1172  case NV_ENC_H264_PROFILE_HIGH_444P:
1173  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1174  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1175  break;
1176  }
1177  }
1178 
1179  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1180  if (IS_YUV444(ctx->data_pix_fmt)) {
1181  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1182  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1183  }
1184 
1185  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1186 
1187  h264->level = ctx->level;
1188 
1189  if (ctx->coder >= 0)
1190  h264->entropyCodingMode = ctx->coder;
1191 
1192 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1193  h264->useBFramesAsRef = ctx->b_ref_mode;
1194 #endif
1195 
1196 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1197  h264->numRefL0 = avctx->refs;
1198  h264->numRefL1 = avctx->refs;
1199 #endif
1200 
1201  return 0;
1202 }
1203 
1204 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1205 {
1206  NvencContext *ctx = avctx->priv_data;
1207  NV_ENC_CONFIG *cc = &ctx->encode_config;
1208  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1209  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1210 
1211  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1212  vui->colourPrimaries = avctx->color_primaries;
1213  vui->transferCharacteristics = avctx->color_trc;
1214  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1215  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1216 
1217  vui->colourDescriptionPresentFlag =
1218  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1219 
1220  vui->videoSignalTypePresentFlag =
1221  (vui->colourDescriptionPresentFlag
1222  || vui->videoFormat != 5
1223  || vui->videoFullRangeFlag != 0);
1224 
1225  hevc->sliceMode = 3;
1226  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1227 
1228  if (ctx->intra_refresh) {
1229  hevc->enableIntraRefresh = 1;
1230  hevc->intraRefreshPeriod = avctx->gop_size;
1231  hevc->intraRefreshCnt = avctx->gop_size - 1;
1232 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1233  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1234 #endif
1235  }
1236 
1237 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1238  if (ctx->constrained_encoding)
1239  hevc->enableConstrainedEncoding = 1;
1240 #endif
1241 
1242  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1243  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1244  hevc->outputAUD = ctx->aud;
1245 
1246  if (ctx->dpb_size >= 0) {
1247  /* 0 means "let the hardware decide" */
1248  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1249  }
1250 
1251  if (ctx->intra_refresh) {
1252  hevc->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1253  } else if (avctx->gop_size >= 0) {
1254  hevc->idrPeriod = avctx->gop_size;
1255  }
1256 
1257  if (IS_CBR(cc->rcParams.rateControlMode)) {
1258  hevc->outputBufferingPeriodSEI = 1;
1259  }
1260 
1261  hevc->outputPictureTimingSEI = 1;
1262 
1263  switch (ctx->profile) {
1264  case NV_ENC_HEVC_PROFILE_MAIN:
1265  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1266  avctx->profile = FF_PROFILE_HEVC_MAIN;
1267  break;
1268  case NV_ENC_HEVC_PROFILE_MAIN_10:
1269  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1270  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1271  break;
1272  case NV_ENC_HEVC_PROFILE_REXT:
1273  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1274  avctx->profile = FF_PROFILE_HEVC_REXT;
1275  break;
1276  }
1277 
1278  // force setting profile as main10 if input is 10 bit
1279  if (IS_10BIT(ctx->data_pix_fmt)) {
1280  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1281  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1282  }
1283 
1284  // force setting profile as rext if input is yuv444
1285  if (IS_YUV444(ctx->data_pix_fmt)) {
1286  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1287  avctx->profile = FF_PROFILE_HEVC_REXT;
1288  }
1289 
1290  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1291 
1292  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1293 
1294  hevc->level = ctx->level;
1295 
1296  hevc->tier = ctx->tier;
1297 
1298 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1299  hevc->useBFramesAsRef = ctx->b_ref_mode;
1300 #endif
1301 
1302 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1303  hevc->numRefL0 = avctx->refs;
1304  hevc->numRefL1 = avctx->refs;
1305 #endif
1306 
1307  return 0;
1308 }
1309 
1310 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1311 {
1312  switch (avctx->codec->id) {
1313  case AV_CODEC_ID_H264:
1314  return nvenc_setup_h264_config(avctx);
1315  case AV_CODEC_ID_HEVC:
1316  return nvenc_setup_hevc_config(avctx);
1317  /* Earlier switch/case will return if unknown codec is passed. */
1318  }
1319 
1320  return 0;
1321 }
1322 
1323 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1324  int sw, sh;
1325 
1326  sw = avctx->width;
1327  sh = avctx->height;
1328 
1329  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1330  sw *= avctx->sample_aspect_ratio.num;
1331  sh *= avctx->sample_aspect_ratio.den;
1332  }
1333 
1334  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1335 }
1336 
1337 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1338 {
1339  NvencContext *ctx = avctx->priv_data;
1340  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1341  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1342 
1343  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1344  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1345  AVCPBProperties *cpb_props;
1346  int res = 0;
1347  int dw, dh;
1348 
1349  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1350  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1351 
1352  ctx->init_encode_params.encodeHeight = avctx->height;
1353  ctx->init_encode_params.encodeWidth = avctx->width;
1354 
1355  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1356 
1357  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1358  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1359 
1360 #ifdef NVENC_HAVE_NEW_PRESETS
1361  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1362 
1363  if (ctx->flags & NVENC_LOSSLESS)
1364  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1365  else if (ctx->flags & NVENC_LOWLATENCY)
1366  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1367 
1368  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1369  ctx->init_encode_params.encodeGUID,
1370  ctx->init_encode_params.presetGUID,
1371  ctx->init_encode_params.tuningInfo,
1372  &preset_config);
1373 #else
1374  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1375  ctx->init_encode_params.encodeGUID,
1376  ctx->init_encode_params.presetGUID,
1377  &preset_config);
1378 #endif
1379  if (nv_status != NV_ENC_SUCCESS)
1380  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1381 
1382  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1383 
1384  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1385 
1386  compute_dar(avctx, &dw, &dh);
1387  ctx->init_encode_params.darHeight = dh;
1388  ctx->init_encode_params.darWidth = dw;
1389 
1390  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1391  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1392  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1393  } else {
1394  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1395  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1396  }
1397 
1398  ctx->init_encode_params.enableEncodeAsync = 0;
1399  ctx->init_encode_params.enablePTD = 1;
1400 
1401 #ifdef NVENC_HAVE_NEW_PRESETS
1402  /* If lookahead isn't set from CLI, use value from preset.
1403  * P6 & P7 presets may enable lookahead for better quality.
1404  * */
1405  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1406  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1407 #endif
1408 
1409  if (ctx->weighted_pred == 1)
1410  ctx->init_encode_params.enableWeightedPrediction = 1;
1411 
1412  if (ctx->bluray_compat) {
1413  ctx->aud = 1;
1414  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1415  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1416  switch (avctx->codec->id) {
1417  case AV_CODEC_ID_H264:
1418  /* maximum level depends on used resolution */
1419  break;
1420  case AV_CODEC_ID_HEVC:
1421  ctx->level = NV_ENC_LEVEL_HEVC_51;
1422  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1423  break;
1424  }
1425  }
1426 
1427  if (avctx->gop_size > 0) {
1428  if (avctx->max_b_frames >= 0) {
1429  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1430  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1431  }
1432 
1433  ctx->encode_config.gopLength = avctx->gop_size;
1434  } else if (avctx->gop_size == 0) {
1435  ctx->encode_config.frameIntervalP = 0;
1436  ctx->encode_config.gopLength = 1;
1437  }
1438 
1439  /* force to enable intra refresh */
1440  if(ctx->single_slice_intra_refresh)
1441  ctx->intra_refresh = 1;
1442 
1443  if (ctx->intra_refresh)
1444  ctx->encode_config.gopLength = NVENC_INFINITE_GOPLENGTH;
1445 
1446  nvenc_recalc_surfaces(avctx);
1447 
1448  nvenc_setup_rate_control(avctx);
1449 
1450  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1451  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1452  } else {
1453  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1454  }
1455 
1456  res = nvenc_setup_codec_config(avctx);
1457  if (res)
1458  return res;
1459 
1460  res = nvenc_push_context(avctx);
1461  if (res < 0)
1462  return res;
1463 
1464  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1465  if (nv_status != NV_ENC_SUCCESS) {
1466  nvenc_pop_context(avctx);
1467  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1468  }
1469 
1470 #ifdef NVENC_HAVE_CUSTREAM_PTR
1471  if (ctx->cu_context) {
1472  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1473  if (nv_status != NV_ENC_SUCCESS) {
1474  nvenc_pop_context(avctx);
1475  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1476  }
1477  }
1478 #endif
1479 
1480  res = nvenc_pop_context(avctx);
1481  if (res < 0)
1482  return res;
1483 
1484  if (ctx->encode_config.frameIntervalP > 1)
1485  avctx->has_b_frames = 2;
1486 
1487  if (ctx->encode_config.rcParams.averageBitRate > 0)
1488  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1489 
1490  cpb_props = ff_add_cpb_side_data(avctx);
1491  if (!cpb_props)
1492  return AVERROR(ENOMEM);
1493  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1494  cpb_props->avg_bitrate = avctx->bit_rate;
1495  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1496 
1497  return 0;
1498 }
1499 
1500 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1501 {
1502  switch (pix_fmt) {
1503  case AV_PIX_FMT_YUV420P:
1504  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1505  case AV_PIX_FMT_NV12:
1506  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1507  case AV_PIX_FMT_P010:
1508  case AV_PIX_FMT_P016:
1509  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1510  case AV_PIX_FMT_GBRP:
1511  case AV_PIX_FMT_YUV444P:
1512  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1513  case AV_PIX_FMT_GBRP16:
1514  case AV_PIX_FMT_YUV444P16:
1515  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1516  case AV_PIX_FMT_0RGB32:
1517  case AV_PIX_FMT_RGB32:
1518  return NV_ENC_BUFFER_FORMAT_ARGB;
1519  case AV_PIX_FMT_0BGR32:
1520  case AV_PIX_FMT_BGR32:
1521  return NV_ENC_BUFFER_FORMAT_ABGR;
1522  case AV_PIX_FMT_X2RGB10:
1523  return NV_ENC_BUFFER_FORMAT_ARGB10;
1524  case AV_PIX_FMT_X2BGR10:
1525  return NV_ENC_BUFFER_FORMAT_ABGR10;
1526  default:
1527  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1528  }
1529 }
1530 
1531 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1532 {
1533  NvencContext *ctx = avctx->priv_data;
1534  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1535  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1536  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1537 
1538  NVENCSTATUS nv_status;
1539  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1540  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1541 
1542  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1543  ctx->surfaces[idx].in_ref = av_frame_alloc();
1544  if (!ctx->surfaces[idx].in_ref)
1545  return AVERROR(ENOMEM);
1546  } else {
1547  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1548 
1549  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1550  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1551  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1552  av_get_pix_fmt_name(ctx->data_pix_fmt));
1553  return AVERROR(EINVAL);
1554  }
1555 
1556  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1557  allocSurf.width = avctx->width;
1558  allocSurf.height = avctx->height;
1559  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1560 
1561  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1562  if (nv_status != NV_ENC_SUCCESS) {
1563  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1564  }
1565 
1566  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1567  ctx->surfaces[idx].width = allocSurf.width;
1568  ctx->surfaces[idx].height = allocSurf.height;
1569  }
1570 
1571  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1572  if (nv_status != NV_ENC_SUCCESS) {
1573  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1574  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1575  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1576  av_frame_free(&ctx->surfaces[idx].in_ref);
1577  return err;
1578  }
1579 
1580  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1581 
1582  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1583 
1584  return 0;
1585 }
1586 
1587 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1588 {
1589  NvencContext *ctx = avctx->priv_data;
1590  int i, res = 0, res2;
1591 
1592  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1593  if (!ctx->surfaces)
1594  return AVERROR(ENOMEM);
1595 
1596  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces, sizeof(int64_t), 0);
1597  if (!ctx->timestamp_list)
1598  return AVERROR(ENOMEM);
1599 
1600  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1601  if (!ctx->unused_surface_queue)
1602  return AVERROR(ENOMEM);
1603 
1604  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1605  if (!ctx->output_surface_queue)
1606  return AVERROR(ENOMEM);
1607  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1608  if (!ctx->output_surface_ready_queue)
1609  return AVERROR(ENOMEM);
1610 
1611  res = nvenc_push_context(avctx);
1612  if (res < 0)
1613  return res;
1614 
1615  for (i = 0; i < ctx->nb_surfaces; i++) {
1616  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1617  goto fail;
1618  }
1619 
1620 fail:
1621  res2 = nvenc_pop_context(avctx);
1622  if (res2 < 0)
1623  return res2;
1624 
1625  return res;
1626 }
1627 
1628 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1629 {
1630  NvencContext *ctx = avctx->priv_data;
1631  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1632  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1633 
1634  NVENCSTATUS nv_status;
1635  uint32_t outSize = 0;
1636  char tmpHeader[256];
1637  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1638  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1639 
1640  payload.spsppsBuffer = tmpHeader;
1641  payload.inBufferSize = sizeof(tmpHeader);
1642  payload.outSPSPPSPayloadSize = &outSize;
1643 
1644  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1645  if (nv_status != NV_ENC_SUCCESS) {
1646  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1647  }
1648 
1649  avctx->extradata_size = outSize;
1650  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1651 
1652  if (!avctx->extradata) {
1653  return AVERROR(ENOMEM);
1654  }
1655 
1656  memcpy(avctx->extradata, tmpHeader, outSize);
1657 
1658  return 0;
1659 }
1660 
1661 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1662 {
1663  NvencContext *ctx = avctx->priv_data;
1664  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1665  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1666  int i, res;
1667 
1668  /* the encoder has to be flushed before it can be closed */
1669  if (ctx->nvencoder) {
1670  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1671  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1672 
1673  res = nvenc_push_context(avctx);
1674  if (res < 0)
1675  return res;
1676 
1677  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1678  }
1679 
1680  av_fifo_freep2(&ctx->timestamp_list);
1681  av_fifo_freep2(&ctx->output_surface_ready_queue);
1682  av_fifo_freep2(&ctx->output_surface_queue);
1683  av_fifo_freep2(&ctx->unused_surface_queue);
1684 
1685  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1686  for (i = 0; i < ctx->nb_registered_frames; i++) {
1687  if (ctx->registered_frames[i].mapped)
1688  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1689  if (ctx->registered_frames[i].regptr)
1690  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1691  }
1692  ctx->nb_registered_frames = 0;
1693  }
1694 
1695  if (ctx->surfaces) {
1696  for (i = 0; i < ctx->nb_surfaces; ++i) {
1697  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1698  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1699  av_frame_free(&ctx->surfaces[i].in_ref);
1700  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1701  }
1702  }
1703  av_freep(&ctx->surfaces);
1704  ctx->nb_surfaces = 0;
1705 
1706  av_frame_free(&ctx->frame);
1707 
1708  av_freep(&ctx->sei_data);
1709 
1710  if (ctx->nvencoder) {
1711  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1712 
1713  res = nvenc_pop_context(avctx);
1714  if (res < 0)
1715  return res;
1716  }
1717  ctx->nvencoder = NULL;
1718 
1719  if (ctx->cu_context_internal)
1720  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1721  ctx->cu_context = ctx->cu_context_internal = NULL;
1722 
1723 #if CONFIG_D3D11VA
1724  if (ctx->d3d11_device) {
1725  ID3D11Device_Release(ctx->d3d11_device);
1726  ctx->d3d11_device = NULL;
1727  }
1728 #endif
1729 
1730  nvenc_free_functions(&dl_fn->nvenc_dl);
1731  cuda_free_functions(&dl_fn->cuda_dl);
1732 
1733  dl_fn->nvenc_device_count = 0;
1734 
1735  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1736 
1737  return 0;
1738 }
1739 
1740 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1741 {
1742  NvencContext *ctx = avctx->priv_data;
1743  int ret;
1744 
1745  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1746  AVHWFramesContext *frames_ctx;
1747  if (!avctx->hw_frames_ctx) {
1748  av_log(avctx, AV_LOG_ERROR,
1749  "hw_frames_ctx must be set when using GPU frames as input\n");
1750  return AVERROR(EINVAL);
1751  }
1752  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1753  if (frames_ctx->format != avctx->pix_fmt) {
1754  av_log(avctx, AV_LOG_ERROR,
1755  "hw_frames_ctx must match the GPU frame type\n");
1756  return AVERROR(EINVAL);
1757  }
1758  ctx->data_pix_fmt = frames_ctx->sw_format;
1759  } else {
1760  ctx->data_pix_fmt = avctx->pix_fmt;
1761  }
1762 
1763  ctx->frame = av_frame_alloc();
1764  if (!ctx->frame)
1765  return AVERROR(ENOMEM);
1766 
1767  if ((ret = nvenc_load_libraries(avctx)) < 0)
1768  return ret;
1769 
1770  if ((ret = nvenc_setup_device(avctx)) < 0)
1771  return ret;
1772 
1773  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1774  return ret;
1775 
1776  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1777  return ret;
1778 
1779  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1780  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1781  return ret;
1782  }
1783 
1784  return 0;
1785 }
1786 
1787 static NvencSurface *get_free_frame(NvencContext *ctx)
1788 {
1789  NvencSurface *tmp_surf;
1790 
1791  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
1792  // queue empty
1793  return NULL;
1794 
1795  return tmp_surf;
1796 }
1797 
1798 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1799  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1800 {
1801  int dst_linesize[4] = {
1802  lock_buffer_params->pitch,
1803  lock_buffer_params->pitch,
1804  lock_buffer_params->pitch,
1805  lock_buffer_params->pitch
1806  };
1807  uint8_t *dst_data[4];
1808  int ret;
1809 
1810  if (frame->format == AV_PIX_FMT_YUV420P)
1811  dst_linesize[1] = dst_linesize[2] >>= 1;
1812 
1813  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1814  lock_buffer_params->bufferDataPtr, dst_linesize);
1815  if (ret < 0)
1816  return ret;
1817 
1818  if (frame->format == AV_PIX_FMT_YUV420P)
1819  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1820 
1821  av_image_copy(dst_data, dst_linesize,
1822  (const uint8_t**)frame->data, frame->linesize, frame->format,
1823  avctx->width, avctx->height);
1824 
1825  return 0;
1826 }
1827 
1828 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1829 {
1830  NvencContext *ctx = avctx->priv_data;
1831  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1832  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1833  NVENCSTATUS nv_status;
1834 
1835  int i, first_round;
1836 
1837  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1838  for (first_round = 1; first_round >= 0; first_round--) {
1839  for (i = 0; i < ctx->nb_registered_frames; i++) {
1840  if (!ctx->registered_frames[i].mapped) {
1841  if (ctx->registered_frames[i].regptr) {
1842  if (first_round)
1843  continue;
1844  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1845  if (nv_status != NV_ENC_SUCCESS)
1846  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1847  ctx->registered_frames[i].ptr = NULL;
1848  ctx->registered_frames[i].regptr = NULL;
1849  }
1850  return i;
1851  }
1852  }
1853  }
1854  } else {
1855  return ctx->nb_registered_frames++;
1856  }
1857 
1858  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1859  return AVERROR(ENOMEM);
1860 }
1861 
1862 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
1863 {
1864  NvencContext *ctx = avctx->priv_data;
1865  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1866  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1867 
1868  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1869  NV_ENC_REGISTER_RESOURCE reg = { 0 };
1870  int i, idx, ret;
1871 
1872  for (i = 0; i < ctx->nb_registered_frames; i++) {
1873  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1874  return i;
1875  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1876  return i;
1877  }
1878 
1879  idx = nvenc_find_free_reg_resource(avctx);
1880  if (idx < 0)
1881  return idx;
1882 
1883  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1884  reg.width = frames_ctx->width;
1885  reg.height = frames_ctx->height;
1886  reg.pitch = frame->linesize[0];
1887  reg.resourceToRegister = frame->data[0];
1888 
1889  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1890  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1891  }
1892  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1893  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1894  reg.subResourceIndex = (intptr_t)frame->data[1];
1895  }
1896 
1897  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1898  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1899  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1900  av_get_pix_fmt_name(frames_ctx->sw_format));
1901  return AVERROR(EINVAL);
1902  }
1903 
1904  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1905  if (ret != NV_ENC_SUCCESS) {
1906  nvenc_print_error(avctx, ret, "Error registering an input resource");
1907  return AVERROR_UNKNOWN;
1908  }
1909 
1910  ctx->registered_frames[idx].ptr = frame->data[0];
1911  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1912  ctx->registered_frames[idx].regptr = reg.registeredResource;
1913  return idx;
1914 }
1915 
1916 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
1917  NvencSurface *nvenc_frame)
1918 {
1919  NvencContext *ctx = avctx->priv_data;
1920  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1921  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1922 
1923  int res;
1924  NVENCSTATUS nv_status;
1925 
1926  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1927  int reg_idx = nvenc_register_frame(avctx, frame);
1928  if (reg_idx < 0) {
1929  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1930  return reg_idx;
1931  }
1932 
1933  res = av_frame_ref(nvenc_frame->in_ref, frame);
1934  if (res < 0)
1935  return res;
1936 
1937  if (!ctx->registered_frames[reg_idx].mapped) {
1938  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1939  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1940  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1941  if (nv_status != NV_ENC_SUCCESS) {
1942  av_frame_unref(nvenc_frame->in_ref);
1943  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1944  }
1945  }
1946 
1947  ctx->registered_frames[reg_idx].mapped += 1;
1948 
1949  nvenc_frame->reg_idx = reg_idx;
1950  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1951  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1952  nvenc_frame->pitch = frame->linesize[0];
1953 
1954  return 0;
1955  } else {
1956  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1957 
1958  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1959  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1960 
1961  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1962  if (nv_status != NV_ENC_SUCCESS) {
1963  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1964  }
1965 
1966  nvenc_frame->pitch = lockBufferParams.pitch;
1967  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1968 
1969  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1970  if (nv_status != NV_ENC_SUCCESS) {
1971  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1972  }
1973 
1974  return res;
1975  }
1976 }
1977 
1978 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
1979  NV_ENC_PIC_PARAMS *params,
1980  NV_ENC_SEI_PAYLOAD *sei_data,
1981  int sei_count)
1982 {
1983  NvencContext *ctx = avctx->priv_data;
1984 
1985  switch (avctx->codec->id) {
1986  case AV_CODEC_ID_H264:
1987  params->codecPicParams.h264PicParams.sliceMode =
1988  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1989  params->codecPicParams.h264PicParams.sliceModeData =
1990  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1991  if (sei_count > 0) {
1992  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1993  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
1994  }
1995 
1996  break;
1997  case AV_CODEC_ID_HEVC:
1998  params->codecPicParams.hevcPicParams.sliceMode =
1999  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2000  params->codecPicParams.hevcPicParams.sliceModeData =
2001  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2002  if (sei_count > 0) {
2003  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2004  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2005  }
2006 
2007  break;
2008  }
2009 }
2010 
2011 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2012 {
2013  av_fifo_write(queue, &timestamp, 1);
2014 }
2015 
2016 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2017 {
2018  int64_t timestamp = AV_NOPTS_VALUE;
2019  // The following call might fail if the queue is empty.
2020  av_fifo_read(queue, &timestamp, 1);
2021 
2022  return timestamp;
2023 }
2024 
2025 static int nvenc_set_timestamp(AVCodecContext *avctx,
2026  NV_ENC_LOCK_BITSTREAM *params,
2027  AVPacket *pkt)
2028 {
2029  NvencContext *ctx = avctx->priv_data;
2030 
2031  pkt->pts = params->outputTimeStamp;
2032  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2033 
2034  pkt->dts -= FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
2035 
2036  return 0;
2037 }
2038 
2039 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2040 {
2041  NvencContext *ctx = avctx->priv_data;
2042  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2043  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2044 
2045  uint32_t slice_mode_data;
2046  uint32_t *slice_offsets = NULL;
2047  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2048  NVENCSTATUS nv_status;
2049  int res = 0;
2050 
2051  enum AVPictureType pict_type;
2052 
2053  switch (avctx->codec->id) {
2054  case AV_CODEC_ID_H264:
2055  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2056  break;
2057  case AV_CODEC_ID_H265:
2058  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2059  break;
2060  default:
2061  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
2062  res = AVERROR(EINVAL);
2063  goto error;
2064  }
2065  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
2066 
2067  if (!slice_offsets) {
2068  res = AVERROR(ENOMEM);
2069  goto error;
2070  }
2071 
2072  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2073 
2074  lock_params.doNotWait = 0;
2075  lock_params.outputBitstream = tmpoutsurf->output_surface;
2076  lock_params.sliceOffsets = slice_offsets;
2077 
2078  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2079  if (nv_status != NV_ENC_SUCCESS) {
2080  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2081  goto error;
2082  }
2083 
2084  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2085 
2086  if (res < 0) {
2087  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2088  goto error;
2089  }
2090 
2091  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2092 
2093  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2094  if (nv_status != NV_ENC_SUCCESS) {
2095  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2096  goto error;
2097  }
2098 
2099 
2100  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2101  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2102  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2103  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2104  if (nv_status != NV_ENC_SUCCESS) {
2105  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2106  goto error;
2107  }
2108  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2109  res = AVERROR_BUG;
2110  goto error;
2111  }
2112 
2113  av_frame_unref(tmpoutsurf->in_ref);
2114 
2115  tmpoutsurf->input_surface = NULL;
2116  }
2117 
2118  switch (lock_params.pictureType) {
2119  case NV_ENC_PIC_TYPE_IDR:
2120  pkt->flags |= AV_PKT_FLAG_KEY;
2121  case NV_ENC_PIC_TYPE_I:
2122  pict_type = AV_PICTURE_TYPE_I;
2123  break;
2124  case NV_ENC_PIC_TYPE_P:
2125  pict_type = AV_PICTURE_TYPE_P;
2126  break;
2127  case NV_ENC_PIC_TYPE_B:
2128  pict_type = AV_PICTURE_TYPE_B;
2129  break;
2130  case NV_ENC_PIC_TYPE_BI:
2131  pict_type = AV_PICTURE_TYPE_BI;
2132  break;
2133  default:
2134  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2135  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2136  res = AVERROR_EXTERNAL;
2137  goto error;
2138  }
2139 
2140  ff_side_data_set_encoder_stats(pkt,
2141  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2142 
2143  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2144  if (res < 0)
2145  goto error2;
2146 
2147  av_free(slice_offsets);
2148 
2149  return 0;
2150 
2151 error:
2152  timestamp_queue_dequeue(ctx->timestamp_list);
2153 
2154 error2:
2155  av_free(slice_offsets);
2156 
2157  return res;
2158 }
2159 
2160 static int output_ready(AVCodecContext *avctx, int flush)
2161 {
2162  NvencContext *ctx = avctx->priv_data;
2163  int nb_ready, nb_pending;
2164 
2165  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2166  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2167  if (flush)
2168  return nb_ready > 0;
2169  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2170 }
2171 
2172 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2173 {
2174  NvencContext *ctx = avctx->priv_data;
2175  int sei_count = 0;
2176  int i, res;
2177 
2178  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2179  void *a53_data = NULL;
2180  size_t a53_size = 0;
2181 
2182  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2183  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2184  }
2185 
2186  if (a53_data) {
2187  void *tmp = av_fast_realloc(ctx->sei_data,
2188  &ctx->sei_data_size,
2189  (sei_count + 1) * sizeof(*ctx->sei_data));
2190  if (!tmp) {
2191  av_free(a53_data);
2192  res = AVERROR(ENOMEM);
2193  goto error;
2194  } else {
2195  ctx->sei_data = tmp;
2196  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2197  ctx->sei_data[sei_count].payloadType = 4;
2198  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2199  sei_count++;
2200  }
2201  }
2202  }
2203 
2204  if (ctx->s12m_tc && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2205  void *tc_data = NULL;
2206  size_t tc_size = 0;
2207 
2208  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2209  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2210  }
2211 
2212  if (tc_data) {
2213  void *tmp = av_fast_realloc(ctx->sei_data,
2214  &ctx->sei_data_size,
2215  (sei_count + 1) * sizeof(*ctx->sei_data));
2216  if (!tmp) {
2217  av_free(tc_data);
2218  res = AVERROR(ENOMEM);
2219  goto error;
2220  } else {
2221  ctx->sei_data = tmp;
2222  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2223  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2224  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2225  sei_count++;
2226  }
2227  }
2228  }
2229 
2230  if (!ctx->udu_sei)
2231  return sei_count;
2232 
2233  for (i = 0; i < frame->nb_side_data; i++) {
2234  AVFrameSideData *side_data = frame->side_data[i];
2235  void *tmp;
2236 
2237  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2238  continue;
2239 
2240  tmp = av_fast_realloc(ctx->sei_data,
2241  &ctx->sei_data_size,
2242  (sei_count + 1) * sizeof(*ctx->sei_data));
2243  if (!tmp) {
2244  res = AVERROR(ENOMEM);
2245  goto error;
2246  } else {
2247  ctx->sei_data = tmp;
2248  ctx->sei_data[sei_count].payloadSize = side_data->size;
2249  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2250  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2251 
2252  if (!ctx->sei_data[sei_count].payload) {
2253  res = AVERROR(ENOMEM);
2254  goto error;
2255  }
2256 
2257  sei_count++;
2258  }
2259  }
2260 
2261  return sei_count;
2262 
2263 error:
2264  for (i = 0; i < sei_count; i++)
2265  av_freep(&(ctx->sei_data[i].payload));
2266 
2267  return res;
2268 }
2269 
2270 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2271 {
2272  NvencContext *ctx = avctx->priv_data;
2273  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2274  NVENCSTATUS ret;
2275 
2276  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2277  int needs_reconfig = 0;
2278  int needs_encode_config = 0;
2279  int reconfig_bitrate = 0, reconfig_dar = 0;
2280  int dw, dh;
2281 
2282  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2283  params.reInitEncodeParams = ctx->init_encode_params;
2284 
2285  compute_dar(avctx, &dw, &dh);
2286  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2287  av_log(avctx, AV_LOG_VERBOSE,
2288  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2289  ctx->init_encode_params.darWidth,
2290  ctx->init_encode_params.darHeight, dw, dh);
2291 
2292  params.reInitEncodeParams.darHeight = dh;
2293  params.reInitEncodeParams.darWidth = dw;
2294 
2295  needs_reconfig = 1;
2296  reconfig_dar = 1;
2297  }
2298 
2299  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2300  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2301  av_log(avctx, AV_LOG_VERBOSE,
2302  "avg bitrate change: %d -> %d\n",
2303  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2304  (uint32_t)avctx->bit_rate);
2305 
2306  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2307  reconfig_bitrate = 1;
2308  }
2309 
2310  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2311  av_log(avctx, AV_LOG_VERBOSE,
2312  "max bitrate change: %d -> %d\n",
2313  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2314  (uint32_t)avctx->rc_max_rate);
2315 
2316  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2317  reconfig_bitrate = 1;
2318  }
2319 
2320  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2321  av_log(avctx, AV_LOG_VERBOSE,
2322  "vbv buffer size change: %d -> %d\n",
2323  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2324  avctx->rc_buffer_size);
2325 
2326  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2327  reconfig_bitrate = 1;
2328  }
2329 
2330  if (reconfig_bitrate) {
2331  params.resetEncoder = 1;
2332  params.forceIDR = 1;
2333 
2334  needs_encode_config = 1;
2335  needs_reconfig = 1;
2336  }
2337  }
2338 
2339  if (!needs_encode_config)
2340  params.reInitEncodeParams.encodeConfig = NULL;
2341 
2342  if (needs_reconfig) {
2343  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2344  if (ret != NV_ENC_SUCCESS) {
2345  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2346  } else {
2347  if (reconfig_dar) {
2348  ctx->init_encode_params.darHeight = dh;
2349  ctx->init_encode_params.darWidth = dw;
2350  }
2351 
2352  if (reconfig_bitrate) {
2353  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2354  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2355  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2356  }
2357 
2358  }
2359  }
2360 }
2361 
2362 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2363 {
2364  NVENCSTATUS nv_status;
2365  NvencSurface *tmp_out_surf, *in_surf;
2366  int res, res2;
2367  int sei_count = 0;
2368  int i;
2369 
2370  NvencContext *ctx = avctx->priv_data;
2371  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2372  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2373 
2374  NV_ENC_PIC_PARAMS pic_params = { 0 };
2375  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2376 
2377  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2378  return AVERROR(EINVAL);
2379 
2380  if (frame && frame->buf[0]) {
2381  in_surf = get_free_frame(ctx);
2382  if (!in_surf)
2383  return AVERROR(EAGAIN);
2384 
2385  res = nvenc_push_context(avctx);
2386  if (res < 0)
2387  return res;
2388 
2389  reconfig_encoder(avctx, frame);
2390 
2391  res = nvenc_upload_frame(avctx, frame, in_surf);
2392 
2393  res2 = nvenc_pop_context(avctx);
2394  if (res2 < 0)
2395  return res2;
2396 
2397  if (res)
2398  return res;
2399 
2400  pic_params.inputBuffer = in_surf->input_surface;
2401  pic_params.bufferFmt = in_surf->format;
2402  pic_params.inputWidth = in_surf->width;
2403  pic_params.inputHeight = in_surf->height;
2404  pic_params.inputPitch = in_surf->pitch;
2405  pic_params.outputBitstream = in_surf->output_surface;
2406 
2407  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2408  if (frame->top_field_first)
2409  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2410  else
2411  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2412  } else {
2413  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2414  }
2415 
2416  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2417  pic_params.encodePicFlags =
2418  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2419  } else {
2420  pic_params.encodePicFlags = 0;
2421  }
2422 
2423  pic_params.inputTimeStamp = frame->pts;
2424 
2425  if (ctx->extra_sei) {
2426  res = prepare_sei_data_array(avctx, frame);
2427  if (res < 0)
2428  return res;
2429  sei_count = res;
2430  }
2431 
2432  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2433  } else {
2434  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2435  }
2436 
2437  res = nvenc_push_context(avctx);
2438  if (res < 0)
2439  return res;
2440 
2441  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2442 
2443  for (i = 0; i < sei_count; i++)
2444  av_freep(&(ctx->sei_data[i].payload));
2445 
2446  res = nvenc_pop_context(avctx);
2447  if (res < 0)
2448  return res;
2449 
2450  if (nv_status != NV_ENC_SUCCESS &&
2451  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2452  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2453 
2454  if (frame && frame->buf[0]) {
2455  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
2456  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2457  }
2458 
2459  /* all the pending buffers are now ready for output */
2460  if (nv_status == NV_ENC_SUCCESS) {
2461  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
2462  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2463  }
2464 
2465  return 0;
2466 }
2467 
2468 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
2469 {
2470  NvencSurface *tmp_out_surf;
2471  int res, res2;
2472 
2473  NvencContext *ctx = avctx->priv_data;
2474 
2475  AVFrame *frame = ctx->frame;
2476 
2477  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2478  return AVERROR(EINVAL);
2479 
2480  if (!frame->buf[0]) {
2481  res = ff_encode_get_frame(avctx, frame);
2482  if (res < 0 && res != AVERROR_EOF)
2483  return res;
2484  }
2485 
2486  res = nvenc_send_frame(avctx, frame);
2487  if (res < 0) {
2488  if (res != AVERROR(EAGAIN))
2489  return res;
2490  } else
2491  av_frame_unref(frame);
2492 
2493  if (output_ready(avctx, avctx->internal->draining)) {
2494  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2495 
2496  res = nvenc_push_context(avctx);
2497  if (res < 0)
2498  return res;
2499 
2500  res = process_output_surface(avctx, pkt, tmp_out_surf);
2501 
2502  res2 = nvenc_pop_context(avctx);
2503  if (res2 < 0)
2504  return res2;
2505 
2506  if (res)
2507  return res;
2508 
2509  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
2510  } else if (avctx->internal->draining) {
2511  return AVERROR_EOF;
2512  } else {
2513  return AVERROR(EAGAIN);
2514  }
2515 
2516  return 0;
2517 }
2518 
2519 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
2520 {
2521  NvencContext *ctx = avctx->priv_data;
2522 
2523  nvenc_send_frame(avctx, NULL);
2524  av_fifo_reset2(ctx->timestamp_list);
2525 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:31
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1638
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:164
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:225
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:160
level
uint8_t level
Definition: svq3.c:206
av_clip
#define av_clip
Definition: common.h:95
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:966
P3
#define P3
Definition: hevcdsp_template.c:1497
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:684
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:381
GUIDTuple
Definition: nvenc.c:159
NONE
@ NONE
Definition: af_afade.c:56
GUIDTuple::flags
int flags
Definition: nvenc.c:161
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:602
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1586
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:323
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2160
NvencContext
Definition: nvenc.h:153
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:130
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:83
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:111
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:325
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:959
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2025
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:599
P1
#define P1
Definition: cavsdsp.c:39
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:374
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:677
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1598
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2270
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:526
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:46
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:760
NvencSurface
Definition: nvenc.h:80
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:139
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1032
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1185
nverr
NVENCSTATUS nverr
Definition: nvenc.c:92
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:855
PRESET
#define PRESET(name,...)
Definition: nvenc.c:167
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:429
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2519
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:30
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:274
nvenc.h
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:312
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1323
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:1732
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1916
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:99
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:694
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:793
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:124
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:398
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:408
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:179
fail
#define fail()
Definition: checkasm.h:131
dummy
int dummy
Definition: motion.c:65
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:90
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:938
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:169
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:469
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1590
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1798
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:150
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:88
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:223
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:266
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:425
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:99
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:952
pkt
AVPacket * pkt
Definition: movenc.c:59
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:234
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1635
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:491
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:685
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1740
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:505
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:455
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:419
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1331
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:384
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:521
NvencDynLoadFunctions
Definition: nvenc.h:93
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:145
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:134
ctx
AVFormatContext * ctx
Definition: movenc.c:48
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demuxing_decoding.c:41
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1628
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2011
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1214
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2016
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:96
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:104
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:77
NvencSurface::pitch
int pitch
Definition: nvenc.h:87
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:135
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:82
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1199
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:41
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:425
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:78
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:939
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
flush
static void flush(AVCodecContext *avctx)
Definition: aacdec_template.c:606
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:84
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:973
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:424
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:439
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1661
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1636
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:95
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1092
convert_header.major
int major
Definition: convert_header.py:23
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:512
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:460
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:94
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:334
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:94
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:584
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:343
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:372
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:68
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:1072
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1531
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:233
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:574
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1862
AVCodecHWConfigInternal
Definition: hwconfig.h:29
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2468
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:373
height
#define height
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:379
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:869
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:380
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:305
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:119
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1787
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:670
AVCodec::id
enum AVCodecID id
Definition: codec.h:210
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:346
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:97
convert_header.minor
int minor
Definition: convert_header.py:26
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:149
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:140
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:269
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:367
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:490
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2039
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:279
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:900
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:109
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:224
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2172
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:477
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:459
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:264
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1930
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:83
P2
#define P2
Definition: cavsdsp.c:38
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:42
AVCodecContext::height
int height
Definition: avcodec.h:562
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:599
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:39
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1500
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:272
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:456
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1880
NvencSurface::width
int width
Definition: nvenc.h:85
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1337
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:93
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:383
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:125
cuda_check.h
atsc_a53.h
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:1978
AVCodecContext
main external API structure.
Definition: avcodec.h:389
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:79
NvencSurface::height
int height
Definition: nvenc.h:86
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1178
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1547
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1587
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:142
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:701
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:232
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:143
AV_CODEC_ID_H265
#define AV_CODEC_ID_H265
Definition: codec_id.h:225
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:89
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1828
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1588
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
nvenc_errors
static const struct @102 nvenc_errors[]
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:136
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:455
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:125
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:158
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:98
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:661
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:160
packet_internal.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:231
av_free
#define av_free(p)
Definition: tableprint_vlc.h:33
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:989
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: packet.h:351
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:416
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:34
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:649
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:562
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1310
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int
int
Definition: ffmpeg_filter.c:153
hevc_sei.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:759
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1204
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2362
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:141
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2582
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