FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc_sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
31 #include "libavutil/buffer.h"
33 #include "libavutil/hwcontext.h"
34 #include "libavutil/cuda_check.h"
35 #include "libavutil/imgutils.h"
36 #include "libavutil/mem.h"
37 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
39 #include "atsc_a53.h"
40 #include "encode.h"
41 #include "internal.h"
42 #include "packet_internal.h"
43 
44 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
45 
46 #define NVENC_CAP 0x30
47 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
48  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
49  rc == NV_ENC_PARAMS_RC_CBR_HQ)
50 
56  AV_PIX_FMT_P016, // Truncated to 10bits
57  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
65  AV_PIX_FMT_GBRP16, // Truncated to 10bits
67 #if CONFIG_D3D11VA
69 #endif
71 };
72 
74  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
76 #if CONFIG_D3D11VA
77  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
79 #endif
80  NULL,
81 };
82 
83 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
84  pix_fmt == AV_PIX_FMT_P016 || \
85  pix_fmt == AV_PIX_FMT_YUV444P16 || \
86  pix_fmt == AV_PIX_FMT_X2RGB10 || \
87  pix_fmt == AV_PIX_FMT_X2BGR10 || \
88  pix_fmt == AV_PIX_FMT_GBRP16)
89 
90 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
91  pix_fmt == AV_PIX_FMT_YUV444P16 || \
92  pix_fmt == AV_PIX_FMT_GBRP || \
93  pix_fmt == AV_PIX_FMT_GBRP16)
94 
95 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
96  pix_fmt == AV_PIX_FMT_GBRP16)
97 
98 static const struct {
99  NVENCSTATUS nverr;
100  int averr;
101  const char *desc;
102 } nvenc_errors[] = {
103  { NV_ENC_SUCCESS, 0, "success" },
104  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
105  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
106  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
107  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
108  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
109  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
110  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
111  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
112  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
113  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
114  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
115  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
116  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
117  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
118  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
119  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
120  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
121  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
122  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
123  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
124  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
125  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
126  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
127  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
128  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
129 };
130 
131 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
132 {
133  int i;
134  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
135  if (nvenc_errors[i].nverr == err) {
136  if (desc)
137  *desc = nvenc_errors[i].desc;
138  return nvenc_errors[i].averr;
139  }
140  }
141  if (desc)
142  *desc = "unknown error";
143  return AVERROR_UNKNOWN;
144 }
145 
146 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
147  const char *error_string)
148 {
149  const char *desc;
150  const char *details = "(no details)";
151  int ret = nvenc_map_error(err, &desc);
152 
153 #ifdef NVENC_HAVE_GETLASTERRORSTRING
154  NvencContext *ctx = avctx->priv_data;
155  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
156 
157  if (p_nvenc && ctx->nvencoder)
158  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
159 #endif
160 
161  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
162 
163  return ret;
164 }
165 
166 typedef struct FrameData {
167  int64_t pts;
168  int64_t duration;
169 #if FF_API_REORDERED_OPAQUE
170  int64_t reordered_opaque;
171 #endif
172 
173  void *frame_opaque;
175 } FrameData;
176 
177 static void reorder_queue_flush(AVFifo *queue)
178 {
179  FrameData fd;
180 
181  av_assert0(queue);
182 
183  while (av_fifo_read(queue, &fd, 1) >= 0)
185 }
186 
187 typedef struct GUIDTuple {
188  const GUID guid;
189  int flags;
190 } GUIDTuple;
191 
192 #define PRESET_ALIAS(alias, name, ...) \
193  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
194 
195 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
196 
198 {
199  GUIDTuple presets[] = {
200 #ifdef NVENC_HAVE_NEW_PRESETS
201  PRESET(P1),
202  PRESET(P2),
203  PRESET(P3),
204  PRESET(P4),
205  PRESET(P5),
206  PRESET(P6),
207  PRESET(P7),
208  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
209  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
211  // Compat aliases
216  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
219  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
221 #else
222  PRESET(DEFAULT),
223  PRESET(HP),
224  PRESET(HQ),
225  PRESET(BD),
226  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
227  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
229  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
230  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
231  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
232  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
233  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
234 #endif
235  };
236 
237  GUIDTuple *t = &presets[ctx->preset];
238 
239  ctx->init_encode_params.presetGUID = t->guid;
240  ctx->flags = t->flags;
241 
242 #ifdef NVENC_HAVE_NEW_PRESETS
243  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
245 #endif
246 }
247 
248 #undef PRESET
249 #undef PRESET_ALIAS
250 
252 {
253 #if NVENCAPI_CHECK_VERSION(12, 1)
254  const char *minver = "(unknown)";
255 #elif NVENCAPI_CHECK_VERSION(12, 0)
256 # if defined(_WIN32) || defined(__CYGWIN__)
257  const char *minver = "522.25";
258 # else
259  const char *minver = "520.56.06";
260 # endif
261 #elif NVENCAPI_CHECK_VERSION(11, 1)
262 # if defined(_WIN32) || defined(__CYGWIN__)
263  const char *minver = "471.41";
264 # else
265  const char *minver = "470.57.02";
266 # endif
267 #elif NVENCAPI_CHECK_VERSION(11, 0)
268 # if defined(_WIN32) || defined(__CYGWIN__)
269  const char *minver = "456.71";
270 # else
271  const char *minver = "455.28";
272 # endif
273 #elif NVENCAPI_CHECK_VERSION(10, 0)
274 # if defined(_WIN32) || defined(__CYGWIN__)
275  const char *minver = "450.51";
276 # else
277  const char *minver = "445.87";
278 # endif
279 #elif NVENCAPI_CHECK_VERSION(9, 1)
280 # if defined(_WIN32) || defined(__CYGWIN__)
281  const char *minver = "436.15";
282 # else
283  const char *minver = "435.21";
284 # endif
285 #elif NVENCAPI_CHECK_VERSION(9, 0)
286 # if defined(_WIN32) || defined(__CYGWIN__)
287  const char *minver = "418.81";
288 # else
289  const char *minver = "418.30";
290 # endif
291 #elif NVENCAPI_CHECK_VERSION(8, 2)
292 # if defined(_WIN32) || defined(__CYGWIN__)
293  const char *minver = "397.93";
294 # else
295  const char *minver = "396.24";
296 #endif
297 #elif NVENCAPI_CHECK_VERSION(8, 1)
298 # if defined(_WIN32) || defined(__CYGWIN__)
299  const char *minver = "390.77";
300 # else
301  const char *minver = "390.25";
302 # endif
303 #else
304 # if defined(_WIN32) || defined(__CYGWIN__)
305  const char *minver = "378.66";
306 # else
307  const char *minver = "378.13";
308 # endif
309 #endif
310  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
311 }
312 
314 {
315  NvencContext *ctx = avctx->priv_data;
316  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
317  NVENCSTATUS err;
318  uint32_t nvenc_max_ver;
319  int ret;
320 
321  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
322  if (ret < 0)
323  return ret;
324 
325  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
326  if (ret < 0) {
328  return ret;
329  }
330 
331  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
332  if (err != NV_ENC_SUCCESS)
333  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
334 
335  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
336 
337  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
338  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
339  "Required: %d.%d Found: %d.%d\n",
340  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
341  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
343  return AVERROR(ENOSYS);
344  }
345 
346  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
347 
348  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
349  if (err != NV_ENC_SUCCESS)
350  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
351 
352  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
353 
354  return 0;
355 }
356 
358 {
359  NvencContext *ctx = avctx->priv_data;
360  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
361 
362  if (ctx->d3d11_device)
363  return 0;
364 
365  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
366 }
367 
369 {
370  NvencContext *ctx = avctx->priv_data;
371  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
372  CUcontext dummy;
373 
374  if (ctx->d3d11_device)
375  return 0;
376 
377  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
378 }
379 
381 {
382  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
383  NvencContext *ctx = avctx->priv_data;
384  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
385  NVENCSTATUS ret;
386 
387  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
388  params.apiVersion = NVENCAPI_VERSION;
389  if (ctx->d3d11_device) {
390  params.device = ctx->d3d11_device;
391  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
392  } else {
393  params.device = ctx->cu_context;
394  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
395  }
396 
397  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
398  if (ret != NV_ENC_SUCCESS) {
399  ctx->nvencoder = NULL;
400  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
401  }
402 
403  return 0;
404 }
405 
407 {
408  NvencContext *ctx = avctx->priv_data;
409  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
410  int i, ret, count = 0;
411  GUID *guids = NULL;
412 
413  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
414 
415  if (ret != NV_ENC_SUCCESS || !count)
416  return AVERROR(ENOSYS);
417 
418  guids = av_malloc(count * sizeof(GUID));
419  if (!guids)
420  return AVERROR(ENOMEM);
421 
422  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
423  if (ret != NV_ENC_SUCCESS) {
424  ret = AVERROR(ENOSYS);
425  goto fail;
426  }
427 
428  ret = AVERROR(ENOSYS);
429  for (i = 0; i < count; i++) {
430  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
431  ret = 0;
432  break;
433  }
434  }
435 
436 fail:
437  av_free(guids);
438 
439  return ret;
440 }
441 
442 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
443 {
444  NvencContext *ctx = avctx->priv_data;
445  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
446  NV_ENC_CAPS_PARAM params = { 0 };
447  int ret, val = 0;
448 
449  params.version = NV_ENC_CAPS_PARAM_VER;
450  params.capsToQuery = cap;
451 
452  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
453 
454  if (ret == NV_ENC_SUCCESS)
455  return val;
456  return 0;
457 }
458 
460 {
461  NvencContext *ctx = avctx->priv_data;
462  int ret;
463 
465  if (ret < 0) {
466  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
467  return ret;
468  }
469 
470  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
471  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
472  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
473  return AVERROR(ENOSYS);
474  }
475 
476  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
477  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
478  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
479  return AVERROR(ENOSYS);
480  }
481 
482  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
483  if (ret < avctx->width) {
484  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
485  avctx->width, ret);
486  return AVERROR(ENOSYS);
487  }
488 
489  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
490  if (ret < avctx->height) {
491  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
492  avctx->height, ret);
493  return AVERROR(ENOSYS);
494  }
495 
496  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
497  if (ret < avctx->max_b_frames) {
498  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
499  avctx->max_b_frames, ret);
500 
501  return AVERROR(ENOSYS);
502  }
503 
504  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
505  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
506  av_log(avctx, AV_LOG_WARNING,
507  "Interlaced encoding is not supported. Supported level: %d\n",
508  ret);
509  return AVERROR(ENOSYS);
510  }
511 
512  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
513  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
514  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
515  return AVERROR(ENOSYS);
516  }
517 
518  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
519  if (ctx->rc_lookahead > 0 && ret <= 0) {
520  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
521  return AVERROR(ENOSYS);
522  }
523 
524  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
525  if (ctx->temporal_aq > 0 && ret <= 0) {
526  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
527  return AVERROR(ENOSYS);
528  }
529 
530  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
531  if (ctx->weighted_pred > 0 && ret <= 0) {
532  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
533  return AVERROR(ENOSYS);
534  }
535 
536  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
537  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
538  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
539  return AVERROR(ENOSYS);
540  }
541 
542 #ifdef NVENC_HAVE_BFRAME_REF_MODE
543  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
544  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
545  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
546  return AVERROR(ENOSYS);
547  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
548  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
549  return AVERROR(ENOSYS);
550  }
551 #else
552  if (ctx->b_ref_mode != 0) {
553  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
554  return AVERROR(ENOSYS);
555  }
556 #endif
557 
558 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
559  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
560  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
561  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
562  return AVERROR(ENOSYS);
563  }
564 #else
565  if(avctx->refs != 0) {
566  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
567  return AVERROR(ENOSYS);
568  }
569 #endif
570 
571 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
572  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
573  if(ctx->single_slice_intra_refresh && ret <= 0) {
574  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
575  return AVERROR(ENOSYS);
576  }
577 #else
578  if(ctx->single_slice_intra_refresh) {
579  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
580  return AVERROR(ENOSYS);
581  }
582 #endif
583 
584  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
585  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
586  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
587  return AVERROR(ENOSYS);
588  }
589 
590 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
591  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
592  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
593  return AVERROR(ENOSYS);
594  }
595 #endif
596 
597  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
598  if(ctx->constrained_encoding && ret <= 0) {
599  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
600  return AVERROR(ENOSYS);
601  }
602 
603  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
604 
605  return 0;
606 }
607 
608 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
609 {
610  NvencContext *ctx = avctx->priv_data;
611  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
612  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
613  char name[128] = { 0};
614  int major, minor, ret;
615  CUdevice cu_device;
616  int loglevel = AV_LOG_VERBOSE;
617 
618  if (ctx->device == LIST_DEVICES)
619  loglevel = AV_LOG_INFO;
620 
621  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
622  if (ret < 0)
623  return ret;
624 
625  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
626  if (ret < 0)
627  return ret;
628 
629  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
630  if (ret < 0)
631  return ret;
632 
633  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
634  if (((major << 4) | minor) < NVENC_CAP) {
635  av_log(avctx, loglevel, "does not support NVENC\n");
636  goto fail;
637  }
638 
639  if (ctx->device != idx && ctx->device != ANY_DEVICE)
640  return -1;
641 
642  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
643  if (ret < 0)
644  goto fail;
645 
646  ctx->cu_context = ctx->cu_context_internal;
647  ctx->cu_stream = NULL;
648 
649  if ((ret = nvenc_pop_context(avctx)) < 0)
650  goto fail2;
651 
652  if ((ret = nvenc_open_session(avctx)) < 0)
653  goto fail2;
654 
655  if ((ret = nvenc_check_capabilities(avctx)) < 0)
656  goto fail3;
657 
658  av_log(avctx, loglevel, "supports NVENC\n");
659 
660  dl_fn->nvenc_device_count++;
661 
662  if (ctx->device == idx || ctx->device == ANY_DEVICE)
663  return 0;
664 
665 fail3:
666  if ((ret = nvenc_push_context(avctx)) < 0)
667  return ret;
668 
669  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
670  ctx->nvencoder = NULL;
671 
672  if ((ret = nvenc_pop_context(avctx)) < 0)
673  return ret;
674 
675 fail2:
676  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
677  ctx->cu_context_internal = NULL;
678 
679 fail:
680  return AVERROR(ENOSYS);
681 }
682 
684 {
685  NvencContext *ctx = avctx->priv_data;
686  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
687 
688  switch (avctx->codec->id) {
689  case AV_CODEC_ID_H264:
690  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
691  break;
692  case AV_CODEC_ID_HEVC:
693  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
694  break;
695 #if CONFIG_AV1_NVENC_ENCODER
696  case AV_CODEC_ID_AV1:
697  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
698  break;
699 #endif
700  default:
701  return AVERROR_BUG;
702  }
703 
705 
707  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
708 
709  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
710  AVHWFramesContext *frames_ctx;
711  AVHWDeviceContext *hwdev_ctx;
712  AVCUDADeviceContext *cuda_device_hwctx = NULL;
713 #if CONFIG_D3D11VA
714  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
715 #endif
716  int ret;
717 
718  if (avctx->hw_frames_ctx) {
719  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
720  if (frames_ctx->format == AV_PIX_FMT_CUDA)
721  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
722 #if CONFIG_D3D11VA
723  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
724  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
725 #endif
726  else
727  return AVERROR(EINVAL);
728  } else if (avctx->hw_device_ctx) {
729  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
730  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
731  cuda_device_hwctx = hwdev_ctx->hwctx;
732 #if CONFIG_D3D11VA
733  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
734  d3d11_device_hwctx = hwdev_ctx->hwctx;
735 #endif
736  else
737  return AVERROR(EINVAL);
738  } else {
739  return AVERROR(EINVAL);
740  }
741 
742  if (cuda_device_hwctx) {
743  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
744  ctx->cu_stream = cuda_device_hwctx->stream;
745  }
746 #if CONFIG_D3D11VA
747  else if (d3d11_device_hwctx) {
748  ctx->d3d11_device = d3d11_device_hwctx->device;
749  ID3D11Device_AddRef(ctx->d3d11_device);
750  }
751 #endif
752 
753  ret = nvenc_open_session(avctx);
754  if (ret < 0)
755  return ret;
756 
757  ret = nvenc_check_capabilities(avctx);
758  if (ret < 0) {
759  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
760  return ret;
761  }
762  } else {
763  int i, nb_devices = 0;
764 
765  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
766  return AVERROR_UNKNOWN;
767 
768  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
769  return AVERROR_UNKNOWN;
770 
771  if (!nb_devices) {
772  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
773  return AVERROR_EXTERNAL;
774  }
775 
776  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
777 
778  dl_fn->nvenc_device_count = 0;
779  for (i = 0; i < nb_devices; ++i) {
780  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
781  return 0;
782  }
783 
784  if (ctx->device == LIST_DEVICES)
785  return AVERROR_EXIT;
786 
787  if (!dl_fn->nvenc_device_count) {
788  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
789  return AVERROR_EXTERNAL;
790  }
791 
792  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
793  return AVERROR(EINVAL);
794  }
795 
796  return 0;
797 }
798 
799 static av_cold void set_constqp(AVCodecContext *avctx)
800 {
801  NvencContext *ctx = avctx->priv_data;
802  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
803 #if CONFIG_AV1_NVENC_ENCODER
804  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
805 #else
806  int qmax = 51;
807 #endif
808 
809  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
810 
811  if (ctx->init_qp_p >= 0) {
812  rc->constQP.qpInterP = ctx->init_qp_p;
813  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
814  rc->constQP.qpIntra = ctx->init_qp_i;
815  rc->constQP.qpInterB = ctx->init_qp_b;
816  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
817  rc->constQP.qpIntra = av_clip(
818  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
819  rc->constQP.qpInterB = av_clip(
820  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
821  } else {
822  rc->constQP.qpIntra = rc->constQP.qpInterP;
823  rc->constQP.qpInterB = rc->constQP.qpInterP;
824  }
825  } else if (ctx->cqp >= 0) {
826  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
827  if (avctx->b_quant_factor != 0.0)
828  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
829  if (avctx->i_quant_factor != 0.0)
830  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
831  }
832 
833  avctx->qmin = -1;
834  avctx->qmax = -1;
835 }
836 
837 static av_cold void set_vbr(AVCodecContext *avctx)
838 {
839  NvencContext *ctx = avctx->priv_data;
840  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
841  int qp_inter_p;
842 #if CONFIG_AV1_NVENC_ENCODER
843  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
844 #else
845  int qmax = 51;
846 #endif
847 
848  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
849  rc->enableMinQP = 1;
850  rc->enableMaxQP = 1;
851 
852  rc->minQP.qpInterB = avctx->qmin;
853  rc->minQP.qpInterP = avctx->qmin;
854  rc->minQP.qpIntra = avctx->qmin;
855 
856  rc->maxQP.qpInterB = avctx->qmax;
857  rc->maxQP.qpInterP = avctx->qmax;
858  rc->maxQP.qpIntra = avctx->qmax;
859 
860  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
861  } else if (avctx->qmin >= 0) {
862  rc->enableMinQP = 1;
863 
864  rc->minQP.qpInterB = avctx->qmin;
865  rc->minQP.qpInterP = avctx->qmin;
866  rc->minQP.qpIntra = avctx->qmin;
867 
868  qp_inter_p = avctx->qmin;
869  } else {
870  qp_inter_p = 26; // default to 26
871  }
872 
873  rc->enableInitialRCQP = 1;
874 
875  if (ctx->init_qp_p < 0) {
876  rc->initialRCQP.qpInterP = qp_inter_p;
877  } else {
878  rc->initialRCQP.qpInterP = ctx->init_qp_p;
879  }
880 
881  if (ctx->init_qp_i < 0) {
882  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
883  rc->initialRCQP.qpIntra = av_clip(
884  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
885  } else {
886  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
887  }
888  } else {
889  rc->initialRCQP.qpIntra = ctx->init_qp_i;
890  }
891 
892  if (ctx->init_qp_b < 0) {
893  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
894  rc->initialRCQP.qpInterB = av_clip(
895  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
896  } else {
897  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
898  }
899  } else {
900  rc->initialRCQP.qpInterB = ctx->init_qp_b;
901  }
902 }
903 
905 {
906  NvencContext *ctx = avctx->priv_data;
907  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
908 
909  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
910  rc->constQP.qpInterB = 0;
911  rc->constQP.qpInterP = 0;
912  rc->constQP.qpIntra = 0;
913 
914  avctx->qmin = -1;
915  avctx->qmax = -1;
916 }
917 
919 {
920  NvencContext *ctx = avctx->priv_data;
921  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
922 
923  switch (ctx->rc) {
924  case NV_ENC_PARAMS_RC_CONSTQP:
925  set_constqp(avctx);
926  return;
927  case NV_ENC_PARAMS_RC_VBR_MINQP:
928  if (avctx->qmin < 0) {
929  av_log(avctx, AV_LOG_WARNING,
930  "The variable bitrate rate-control requires "
931  "the 'qmin' option set.\n");
932  set_vbr(avctx);
933  return;
934  }
935  /* fall through */
936  case NV_ENC_PARAMS_RC_VBR_HQ:
937  case NV_ENC_PARAMS_RC_VBR:
938  set_vbr(avctx);
939  break;
940  case NV_ENC_PARAMS_RC_CBR:
941  case NV_ENC_PARAMS_RC_CBR_HQ:
942  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
943  break;
944  }
945 
946  rc->rateControlMode = ctx->rc;
947 }
948 
950 {
951  NvencContext *ctx = avctx->priv_data;
952  // default minimum of 4 surfaces
953  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
954  // another multiply by 2 to avoid blocking next PBB group
955  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
956 
957  // lookahead enabled
958  if (ctx->rc_lookahead > 0) {
959  // +1 is to account for lkd_bound calculation later
960  // +4 is to allow sufficient pipelining with lookahead
961  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
962  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
963  {
964  av_log(avctx, AV_LOG_WARNING,
965  "Defined rc_lookahead requires more surfaces, "
966  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
967  }
968  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
969  } else {
970  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
971  {
972  av_log(avctx, AV_LOG_WARNING,
973  "Defined b-frame requires more surfaces, "
974  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
975  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
976  }
977  else if (ctx->nb_surfaces <= 0)
978  ctx->nb_surfaces = nb_surfaces;
979  // otherwise use user specified value
980  }
981 
982  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
983  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
984 
985  return 0;
986 }
987 
989 {
990  NvencContext *ctx = avctx->priv_data;
991 
992  if (avctx->global_quality > 0)
993  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
994 
995  if (ctx->cqp < 0 && avctx->global_quality > 0)
996  ctx->cqp = avctx->global_quality;
997 
998  if (avctx->bit_rate > 0) {
999  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1000  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1001  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1002  }
1003 
1004  if (avctx->rc_max_rate > 0)
1005  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1006 
1007 #ifdef NVENC_HAVE_MULTIPASS
1008  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1009 
1010  if (ctx->flags & NVENC_ONE_PASS)
1011  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1012  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1013  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1014 
1015  if (ctx->rc < 0) {
1016  if (ctx->cbr) {
1017  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1018  } else if (ctx->cqp >= 0) {
1019  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1020  } else if (ctx->quality >= 0.0f) {
1021  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1022  }
1023  }
1024 #else
1025  if (ctx->rc < 0) {
1026  if (ctx->flags & NVENC_ONE_PASS)
1027  ctx->twopass = 0;
1028  if (ctx->flags & NVENC_TWO_PASSES)
1029  ctx->twopass = 1;
1030 
1031  if (ctx->twopass < 0)
1032  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1033 
1034  if (ctx->cbr) {
1035  if (ctx->twopass) {
1036  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1037  } else {
1038  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1039  }
1040  } else if (ctx->cqp >= 0) {
1041  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1042  } else if (ctx->twopass) {
1043  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1044  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
1045  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1046  }
1047  }
1048 #endif
1049 
1050  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1051  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1052  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1053 
1054  ctx->rc &= ~RC_MODE_DEPRECATED;
1055  }
1056 
1057 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1058  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1059  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1060 #else
1061  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1062  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1063 #endif
1064 
1065 #ifdef NVENC_HAVE_LDKFS
1066  if (ctx->ldkfs)
1067  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1068 #endif
1069 
1070  if (ctx->flags & NVENC_LOSSLESS) {
1071  set_lossless(avctx);
1072  } else if (ctx->rc >= 0) {
1074  } else {
1075  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1076  set_vbr(avctx);
1077  }
1078 
1079  if (avctx->rc_buffer_size > 0) {
1080  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1081  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1082  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1083  }
1084 
1085  if (ctx->aq) {
1086  ctx->encode_config.rcParams.enableAQ = 1;
1087  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1088  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1089  }
1090 
1091  if (ctx->temporal_aq) {
1092  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1093  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1094  }
1095 
1096  if (ctx->rc_lookahead > 0) {
1097  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1098  ctx->encode_config.frameIntervalP - 4;
1099 
1100  if (lkd_bound < 0) {
1101  ctx->encode_config.rcParams.enableLookahead = 0;
1102  av_log(avctx, AV_LOG_WARNING,
1103  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1104  } else {
1105  ctx->encode_config.rcParams.enableLookahead = 1;
1106  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1107  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1108  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1109  av_log(avctx, AV_LOG_VERBOSE,
1110  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1111  ctx->encode_config.rcParams.lookaheadDepth,
1112  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1113  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1114  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1115  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1116  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1117  }
1118  }
1119 
1120  if (ctx->strict_gop) {
1121  ctx->encode_config.rcParams.strictGOPTarget = 1;
1122  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1123  }
1124 
1125  if (ctx->nonref_p)
1126  ctx->encode_config.rcParams.enableNonRefP = 1;
1127 
1128  if (ctx->zerolatency)
1129  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1130 
1131  if (ctx->quality) {
1132  //convert from float to fixed point 8.8
1133  int tmp_quality = (int)(ctx->quality * 256.0f);
1134  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1135  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1136 
1137  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1138 
1139  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1140  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1141  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1142  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1143  }
1144 }
1145 
1147 {
1148  NvencContext *ctx = avctx->priv_data;
1149  NV_ENC_CONFIG *cc = &ctx->encode_config;
1150  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1151  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1152 
1153  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1154 
1155  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1156  vui->colourMatrix = AVCOL_SPC_BT470BG;
1157  vui->colourPrimaries = avctx->color_primaries;
1158  vui->transferCharacteristics = avctx->color_trc;
1159  vui->videoFullRangeFlag = 0;
1160  } else {
1161  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1162  vui->colourPrimaries = avctx->color_primaries;
1163  vui->transferCharacteristics = avctx->color_trc;
1164  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1165  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1166  }
1167 
1168  vui->colourDescriptionPresentFlag =
1169  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1170 
1171  vui->videoSignalTypePresentFlag =
1172  (vui->colourDescriptionPresentFlag
1173  || vui->videoFormat != 5
1174  || vui->videoFullRangeFlag != 0);
1175 
1176  h264->sliceMode = 3;
1177  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1178 
1179  if (ctx->intra_refresh) {
1180  h264->enableIntraRefresh = 1;
1181  h264->intraRefreshPeriod = avctx->gop_size;
1182  h264->intraRefreshCnt = avctx->gop_size - 1;
1183 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1184  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1185 #endif
1186  }
1187 
1188  if (ctx->constrained_encoding)
1189  h264->enableConstrainedEncoding = 1;
1190 
1191  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1192  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1193  h264->outputAUD = ctx->aud;
1194 
1195  if (ctx->dpb_size >= 0) {
1196  /* 0 means "let the hardware decide" */
1197  h264->maxNumRefFrames = ctx->dpb_size;
1198  }
1199 
1200  if (ctx->intra_refresh) {
1201  h264->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1202  } else if (avctx->gop_size >= 0) {
1203  h264->idrPeriod = avctx->gop_size;
1204  }
1205 
1206  if (IS_CBR(cc->rcParams.rateControlMode)) {
1207  h264->outputBufferingPeriodSEI = 1;
1208  }
1209 
1210  h264->outputPictureTimingSEI = 1;
1211 
1212  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1213  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1214  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1215  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1216  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1217  }
1218 
1219  if (ctx->flags & NVENC_LOSSLESS) {
1220  h264->qpPrimeYZeroTransformBypassFlag = 1;
1221  } else {
1222  switch(ctx->profile) {
1224  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1226  break;
1228  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1229  avctx->profile = FF_PROFILE_H264_MAIN;
1230  break;
1232  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1233  avctx->profile = FF_PROFILE_H264_HIGH;
1234  break;
1236  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1238  break;
1239  }
1240  }
1241 
1242  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1243  if (IS_YUV444(ctx->data_pix_fmt)) {
1244  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1246  }
1247 
1248  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1249 
1250  h264->level = ctx->level;
1251 
1252  if (ctx->coder >= 0)
1253  h264->entropyCodingMode = ctx->coder;
1254 
1255 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1256  if (ctx->b_ref_mode >= 0)
1257  h264->useBFramesAsRef = ctx->b_ref_mode;
1258 #endif
1259 
1260 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1261  h264->numRefL0 = avctx->refs;
1262  h264->numRefL1 = avctx->refs;
1263 #endif
1264 
1265  return 0;
1266 }
1267 
1269 {
1270  NvencContext *ctx = avctx->priv_data;
1271  NV_ENC_CONFIG *cc = &ctx->encode_config;
1272  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1273  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1274 
1275  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1276 
1277  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1278  vui->colourMatrix = AVCOL_SPC_BT470BG;
1279  vui->colourPrimaries = avctx->color_primaries;
1280  vui->transferCharacteristics = avctx->color_trc;
1281  vui->videoFullRangeFlag = 0;
1282  } else {
1283  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1284  vui->colourPrimaries = avctx->color_primaries;
1285  vui->transferCharacteristics = avctx->color_trc;
1286  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1287  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1288  }
1289 
1290  vui->colourDescriptionPresentFlag =
1291  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1292 
1293  vui->videoSignalTypePresentFlag =
1294  (vui->colourDescriptionPresentFlag
1295  || vui->videoFormat != 5
1296  || vui->videoFullRangeFlag != 0);
1297 
1298  hevc->sliceMode = 3;
1299  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1300 
1301  if (ctx->intra_refresh) {
1302  hevc->enableIntraRefresh = 1;
1303  hevc->intraRefreshPeriod = avctx->gop_size;
1304  hevc->intraRefreshCnt = avctx->gop_size - 1;
1305 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1306  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1307 #endif
1308  }
1309 
1310 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1311  if (ctx->constrained_encoding)
1312  hevc->enableConstrainedEncoding = 1;
1313 #endif
1314 
1315  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1316  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1317  hevc->outputAUD = ctx->aud;
1318 
1319  if (ctx->dpb_size >= 0) {
1320  /* 0 means "let the hardware decide" */
1321  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1322  }
1323 
1324  if (ctx->intra_refresh) {
1325  hevc->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1326  } else if (avctx->gop_size >= 0) {
1327  hevc->idrPeriod = avctx->gop_size;
1328  }
1329 
1330  if (IS_CBR(cc->rcParams.rateControlMode)) {
1331  hevc->outputBufferingPeriodSEI = 1;
1332  }
1333 
1334  hevc->outputPictureTimingSEI = 1;
1335 
1336  switch (ctx->profile) {
1338  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1339  avctx->profile = FF_PROFILE_HEVC_MAIN;
1340  break;
1342  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1344  break;
1346  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1347  avctx->profile = FF_PROFILE_HEVC_REXT;
1348  break;
1349  }
1350 
1351  // force setting profile as main10 if input is 10 bit
1352  if (IS_10BIT(ctx->data_pix_fmt)) {
1353  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1355  }
1356 
1357  // force setting profile as rext if input is yuv444
1358  if (IS_YUV444(ctx->data_pix_fmt)) {
1359  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1360  avctx->profile = FF_PROFILE_HEVC_REXT;
1361  }
1362 
1363  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1364 
1365  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1366 
1367  hevc->level = ctx->level;
1368 
1369  hevc->tier = ctx->tier;
1370 
1371 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1372  if (ctx->b_ref_mode >= 0)
1373  hevc->useBFramesAsRef = ctx->b_ref_mode;
1374 #endif
1375 
1376 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1377  hevc->numRefL0 = avctx->refs;
1378  hevc->numRefL1 = avctx->refs;
1379 #endif
1380 
1381  return 0;
1382 }
1383 
1384 #if CONFIG_AV1_NVENC_ENCODER
1385 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1386 {
1387  NvencContext *ctx = avctx->priv_data;
1388  NV_ENC_CONFIG *cc = &ctx->encode_config;
1389  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1390 
1391  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1392 
1393  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1394  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1395  av1->colorPrimaries = avctx->color_primaries;
1396  av1->transferCharacteristics = avctx->color_trc;
1397  av1->colorRange = 0;
1398  } else {
1399  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1400  av1->colorPrimaries = avctx->color_primaries;
1401  av1->transferCharacteristics = avctx->color_trc;
1402  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1403  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1404  }
1405 
1406  if (IS_YUV444(ctx->data_pix_fmt)) {
1407  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1408  return AVERROR(ENOTSUP);
1409  } else {
1410  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1411  avctx->profile = FF_PROFILE_AV1_MAIN;
1412  }
1413 
1414  if (ctx->dpb_size >= 0) {
1415  /* 0 means "let the hardware decide" */
1416  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1417  }
1418 
1419  if (ctx->intra_refresh) {
1420  av1->enableIntraRefresh = 1;
1421  av1->intraRefreshPeriod = avctx->gop_size;
1422  av1->intraRefreshCnt = avctx->gop_size - 1;
1423 
1424  av1->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1425  } else if (avctx->gop_size >= 0) {
1426  av1->idrPeriod = avctx->gop_size;
1427  }
1428 
1429  if (IS_CBR(cc->rcParams.rateControlMode)) {
1430  av1->enableBitstreamPadding = 1;
1431  }
1432 
1433  if (ctx->tile_cols >= 0)
1434  av1->numTileColumns = ctx->tile_cols;
1435  if (ctx->tile_rows >= 0)
1436  av1->numTileRows = ctx->tile_rows;
1437 
1438  av1->outputAnnexBFormat = 0;
1439 
1440  av1->level = ctx->level;
1441  av1->tier = ctx->tier;
1442 
1443  av1->enableTimingInfo = ctx->timing_info;
1444 
1445  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1446  av1->disableSeqHdr = 0;
1447  av1->repeatSeqHdr = 1;
1448 
1449  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1450 
1451  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1452  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1453 
1454  if (ctx->b_ref_mode >= 0)
1455  av1->useBFramesAsRef = ctx->b_ref_mode;
1456 
1457  av1->numFwdRefs = avctx->refs;
1458  av1->numBwdRefs = avctx->refs;
1459 
1460  return 0;
1461 }
1462 #endif
1463 
1465 {
1466  switch (avctx->codec->id) {
1467  case AV_CODEC_ID_H264:
1468  return nvenc_setup_h264_config(avctx);
1469  case AV_CODEC_ID_HEVC:
1470  return nvenc_setup_hevc_config(avctx);
1471 #if CONFIG_AV1_NVENC_ENCODER
1472  case AV_CODEC_ID_AV1:
1473  return nvenc_setup_av1_config(avctx);
1474 #endif
1475  /* Earlier switch/case will return if unknown codec is passed. */
1476  }
1477 
1478  return 0;
1479 }
1480 
1481 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1482  int sw, sh;
1483 
1484  sw = avctx->width;
1485  sh = avctx->height;
1486 
1487 #if CONFIG_AV1_NVENC_ENCODER
1488  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1489  /* For AV1 we actually need to calculate the render width/height, not the dar */
1490  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1491  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1492  {
1493  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1494  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1495  } else {
1496  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1497  }
1498  }
1499 
1500  *dw = sw;
1501  *dh = sh;
1502  return;
1503  }
1504 #endif
1505 
1506  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1507  sw *= avctx->sample_aspect_ratio.num;
1508  sh *= avctx->sample_aspect_ratio.den;
1509  }
1510 
1511  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1512 }
1513 
1515 {
1516  NvencContext *ctx = avctx->priv_data;
1517  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1518  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1519 
1520  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1521  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1522  AVCPBProperties *cpb_props;
1523  int res = 0;
1524  int dw, dh;
1525 
1526  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1527  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1528 
1529  ctx->init_encode_params.encodeHeight = avctx->height;
1530  ctx->init_encode_params.encodeWidth = avctx->width;
1531 
1532  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1533 
1534  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1535  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1536 
1537 #ifdef NVENC_HAVE_NEW_PRESETS
1538  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1539 
1540  if (ctx->flags & NVENC_LOSSLESS)
1541  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1542  else if (ctx->flags & NVENC_LOWLATENCY)
1543  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1544 
1545  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1546  ctx->init_encode_params.encodeGUID,
1547  ctx->init_encode_params.presetGUID,
1548  ctx->init_encode_params.tuningInfo,
1549  &preset_config);
1550 #else
1551  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1552  ctx->init_encode_params.encodeGUID,
1553  ctx->init_encode_params.presetGUID,
1554  &preset_config);
1555 #endif
1556  if (nv_status != NV_ENC_SUCCESS)
1557  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1558 
1559  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1560 
1561  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1562 
1563  compute_dar(avctx, &dw, &dh);
1564  ctx->init_encode_params.darHeight = dh;
1565  ctx->init_encode_params.darWidth = dw;
1566 
1567  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1568  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1569  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1570  } else {
1571  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1572  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1573  }
1574 
1575  ctx->init_encode_params.enableEncodeAsync = 0;
1576  ctx->init_encode_params.enablePTD = 1;
1577 
1578 #ifdef NVENC_HAVE_NEW_PRESETS
1579  /* If lookahead isn't set from CLI, use value from preset.
1580  * P6 & P7 presets may enable lookahead for better quality.
1581  * */
1582  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1583  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1584 #endif
1585 
1586  if (ctx->weighted_pred == 1)
1587  ctx->init_encode_params.enableWeightedPrediction = 1;
1588 
1589  if (ctx->bluray_compat) {
1590  ctx->aud = 1;
1591  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1592  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1593  switch (avctx->codec->id) {
1594  case AV_CODEC_ID_H264:
1595  /* maximum level depends on used resolution */
1596  break;
1597  case AV_CODEC_ID_HEVC:
1598  ctx->level = NV_ENC_LEVEL_HEVC_51;
1599  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1600  break;
1601  }
1602  }
1603 
1604  if (avctx->gop_size > 0) {
1605  if (avctx->max_b_frames >= 0) {
1606  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1607  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1608  }
1609 
1610  ctx->encode_config.gopLength = avctx->gop_size;
1611  } else if (avctx->gop_size == 0) {
1612  ctx->encode_config.frameIntervalP = 0;
1613  ctx->encode_config.gopLength = 1;
1614  }
1615 
1616  /* force to enable intra refresh */
1617  if(ctx->single_slice_intra_refresh)
1618  ctx->intra_refresh = 1;
1619 
1620  if (ctx->intra_refresh)
1621  ctx->encode_config.gopLength = NVENC_INFINITE_GOPLENGTH;
1622 
1623  nvenc_recalc_surfaces(avctx);
1624 
1625  nvenc_setup_rate_control(avctx);
1626 
1627  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1628  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1629  } else {
1630  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1631  }
1632 
1633  res = nvenc_setup_codec_config(avctx);
1634  if (res)
1635  return res;
1636 
1637  res = nvenc_push_context(avctx);
1638  if (res < 0)
1639  return res;
1640 
1641  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1642  if (nv_status != NV_ENC_SUCCESS) {
1643  nvenc_pop_context(avctx);
1644  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1645  }
1646 
1647 #ifdef NVENC_HAVE_CUSTREAM_PTR
1648  if (ctx->cu_context) {
1649  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1650  if (nv_status != NV_ENC_SUCCESS) {
1651  nvenc_pop_context(avctx);
1652  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1653  }
1654  }
1655 #endif
1656 
1657  res = nvenc_pop_context(avctx);
1658  if (res < 0)
1659  return res;
1660 
1661  if (ctx->encode_config.frameIntervalP > 1)
1662  avctx->has_b_frames = 2;
1663 
1664  if (ctx->encode_config.rcParams.averageBitRate > 0)
1665  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1666 
1667  cpb_props = ff_add_cpb_side_data(avctx);
1668  if (!cpb_props)
1669  return AVERROR(ENOMEM);
1670  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1671  cpb_props->avg_bitrate = avctx->bit_rate;
1672  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1673 
1674  return 0;
1675 }
1676 
1677 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1678 {
1679  switch (pix_fmt) {
1680  case AV_PIX_FMT_YUV420P:
1681  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1682  case AV_PIX_FMT_NV12:
1683  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1684  case AV_PIX_FMT_P010:
1685  case AV_PIX_FMT_P016:
1686  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1687  case AV_PIX_FMT_GBRP:
1688  case AV_PIX_FMT_YUV444P:
1689  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1690  case AV_PIX_FMT_GBRP16:
1691  case AV_PIX_FMT_YUV444P16:
1692  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1693  case AV_PIX_FMT_0RGB32:
1694  case AV_PIX_FMT_RGB32:
1695  return NV_ENC_BUFFER_FORMAT_ARGB;
1696  case AV_PIX_FMT_0BGR32:
1697  case AV_PIX_FMT_BGR32:
1698  return NV_ENC_BUFFER_FORMAT_ABGR;
1699  case AV_PIX_FMT_X2RGB10:
1700  return NV_ENC_BUFFER_FORMAT_ARGB10;
1701  case AV_PIX_FMT_X2BGR10:
1702  return NV_ENC_BUFFER_FORMAT_ABGR10;
1703  default:
1704  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1705  }
1706 }
1707 
1708 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1709 {
1710  NvencContext *ctx = avctx->priv_data;
1711  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1712  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1713  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1714 
1715  NVENCSTATUS nv_status;
1716  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1717  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1718 
1719  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1720  ctx->surfaces[idx].in_ref = av_frame_alloc();
1721  if (!ctx->surfaces[idx].in_ref)
1722  return AVERROR(ENOMEM);
1723  } else {
1724  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1725 
1726  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1727  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1728  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1729  av_get_pix_fmt_name(ctx->data_pix_fmt));
1730  return AVERROR(EINVAL);
1731  }
1732 
1733  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1734  allocSurf.width = avctx->width;
1735  allocSurf.height = avctx->height;
1736  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1737 
1738  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1739  if (nv_status != NV_ENC_SUCCESS) {
1740  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1741  }
1742 
1743  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1744  ctx->surfaces[idx].width = allocSurf.width;
1745  ctx->surfaces[idx].height = allocSurf.height;
1746  }
1747 
1748  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1749  if (nv_status != NV_ENC_SUCCESS) {
1750  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1751  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1752  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1753  av_frame_free(&ctx->surfaces[idx].in_ref);
1754  return err;
1755  }
1756 
1757  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1758 
1759  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1760 
1761  return 0;
1762 }
1763 
1765 {
1766  NvencContext *ctx = avctx->priv_data;
1767  int i, res = 0, res2;
1768 
1769  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1770  if (!ctx->surfaces)
1771  return AVERROR(ENOMEM);
1772 
1773  ctx->reorder_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(FrameData), 0);
1774  if (!ctx->reorder_queue)
1775  return AVERROR(ENOMEM);
1776 
1777  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1778  if (!ctx->unused_surface_queue)
1779  return AVERROR(ENOMEM);
1780 
1781  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1782  if (!ctx->output_surface_queue)
1783  return AVERROR(ENOMEM);
1784  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1785  if (!ctx->output_surface_ready_queue)
1786  return AVERROR(ENOMEM);
1787 
1788  res = nvenc_push_context(avctx);
1789  if (res < 0)
1790  return res;
1791 
1792  for (i = 0; i < ctx->nb_surfaces; i++) {
1793  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1794  goto fail;
1795  }
1796 
1797 fail:
1798  res2 = nvenc_pop_context(avctx);
1799  if (res2 < 0)
1800  return res2;
1801 
1802  return res;
1803 }
1804 
1806 {
1807  NvencContext *ctx = avctx->priv_data;
1808  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1809  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1810 
1811  NVENCSTATUS nv_status;
1812  uint32_t outSize = 0;
1813  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
1814 
1815  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1816  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1817 
1818  payload.spsppsBuffer = tmpHeader;
1819  payload.inBufferSize = sizeof(tmpHeader);
1820  payload.outSPSPPSPayloadSize = &outSize;
1821 
1822  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1823  if (nv_status != NV_ENC_SUCCESS) {
1824  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1825  }
1826 
1827  avctx->extradata_size = outSize;
1829 
1830  if (!avctx->extradata) {
1831  return AVERROR(ENOMEM);
1832  }
1833 
1834  memcpy(avctx->extradata, tmpHeader, outSize);
1835 
1836  return 0;
1837 }
1838 
1840 {
1841  NvencContext *ctx = avctx->priv_data;
1842  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1843  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1844  int i, res;
1845 
1846  /* the encoder has to be flushed before it can be closed */
1847  if (ctx->nvencoder) {
1848  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1849  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1850 
1851  res = nvenc_push_context(avctx);
1852  if (res < 0)
1853  return res;
1854 
1855  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1856  }
1857 
1858  if (ctx->reorder_queue) {
1859  reorder_queue_flush(ctx->reorder_queue);
1860  av_fifo_freep2(&ctx->reorder_queue);
1861  }
1862 
1863  av_fifo_freep2(&ctx->output_surface_ready_queue);
1864  av_fifo_freep2(&ctx->output_surface_queue);
1865  av_fifo_freep2(&ctx->unused_surface_queue);
1866 
1867  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1868  for (i = 0; i < ctx->nb_registered_frames; i++) {
1869  if (ctx->registered_frames[i].mapped)
1870  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1871  if (ctx->registered_frames[i].regptr)
1872  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1873  }
1874  ctx->nb_registered_frames = 0;
1875  }
1876 
1877  if (ctx->surfaces) {
1878  for (i = 0; i < ctx->nb_surfaces; ++i) {
1879  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1880  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1881  av_frame_free(&ctx->surfaces[i].in_ref);
1882  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1883  }
1884  }
1885  av_freep(&ctx->surfaces);
1886  ctx->nb_surfaces = 0;
1887 
1888  av_frame_free(&ctx->frame);
1889 
1890  av_freep(&ctx->sei_data);
1891 
1892  if (ctx->nvencoder) {
1893  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1894 
1895  res = nvenc_pop_context(avctx);
1896  if (res < 0)
1897  return res;
1898  }
1899  ctx->nvencoder = NULL;
1900 
1901  if (ctx->cu_context_internal)
1902  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1903  ctx->cu_context = ctx->cu_context_internal = NULL;
1904 
1905 #if CONFIG_D3D11VA
1906  if (ctx->d3d11_device) {
1907  ID3D11Device_Release(ctx->d3d11_device);
1908  ctx->d3d11_device = NULL;
1909  }
1910 #endif
1911 
1912  nvenc_free_functions(&dl_fn->nvenc_dl);
1913  cuda_free_functions(&dl_fn->cuda_dl);
1914 
1915  dl_fn->nvenc_device_count = 0;
1916 
1917  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1918 
1919  return 0;
1920 }
1921 
1923 {
1924  NvencContext *ctx = avctx->priv_data;
1925  int ret;
1926 
1927  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1928  AVHWFramesContext *frames_ctx;
1929  if (!avctx->hw_frames_ctx) {
1930  av_log(avctx, AV_LOG_ERROR,
1931  "hw_frames_ctx must be set when using GPU frames as input\n");
1932  return AVERROR(EINVAL);
1933  }
1934  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1935  if (frames_ctx->format != avctx->pix_fmt) {
1936  av_log(avctx, AV_LOG_ERROR,
1937  "hw_frames_ctx must match the GPU frame type\n");
1938  return AVERROR(EINVAL);
1939  }
1940  ctx->data_pix_fmt = frames_ctx->sw_format;
1941  } else {
1942  ctx->data_pix_fmt = avctx->pix_fmt;
1943  }
1944 
1945  ctx->frame = av_frame_alloc();
1946  if (!ctx->frame)
1947  return AVERROR(ENOMEM);
1948 
1949  if ((ret = nvenc_load_libraries(avctx)) < 0)
1950  return ret;
1951 
1952  if ((ret = nvenc_setup_device(avctx)) < 0)
1953  return ret;
1954 
1955  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1956  return ret;
1957 
1958  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1959  return ret;
1960 
1961  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1962  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1963  return ret;
1964  }
1965 
1966  return 0;
1967 }
1968 
1970 {
1971  NvencSurface *tmp_surf;
1972 
1973  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
1974  // queue empty
1975  return NULL;
1976 
1977  return tmp_surf;
1978 }
1979 
1980 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1981  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1982 {
1983  int dst_linesize[4] = {
1984  lock_buffer_params->pitch,
1985  lock_buffer_params->pitch,
1986  lock_buffer_params->pitch,
1987  lock_buffer_params->pitch
1988  };
1989  uint8_t *dst_data[4];
1990  int ret;
1991 
1992  if (frame->format == AV_PIX_FMT_YUV420P)
1993  dst_linesize[1] = dst_linesize[2] >>= 1;
1994 
1995  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1996  lock_buffer_params->bufferDataPtr, dst_linesize);
1997  if (ret < 0)
1998  return ret;
1999 
2000  if (frame->format == AV_PIX_FMT_YUV420P)
2001  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2002 
2003  av_image_copy(dst_data, dst_linesize,
2004  (const uint8_t**)frame->data, frame->linesize, frame->format,
2005  avctx->width, avctx->height);
2006 
2007  return 0;
2008 }
2009 
2011 {
2012  NvencContext *ctx = avctx->priv_data;
2013  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2014  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2015  NVENCSTATUS nv_status;
2016 
2017  int i, first_round;
2018 
2019  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2020  for (first_round = 1; first_round >= 0; first_round--) {
2021  for (i = 0; i < ctx->nb_registered_frames; i++) {
2022  if (!ctx->registered_frames[i].mapped) {
2023  if (ctx->registered_frames[i].regptr) {
2024  if (first_round)
2025  continue;
2026  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2027  if (nv_status != NV_ENC_SUCCESS)
2028  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2029  ctx->registered_frames[i].ptr = NULL;
2030  ctx->registered_frames[i].regptr = NULL;
2031  }
2032  return i;
2033  }
2034  }
2035  }
2036  } else {
2037  return ctx->nb_registered_frames++;
2038  }
2039 
2040  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2041  return AVERROR(ENOMEM);
2042 }
2043 
2045 {
2046  NvencContext *ctx = avctx->priv_data;
2047  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2048  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2049 
2050  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2051  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2052  int i, idx, ret;
2053 
2054  for (i = 0; i < ctx->nb_registered_frames; i++) {
2055  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2056  return i;
2057  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2058  return i;
2059  }
2060 
2061  idx = nvenc_find_free_reg_resource(avctx);
2062  if (idx < 0)
2063  return idx;
2064 
2065  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2066  reg.width = frames_ctx->width;
2067  reg.height = frames_ctx->height;
2068  reg.pitch = frame->linesize[0];
2069  reg.resourceToRegister = frame->data[0];
2070 
2071  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2072  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2073  }
2074  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2075  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2076  reg.subResourceIndex = (intptr_t)frame->data[1];
2077  }
2078 
2079  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2080  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2081  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2082  av_get_pix_fmt_name(frames_ctx->sw_format));
2083  return AVERROR(EINVAL);
2084  }
2085 
2086  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2087  if (ret != NV_ENC_SUCCESS) {
2088  nvenc_print_error(avctx, ret, "Error registering an input resource");
2089  return AVERROR_UNKNOWN;
2090  }
2091 
2092  ctx->registered_frames[idx].ptr = frame->data[0];
2093  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2094  ctx->registered_frames[idx].regptr = reg.registeredResource;
2095  return idx;
2096 }
2097 
2099  NvencSurface *nvenc_frame)
2100 {
2101  NvencContext *ctx = avctx->priv_data;
2102  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2103  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2104 
2105  int res;
2106  NVENCSTATUS nv_status;
2107 
2108  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2109  int reg_idx = nvenc_register_frame(avctx, frame);
2110  if (reg_idx < 0) {
2111  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2112  return reg_idx;
2113  }
2114 
2115  res = av_frame_ref(nvenc_frame->in_ref, frame);
2116  if (res < 0)
2117  return res;
2118 
2119  if (!ctx->registered_frames[reg_idx].mapped) {
2120  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2121  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2122  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2123  if (nv_status != NV_ENC_SUCCESS) {
2124  av_frame_unref(nvenc_frame->in_ref);
2125  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2126  }
2127  }
2128 
2129  ctx->registered_frames[reg_idx].mapped += 1;
2130 
2131  nvenc_frame->reg_idx = reg_idx;
2132  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2133  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2134  nvenc_frame->pitch = frame->linesize[0];
2135 
2136  return 0;
2137  } else {
2138  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2139 
2140  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2141  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2142 
2143  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2144  if (nv_status != NV_ENC_SUCCESS) {
2145  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2146  }
2147 
2148  nvenc_frame->pitch = lockBufferParams.pitch;
2149  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2150 
2151  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2152  if (nv_status != NV_ENC_SUCCESS) {
2153  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2154  }
2155 
2156  return res;
2157  }
2158 }
2159 
2161  NV_ENC_PIC_PARAMS *params,
2162  NV_ENC_SEI_PAYLOAD *sei_data,
2163  int sei_count)
2164 {
2165  NvencContext *ctx = avctx->priv_data;
2166 
2167  switch (avctx->codec->id) {
2168  case AV_CODEC_ID_H264:
2169  params->codecPicParams.h264PicParams.sliceMode =
2170  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2171  params->codecPicParams.h264PicParams.sliceModeData =
2172  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2173  if (sei_count > 0) {
2174  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2175  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2176  }
2177 
2178  break;
2179  case AV_CODEC_ID_HEVC:
2180  params->codecPicParams.hevcPicParams.sliceMode =
2181  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2182  params->codecPicParams.hevcPicParams.sliceModeData =
2183  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2184  if (sei_count > 0) {
2185  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2186  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2187  }
2188 
2189  break;
2190 #if CONFIG_AV1_NVENC_ENCODER
2191  case AV_CODEC_ID_AV1:
2192  params->codecPicParams.av1PicParams.numTileColumns =
2193  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2194  params->codecPicParams.av1PicParams.numTileRows =
2195  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2196  if (sei_count > 0) {
2197  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2198  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2199  }
2200 
2201  break;
2202 #endif
2203  }
2204 }
2205 
2206 static void reorder_queue_enqueue(AVFifo *queue, const AVCodecContext *avctx,
2207  const AVFrame *frame, AVBufferRef **opaque_ref)
2208 {
2209  FrameData fd;
2210 
2211  fd.pts = frame->pts;
2212  fd.duration = frame->duration;
2213 #if FF_API_REORDERED_OPAQUE
2215  fd.reordered_opaque = frame->reordered_opaque;
2217 #endif
2218  fd.frame_opaque = frame->opaque;
2219  fd.frame_opaque_ref = *opaque_ref;
2220 
2221  *opaque_ref = NULL;
2222 
2223  av_fifo_write(queue, &fd, 1);
2224 }
2225 
2226 static int64_t reorder_queue_dequeue(AVFifo *queue, AVCodecContext *avctx,
2227  AVPacket *pkt)
2228 {
2229  FrameData fd;
2230 
2231  // The following call might fail if the queue is empty.
2232  if (av_fifo_read(queue, &fd, 1) < 0)
2233  return AV_NOPTS_VALUE;
2234 
2235  if (pkt) {
2236 #if FF_API_REORDERED_OPAQUE
2238  avctx->reordered_opaque = fd.reordered_opaque;
2240 #endif
2241  pkt->duration = fd.duration;
2242 
2243  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2244  pkt->opaque = fd.frame_opaque;
2246  fd.frame_opaque_ref = NULL;
2247  }
2248  }
2249 
2251 
2252  return fd.pts;
2253 }
2254 
2256  NV_ENC_LOCK_BITSTREAM *params,
2257  AVPacket *pkt)
2258 {
2259  NvencContext *ctx = avctx->priv_data;
2260  int64_t dts;
2261 
2262  pkt->pts = params->outputTimeStamp;
2263 
2264  dts = reorder_queue_dequeue(ctx->reorder_queue, avctx, pkt);
2265 
2267  pkt->dts = dts - FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
2268  } else {
2269  pkt->dts = pkt->pts;
2270  }
2271 
2272  return 0;
2273 }
2274 
2276 {
2277  NvencContext *ctx = avctx->priv_data;
2278  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2279  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2280 
2281  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2282  NVENCSTATUS nv_status;
2283  int res = 0;
2284 
2285  enum AVPictureType pict_type;
2286 
2287  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2288 
2289  lock_params.doNotWait = 0;
2290  lock_params.outputBitstream = tmpoutsurf->output_surface;
2291 
2292  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2293  if (nv_status != NV_ENC_SUCCESS) {
2294  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2295  goto error;
2296  }
2297 
2298  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2299 
2300  if (res < 0) {
2301  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2302  goto error;
2303  }
2304 
2305  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2306 
2307  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2308  if (nv_status != NV_ENC_SUCCESS) {
2309  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2310  goto error;
2311  }
2312 
2313 
2314  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2315  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2316  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2317  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2318  if (nv_status != NV_ENC_SUCCESS) {
2319  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2320  goto error;
2321  }
2322  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2323  res = AVERROR_BUG;
2324  goto error;
2325  }
2326 
2327  av_frame_unref(tmpoutsurf->in_ref);
2328 
2329  tmpoutsurf->input_surface = NULL;
2330  }
2331 
2332  switch (lock_params.pictureType) {
2333  case NV_ENC_PIC_TYPE_IDR:
2335  case NV_ENC_PIC_TYPE_I:
2336  pict_type = AV_PICTURE_TYPE_I;
2337  break;
2338  case NV_ENC_PIC_TYPE_P:
2339  pict_type = AV_PICTURE_TYPE_P;
2340  break;
2341  case NV_ENC_PIC_TYPE_B:
2342  pict_type = AV_PICTURE_TYPE_B;
2343  break;
2344  case NV_ENC_PIC_TYPE_BI:
2345  pict_type = AV_PICTURE_TYPE_BI;
2346  break;
2347  default:
2348  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2349  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2350  res = AVERROR_EXTERNAL;
2351  goto error;
2352  }
2353 
2355  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2356 
2357  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2358  if (res < 0)
2359  goto error2;
2360 
2361  return 0;
2362 
2363 error:
2364  reorder_queue_dequeue(ctx->reorder_queue, avctx, NULL);
2365 
2366 error2:
2367  return res;
2368 }
2369 
2370 static int output_ready(AVCodecContext *avctx, int flush)
2371 {
2372  NvencContext *ctx = avctx->priv_data;
2373  int nb_ready, nb_pending;
2374 
2375  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2376  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2377  if (flush)
2378  return nb_ready > 0;
2379  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2380 }
2381 
2383 {
2384  NvencContext *ctx = avctx->priv_data;
2385  int sei_count = 0;
2386  int i, res;
2387 
2389  void *a53_data = NULL;
2390  size_t a53_size = 0;
2391 
2392  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2393  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2394  }
2395 
2396  if (a53_data) {
2397  void *tmp = av_fast_realloc(ctx->sei_data,
2398  &ctx->sei_data_size,
2399  (sei_count + 1) * sizeof(*ctx->sei_data));
2400  if (!tmp) {
2401  av_free(a53_data);
2402  res = AVERROR(ENOMEM);
2403  goto error;
2404  } else {
2405  ctx->sei_data = tmp;
2406  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2407  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2408 
2409 #if CONFIG_AV1_NVENC_ENCODER
2410  if (avctx->codec->id == AV_CODEC_ID_AV1)
2411  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2412  else
2413 #endif
2414  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2415 
2416  sei_count++;
2417  }
2418  }
2419  }
2420 
2422  void *tc_data = NULL;
2423  size_t tc_size = 0;
2424 
2425  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2426  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2427  }
2428 
2429  if (tc_data) {
2430  void *tmp = av_fast_realloc(ctx->sei_data,
2431  &ctx->sei_data_size,
2432  (sei_count + 1) * sizeof(*ctx->sei_data));
2433  if (!tmp) {
2434  av_free(tc_data);
2435  res = AVERROR(ENOMEM);
2436  goto error;
2437  } else {
2438  ctx->sei_data = tmp;
2439  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2440  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2441 
2442 #if CONFIG_AV1_NVENC_ENCODER
2443  if (avctx->codec->id == AV_CODEC_ID_AV1)
2444  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2445  else
2446 #endif
2447  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2448 
2449  sei_count++;
2450  }
2451  }
2452  }
2453 
2454  if (!ctx->udu_sei)
2455  return sei_count;
2456 
2457  for (i = 0; i < frame->nb_side_data; i++) {
2458  AVFrameSideData *side_data = frame->side_data[i];
2459  void *tmp;
2460 
2461  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2462  continue;
2463 
2464  tmp = av_fast_realloc(ctx->sei_data,
2465  &ctx->sei_data_size,
2466  (sei_count + 1) * sizeof(*ctx->sei_data));
2467  if (!tmp) {
2468  res = AVERROR(ENOMEM);
2469  goto error;
2470  } else {
2471  ctx->sei_data = tmp;
2472  ctx->sei_data[sei_count].payloadSize = side_data->size;
2473  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2474  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2475 
2476  if (!ctx->sei_data[sei_count].payload) {
2477  res = AVERROR(ENOMEM);
2478  goto error;
2479  }
2480 
2481  sei_count++;
2482  }
2483  }
2484 
2485  return sei_count;
2486 
2487 error:
2488  for (i = 0; i < sei_count; i++)
2489  av_freep(&(ctx->sei_data[i].payload));
2490 
2491  return res;
2492 }
2493 
2494 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2495 {
2496  NvencContext *ctx = avctx->priv_data;
2497  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2498  NVENCSTATUS ret;
2499 
2500  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2501  int needs_reconfig = 0;
2502  int needs_encode_config = 0;
2503  int reconfig_bitrate = 0, reconfig_dar = 0;
2504  int dw, dh;
2505 
2506  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2507  params.reInitEncodeParams = ctx->init_encode_params;
2508 
2509  compute_dar(avctx, &dw, &dh);
2510  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2511  av_log(avctx, AV_LOG_VERBOSE,
2512  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2513  ctx->init_encode_params.darWidth,
2514  ctx->init_encode_params.darHeight, dw, dh);
2515 
2516  params.reInitEncodeParams.darHeight = dh;
2517  params.reInitEncodeParams.darWidth = dw;
2518 
2519  needs_reconfig = 1;
2520  reconfig_dar = 1;
2521  }
2522 
2523  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2524  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2525  av_log(avctx, AV_LOG_VERBOSE,
2526  "avg bitrate change: %d -> %d\n",
2527  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2528  (uint32_t)avctx->bit_rate);
2529 
2530  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2531  reconfig_bitrate = 1;
2532  }
2533 
2534  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2535  av_log(avctx, AV_LOG_VERBOSE,
2536  "max bitrate change: %d -> %d\n",
2537  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2538  (uint32_t)avctx->rc_max_rate);
2539 
2540  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2541  reconfig_bitrate = 1;
2542  }
2543 
2544  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2545  av_log(avctx, AV_LOG_VERBOSE,
2546  "vbv buffer size change: %d -> %d\n",
2547  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2548  avctx->rc_buffer_size);
2549 
2550  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2551  reconfig_bitrate = 1;
2552  }
2553 
2554  if (reconfig_bitrate) {
2555  params.resetEncoder = 1;
2556  params.forceIDR = 1;
2557 
2558  needs_encode_config = 1;
2559  needs_reconfig = 1;
2560  }
2561  }
2562 
2563  if (!needs_encode_config)
2564  params.reInitEncodeParams.encodeConfig = NULL;
2565 
2566  if (needs_reconfig) {
2567  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2568  if (ret != NV_ENC_SUCCESS) {
2569  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2570  } else {
2571  if (reconfig_dar) {
2572  ctx->init_encode_params.darHeight = dh;
2573  ctx->init_encode_params.darWidth = dw;
2574  }
2575 
2576  if (reconfig_bitrate) {
2577  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2578  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2579  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2580  }
2581 
2582  }
2583  }
2584 }
2585 
2586 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2587 {
2588  NVENCSTATUS nv_status;
2589  NvencSurface *tmp_out_surf, *in_surf;
2590  int res, res2;
2591  int sei_count = 0;
2592  int i;
2593 
2594  AVBufferRef *opaque_ref = NULL;
2595 
2596  NvencContext *ctx = avctx->priv_data;
2597  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2598  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2599 
2600  NV_ENC_PIC_PARAMS pic_params = { 0 };
2601  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2602 
2603  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2604  return AVERROR(EINVAL);
2605 
2606  if (frame && frame->buf[0]) {
2607  in_surf = get_free_frame(ctx);
2608  if (!in_surf)
2609  return AVERROR(EAGAIN);
2610 
2611  res = nvenc_push_context(avctx);
2612  if (res < 0)
2613  return res;
2614 
2615  reconfig_encoder(avctx, frame);
2616 
2617  res = nvenc_upload_frame(avctx, frame, in_surf);
2618 
2619  res2 = nvenc_pop_context(avctx);
2620  if (res2 < 0)
2621  return res2;
2622 
2623  if (res)
2624  return res;
2625 
2626  pic_params.inputBuffer = in_surf->input_surface;
2627  pic_params.bufferFmt = in_surf->format;
2628  pic_params.inputWidth = in_surf->width;
2629  pic_params.inputHeight = in_surf->height;
2630  pic_params.inputPitch = in_surf->pitch;
2631  pic_params.outputBitstream = in_surf->output_surface;
2632 
2633  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2634  if (frame->top_field_first)
2635  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2636  else
2637  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2638  } else {
2639  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2640  }
2641 
2642  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2643  pic_params.encodePicFlags =
2644  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2645  } else {
2646  pic_params.encodePicFlags = 0;
2647  }
2648 
2649  pic_params.inputTimeStamp = frame->pts;
2650 
2651  if (ctx->extra_sei) {
2652  res = prepare_sei_data_array(avctx, frame);
2653  if (res < 0)
2654  return res;
2655  sei_count = res;
2656  }
2657 
2658  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2659  } else {
2660  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2661  }
2662 
2663  // make a reference for enqueing in the reorder queue here,
2664  // so that reorder_queue_enqueue() cannot fail
2665  if (frame && frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2666  opaque_ref = av_buffer_ref(frame->opaque_ref);
2667  if (!opaque_ref)
2668  return AVERROR(ENOMEM);
2669  }
2670 
2671  res = nvenc_push_context(avctx);
2672  if (res < 0)
2673  goto opaque_ref_fail;
2674 
2675  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2676 
2677  for (i = 0; i < sei_count; i++)
2678  av_freep(&(ctx->sei_data[i].payload));
2679 
2680  res = nvenc_pop_context(avctx);
2681  if (res < 0)
2682  goto opaque_ref_fail;
2683 
2684  if (nv_status != NV_ENC_SUCCESS &&
2685  nv_status != NV_ENC_ERR_NEED_MORE_INPUT) {
2686  res = nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2687  goto opaque_ref_fail;
2688  }
2689 
2690  if (frame && frame->buf[0]) {
2691  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
2692  reorder_queue_enqueue(ctx->reorder_queue, avctx, frame, &opaque_ref);
2693  }
2694 
2695  /* all the pending buffers are now ready for output */
2696  if (nv_status == NV_ENC_SUCCESS) {
2697  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
2698  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2699  }
2700 
2701  return 0;
2702 
2703 opaque_ref_fail:
2704  av_buffer_unref(&opaque_ref);
2705  return res;
2706 }
2707 
2709 {
2710  NvencSurface *tmp_out_surf;
2711  int res, res2;
2712 
2713  NvencContext *ctx = avctx->priv_data;
2714 
2715  AVFrame *frame = ctx->frame;
2716 
2717  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2718  return AVERROR(EINVAL);
2719 
2720  if (!frame->buf[0]) {
2721  res = ff_encode_get_frame(avctx, frame);
2722  if (res < 0 && res != AVERROR_EOF)
2723  return res;
2724  }
2725 
2726  res = nvenc_send_frame(avctx, frame);
2727  if (res < 0) {
2728  if (res != AVERROR(EAGAIN))
2729  return res;
2730  } else
2732 
2733  if (output_ready(avctx, avctx->internal->draining)) {
2734  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2735 
2736  res = nvenc_push_context(avctx);
2737  if (res < 0)
2738  return res;
2739 
2740  res = process_output_surface(avctx, pkt, tmp_out_surf);
2741 
2742  res2 = nvenc_pop_context(avctx);
2743  if (res2 < 0)
2744  return res2;
2745 
2746  if (res)
2747  return res;
2748 
2749  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
2750  } else if (avctx->internal->draining) {
2751  return AVERROR_EOF;
2752  } else {
2753  return AVERROR(EAGAIN);
2754  }
2755 
2756  return 0;
2757 }
2758 
2760 {
2761  NvencContext *ctx = avctx->priv_data;
2762 
2763  nvenc_send_frame(avctx, NULL);
2764  reorder_queue_flush(ctx->reorder_queue);
2765 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:31
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
reorder_queue_enqueue
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Definition: nvenc.c:2206
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1656
FF_ENABLE_DEPRECATION_WARNINGS
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:82
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
AV_LOG_WARNING
#define AV_LOG_WARNING
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Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:192
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
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Definition: pixfmt.h:253
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
name
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const GUID guid
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Definition: common.h:95
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:1002
P3
#define P3
Definition: hevcdsp_template.c:1497
FrameData
Definition: ffmpeg.c:117
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:682
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:434
GUIDTuple
Definition: nvenc.c:187
NONE
@ NONE
Definition: af_afade.c:61
GUIDTuple::flags
int flags
Definition: nvenc.c:189
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:2888
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:602
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1604
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:357
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2370
NvencContext
Definition: nvenc.h:153
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:83
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:99
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:330
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:995
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2255
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:661
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:374
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:713
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1616
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2494
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:588
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:51
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:799
NvencSurface
Definition: nvenc.h:80
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:392
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:146
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1028
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1225
nverr
NVENCSTATUS nverr
Definition: nvenc.c:99
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:145
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:904
PRESET
#define PRESET(name,...)
Definition: nvenc.c:195
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:429
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2759
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:30
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:317
nvenc.h
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:302
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1481
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:1750
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:593
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2098
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:99
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:278
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:730
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:837
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:131
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:435
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:410
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:442
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:186
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:142
fail
#define fail()
Definition: checkasm.h:134
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
dummy
int dummy
Definition: motion.c:65
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:90
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:974
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:197
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:506
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1608
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1980
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:95
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:251
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:309
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:459
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:87
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:988
pkt
AVPacket * pkt
Definition: movenc.c:59
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:239
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1653
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:528
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:721
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1922
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:495
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:492
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:472
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1222
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:437
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:557
NvencDynLoadFunctions
Definition: nvenc.h:93
av_assert0
#define av_assert0(cond)
assert() equivalent, that is always enabled.
Definition: avassert.h:37
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
ctx
AVFormatContext * ctx
Definition: movenc.c:48
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:136
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1805
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1254
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:399
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:96
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:126
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:87
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:82
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1239
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:46
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:134
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:478
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:83
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:988
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:149
reorder_queue_flush
static void reorder_queue_flush(AVFifo *queue)
Definition: nvenc.c:177
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:84
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:1009
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:283
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:461
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:476
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1839
FrameData::duration
int64_t duration
Definition: librav1e.c:59
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:135
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1654
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:64
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:95
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1146
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
convert_header.major
int major
Definition: convert_header.py:23
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:548
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:517
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:101
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:368
FF_PROFILE_AV1_MAIN
#define FF_PROFILE_AV1_MAIN
Definition: avcodec.h:1661
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:94
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:620
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:344
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:406
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:73
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:1068
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1708
reorder_queue_dequeue
static int64_t reorder_queue_dequeue(AVFifo *queue, AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2226
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:238
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:608
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2044
AVCodecHWConfigInternal
Definition: hwconfig.h:29
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2708
buffer.h
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:373
nvenc_errors
static const struct @115 nvenc_errors[]
height
#define height
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:432
FrameData::pts
int64_t pts
Definition: ffmpeg.c:119
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:918
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:380
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:333
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:65
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:141
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1969
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:706
AVCodec::id
enum AVCodecID id
Definition: codec.h:198
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:380
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:97
convert_header.minor
int minor
Definition: convert_header.py:26
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:269
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:367
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:527
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2275
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:313
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:949
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:131
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:226
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2382
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:478
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:516
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:254
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1928
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:90
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:47
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:598
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:635
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:44
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1677
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:262
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:150
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:510
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1887
NvencSurface::width
int width
Definition: nvenc.h:85
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1514
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:100
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:436
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:147
cuda_check.h
atsc_a53.h
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:130
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2160
AVCodecContext
main external API structure.
Definition: avcodec.h:426
AVCodecContext::codec_descriptor
const AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1771
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:79
NvencSurface::height
int height
Definition: nvenc.h:86
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1218
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1565
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1764
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:737
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:237
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:89
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2010
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1606
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:508
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:142
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:143
FF_DISABLE_DEPRECATION_WARNINGS
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:81
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:158
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:98
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts_bsf.c:367
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:697
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:183
AVBufferRef
A reference to a data buffer.
Definition: buffer.h:82
packet_internal.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:236
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
av_free
#define av_free(p)
Definition: tableprint_vlc.h:33
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:140
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1025
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: packet.h:351
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:453
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:34
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:683
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:598
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1464
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int
int
Definition: ffmpeg_filter.c:156
hevc_sei.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:795
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1268
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2586
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2808
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:141