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cpu.c
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1/*
2 * This file is part of FFmpeg.
3 *
4 * FFmpeg is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2.1 of the License, or (at your option) any later version.
8 *
9 * FFmpeg is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
13 *
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with FFmpeg; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#include "config.h"
20
21#if HAVE_SCHED_GETAFFINITY
22#ifndef _GNU_SOURCE
23# define _GNU_SOURCE
24#endif
25#include <sched.h>
26#endif
27
28#include <stddef.h>
29#include <stdint.h>
30#include <stdatomic.h>
31
32#include "attributes.h"
33#include "cpu.h"
34#include "cpu_internal.h"
35#include "opt.h"
36#include "common.h"
37
38#if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
39#include <windows.h>
40#endif
41#if HAVE_SYSCTL
42#if HAVE_SYS_PARAM_H
43#include <sys/param.h>
44#endif
45#include <sys/types.h>
46#include <sys/sysctl.h>
47#endif
48#if HAVE_UNISTD_H
49#include <unistd.h>
50#endif
51
52#if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
53#include <sys/auxv.h>
54#endif
55
56static atomic_int cpu_flags = -1;
57static atomic_int cpu_count = -1;
58
59static int get_cpu_flags(void)
60{
61#if ARCH_MIPS
62 return ff_get_cpu_flags_mips();
63#elif ARCH_AARCH64
64 return ff_get_cpu_flags_aarch64();
65#elif ARCH_ARM
66 return ff_get_cpu_flags_arm();
67#elif ARCH_PPC
68 return ff_get_cpu_flags_ppc();
69#elif ARCH_RISCV
70 return ff_get_cpu_flags_riscv();
71#elif ARCH_WASM
72 return ff_get_cpu_flags_wasm();
73#elif ARCH_X86
74 return ff_get_cpu_flags_x86();
75#elif ARCH_LOONGARCH
76 return ff_get_cpu_flags_loongarch();
77#endif
78 return 0;
79}
80
108
109int av_get_cpu_flags(void)
110{
111 int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
112 if (flags == -1) {
113 flags = get_cpu_flags();
114 atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
115 }
116 return flags;
117}
118
119int av_parse_cpu_caps(unsigned *flags, const char *s)
120{
121 static const AVOption cpuflags_opts[] = {
122 { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
123#if ARCH_PPC
124 { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
125 { "vsx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VSX }, .unit = "flags" },
126 { "power8" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_POWER8 }, .unit = "flags" },
127#elif ARCH_X86
128 { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
129 { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
130 { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
131 { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
132 { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
133 { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
134 { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
135 { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
136 { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
137 { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
138 { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
139 { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
140 { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
141 { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
142 { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
143 { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
144 { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
145 { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
146 { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
147 { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
148 { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
149 { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
150 { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
151 { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
152 { "clmul", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CLMUL }, .unit = "flags" },
153 { "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512 }, .unit = "flags" },
154 { "avx512icl", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512ICL }, .unit = "flags" },
155 { "slowgather", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SLOW_GATHER }, .unit = "flags" },
156
157#define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
158#define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
159#define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
160 { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
161 { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
162 { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
163
164#define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
165#define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
166#define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
167#define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
168 { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
169 { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
170 { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
171 { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
172 { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
173#elif ARCH_ARM
174 { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
175 { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
176 { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
177 { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
178 { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
179 { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
180 { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
181 { "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
182#elif ARCH_AARCH64
183 { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
184 { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
185 { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
186 { "dotprod", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_DOTPROD }, .unit = "flags" },
187 { "i8mm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_I8MM }, .unit = "flags" },
188 { "sve", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SVE }, .unit = "flags" },
189 { "sve2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SVE2 }, .unit = "flags" },
190 { "sme", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME }, .unit = "flags" },
191 { "crc", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARM_CRC }, .unit = "flags" },
192 { "sme_i16i64", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME_I16I64 }, .unit = "flags" },
193 { "sme2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME2 }, .unit = "flags" },
194 { "pmull", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_PMULL }, .unit = "flags" },
195 { "eor3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_EOR3 }, .unit = "flags" },
196#elif ARCH_MIPS
197 { "mmi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMI }, .unit = "flags" },
198 { "msa", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MSA }, .unit = "flags" },
199#elif ARCH_LOONGARCH
200 { "lsx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LSX }, .unit = "flags" },
201 { "lasx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LASX }, .unit = "flags" },
202#elif ARCH_RISCV
203 { "rvi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVI }, .unit = "flags" },
204 { "rvb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB }, .unit = "flags" },
205 { "zve32x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I32 }, .unit = "flags" },
206 { "zve32f", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F32 }, .unit = "flags" },
207 { "zve64x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I64 }, .unit = "flags" },
208 { "zve64d", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F64 }, .unit = "flags" },
209 { "zbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_BASIC }, .unit = "flags" },
210 { "zvbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_ZVBB }, .unit = "flags" },
211 { "misaligned", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_MISALIGNED }, .unit = "flags" },
212#elif ARCH_WASM
213 { "simd128", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SIMD128 }, .unit = "flags" },
214#endif
215 { NULL },
216 };
217 static const AVClass class = {
218 .class_name = "cpuflags",
219 .item_name = av_default_item_name,
220 .option = cpuflags_opts,
221 .version = LIBAVUTIL_VERSION_INT,
222 };
223 const AVClass *pclass = &class;
224
225 return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
226}
227
228int av_cpu_count(void)
229{
230 static atomic_int printed = 0;
231
232 int nb_cpus = 1;
233 int count = 0;
234#if HAVE_WINRT
235 SYSTEM_INFO sysinfo;
236#endif
237#if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
238 cpu_set_t cpuset;
239
240 CPU_ZERO(&cpuset);
241
242 if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
243 nb_cpus = CPU_COUNT(&cpuset);
244#elif HAVE_GETPROCESSAFFINITYMASK
245 DWORD_PTR proc_aff, sys_aff;
246 if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
247 nb_cpus = av_popcount64(proc_aff);
248#elif HAVE_SYSCTL && defined(HW_NCPUONLINE)
249 int mib[2] = { CTL_HW, HW_NCPUONLINE };
250 size_t len = sizeof(nb_cpus);
251
252 if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
253 nb_cpus = 0;
254#elif HAVE_SYSCTL && defined(HW_NCPU)
255 int mib[2] = { CTL_HW, HW_NCPU };
256 size_t len = sizeof(nb_cpus);
257
258 if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
259 nb_cpus = 0;
260#elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
261 nb_cpus = sysconf(_SC_NPROC_ONLN);
262#elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
263 nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
264#elif HAVE_WINRT
265 GetNativeSystemInfo(&sysinfo);
266 nb_cpus = sysinfo.dwNumberOfProcessors;
267#endif
268
269 if (!atomic_exchange_explicit(&printed, 1, memory_order_relaxed))
270 av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
271
272 count = atomic_load_explicit(&cpu_count, memory_order_relaxed);
273
274 if (count > 0) {
275 nb_cpus = count;
276 av_log(NULL, AV_LOG_DEBUG, "overriding to %d logical cores\n", nb_cpus);
277 }
278
279 return nb_cpus;
280}
281
282void av_cpu_force_count(int count)
283{
284 atomic_store_explicit(&cpu_count, count, memory_order_relaxed);
285}
286
287size_t av_cpu_max_align(void)
288{
289#if ARCH_MIPS
290 return ff_get_cpu_max_align_mips();
291#elif ARCH_AARCH64
292 return ff_get_cpu_max_align_aarch64();
293#elif ARCH_ARM
294 return ff_get_cpu_max_align_arm();
295#elif ARCH_PPC
296 return ff_get_cpu_max_align_ppc();
297#elif ARCH_WASM
298 return ff_get_cpu_max_align_wasm();
299#elif ARCH_X86
300 return ff_get_cpu_max_align_x86();
301#elif ARCH_LOONGARCH
302 return ff_get_cpu_max_align_loongarch();
303#endif
304
305 return 8;
306}
307
308#if !ARCH_X86
309unsigned long ff_getauxval(unsigned long type)
310{
311#if HAVE_GETAUXVAL
312 return getauxval(type);
313#elif HAVE_ELF_AUX_INFO
314 unsigned long aux = 0;
315 int ret = elf_aux_info(type, &aux, sizeof(aux));
316 if (ret != 0) {
317 errno = ret;
318 }
319 return aux;
320#else
321 errno = ENOSYS;
322 return 0;
323#endif
324}
325#endif
flags
#define flags(name, subs,...)
Definition cbs_h264.c:74
s
#define s(width, name)
Definition cbs_vp9.c:198
ARCH_X86
#define ARCH_X86
Definition checkasm_config.h:77
common.h
common internal and external API header
av_popcount64
#define av_popcount64
Definition common.h:157
NULL
#define NULL
Definition coverity.c:32
cpu_internal.h
ff_get_cpu_max_align_mips
size_t ff_get_cpu_max_align_mips(void)
Definition cpu.c:119
ff_get_cpu_flags_loongarch
int ff_get_cpu_flags_loongarch(void)
Definition cpu.c:41
ff_get_cpu_flags_x86
int ff_get_cpu_flags_x86(void)
Definition cpu.c:90
ff_get_cpu_flags_wasm
int ff_get_cpu_flags_wasm(void)
Definition cpu.c:25
ff_get_cpu_flags_mips
int ff_get_cpu_flags_mips(void)
Definition cpu.c:106
ff_get_cpu_flags_riscv
int ff_get_cpu_flags_riscv(void)
Definition cpu.c:52
ff_get_cpu_max_align_ppc
size_t ff_get_cpu_max_align_ppc(void)
Definition cpu.c:146
ff_get_cpu_max_align_loongarch
size_t ff_get_cpu_max_align_loongarch(void)
Definition cpu.c:51
ff_get_cpu_max_align_wasm
size_t ff_get_cpu_max_align_wasm(void)
Definition cpu.c:34
ff_get_cpu_flags_ppc
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition cpu.c:64
ff_get_cpu_max_align_x86
size_t ff_get_cpu_max_align_x86(void)
Definition cpu.c:260
atomic_int
intptr_t atomic_int
Definition stdatomic.h:55
atomic_load_explicit
#define atomic_load_explicit(object, order)
Definition stdatomic.h:96
atomic_exchange_explicit
#define atomic_exchange_explicit(object, desired, order)
Definition stdatomic.h:106
atomic_store_explicit
#define atomic_store_explicit(object, desired, order)
Definition stdatomic.h:90
AV_OPT_TYPE_CONST
@ AV_OPT_TYPE_CONST
Special option type for declaring named constants.
Definition opt.h:298
AV_OPT_TYPE_FLAGS
@ AV_OPT_TYPE_FLAGS
Underlying C type is unsigned int.
Definition opt.h:254
AV_LOG_DEBUG
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
Definition log.h:231
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition log.h:216
av_default_item_name
const char * av_default_item_name(void *ptr)
Return the context name.
Definition log.c:241
LIBAVUTIL_VERSION_INT
#define LIBAVUTIL_VERSION_INT
Definition version.h:85
av_opt_eval_flags
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
type
cl_device_type type
Definition hwcontext_opencl.c:213
arg
const char * arg
Definition jacosubdec.c:65
ff_get_cpu_flags_aarch64
int ff_get_cpu_flags_aarch64(void)
Definition cpu.c:205
ff_get_cpu_max_align_aarch64
size_t ff_get_cpu_max_align_aarch64(void)
Definition cpu.c:246
ff_get_cpu_flags_arm
int ff_get_cpu_flags_arm(void)
Definition cpu.c:185
ff_get_cpu_max_align_arm
size_t ff_get_cpu_max_align_arm(void)
Definition cpu.c:198
attributes.h
Macro definitions for various function/variable attributes.
av_cpu_max_align
size_t av_cpu_max_align(void)
Get the maximum data alignment that may be required by FFmpeg.
Definition cpu.c:287
get_cpu_flags
static int get_cpu_flags(void)
Definition cpu.c:59
av_force_cpu_flags
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition cpu.c:81
cpu_flags
static atomic_int cpu_flags
Definition cpu.c:56
av_parse_cpu_caps
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition cpu.c:119
av_cpu_force_count
void av_cpu_force_count(int count)
Overrides cpu count detection and forces the specified count.
Definition cpu.c:282
ff_getauxval
unsigned long ff_getauxval(unsigned long type)
Definition cpu.c:309
cpu_count
static atomic_int cpu_count
Definition cpu.c:57
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition cpu.c:109
av_cpu_count
int av_cpu_count(void)
Definition cpu.c:228
AV_CPU_FLAG_DOTPROD
#define AV_CPU_FLAG_DOTPROD
Definition cpu.h:76
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition cpu.h:99
AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_ARMV5TE
Definition cpu.h:68
AV_CPU_FLAG_FMA3
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition cpu.h:57
AV_CPU_FLAG_SSE2
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition cpu.h:37
AV_CPU_FLAG_BMI1
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition cpu.h:58
AV_CPU_FLAG_SVE
#define AV_CPU_FLAG_SVE
Definition cpu.h:78
AV_CPU_FLAG_RVI
#define AV_CPU_FLAG_RVI
I (full GPR bank)
Definition cpu.h:96
AV_CPU_FLAG_VFPV3
#define AV_CPU_FLAG_VFPV3
Definition cpu.h:72
AV_CPU_FLAG_LASX
#define AV_CPU_FLAG_LASX
Definition cpu.h:93
AV_CPU_FLAG_SSE3SLOW
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster than regular MMX/SSE (e.g.
Definition cpu.h:42
AV_CPU_FLAG_AVX512
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
Definition cpu.h:60
AV_CPU_FLAG_VFP
#define AV_CPU_FLAG_VFP
Definition cpu.h:71
AV_CPU_FLAG_SSE42
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition cpu.h:48
AV_CPU_FLAG_NEON
#define AV_CPU_FLAG_NEON
Definition cpu.h:73
AV_CPU_FLAG_I8MM
#define AV_CPU_FLAG_I8MM
Definition cpu.h:77
AV_CPU_FLAG_CMOV
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition cpu.h:55
AV_CPU_FLAG_SVE2
#define AV_CPU_FLAG_SVE2
Definition cpu.h:79
AV_CPU_FLAG_SSE
#define AV_CPU_FLAG_SSE
SSE functions.
Definition cpu.h:36
AV_CPU_FLAG_RVB
#define AV_CPU_FLAG_RVB
B (bit manipulations)
Definition cpu.h:104
AV_CPU_FLAG_MMX2
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
Definition cpu.h:34
AV_CPU_FLAG_RVB_BASIC
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
Definition cpu.h:101
AV_CPU_FLAG_SSE4
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition cpu.h:47
AV_CPU_FLAG_FMA4
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition cpu.h:54
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition cpu.h:97
AV_CPU_FLAG_VSX
#define AV_CPU_FLAG_VSX
ISA 2.06.
Definition cpu.h:65
AV_CPU_FLAG_POWER8
#define AV_CPU_FLAG_POWER8
ISA 2.07.
Definition cpu.h:66
AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_SETEND
Definition cpu.h:84
AV_CPU_FLAG_BMI2
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition cpu.h:59
AV_CPU_FLAG_SSE2SLOW
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster than regular MMX/SSE (e.g.
Definition cpu.h:38
AV_CPU_FLAG_MMXEXT
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition cpu.h:33
AV_CPU_FLAG_SSE3
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition cpu.h:41
AV_CPU_FLAG_AESNI
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition cpu.h:49
AV_CPU_FLAG_LSX
#define AV_CPU_FLAG_LSX
Definition cpu.h:92
AV_CPU_FLAG_SME_I16I64
#define AV_CPU_FLAG_SME_I16I64
Definition cpu.h:83
AV_CPU_FLAG_ARMV6T2
#define AV_CPU_FLAG_ARMV6T2
Definition cpu.h:70
AV_CPU_FLAG_3DNOWEXT
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition cpu.h:40
AV_CPU_FLAG_XOP
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition cpu.h:53
AV_CPU_FLAG_ALTIVEC
#define AV_CPU_FLAG_ALTIVEC
standard
Definition cpu.h:64
AV_CPU_FLAG_EOR3
#define AV_CPU_FLAG_EOR3
Definition cpu.h:86
AV_CPU_FLAG_ATOM
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition cpu.h:46
AV_CPU_FLAG_VFP_VM
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition cpu.h:75
AV_CPU_FLAG_AVX2
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition cpu.h:56
AV_CPU_FLAG_SME2
#define AV_CPU_FLAG_SME2
Definition cpu.h:82
AV_CPU_FLAG_SSSE3
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition cpu.h:44
AV_CPU_FLAG_ARM_CRC
#define AV_CPU_FLAG_ARM_CRC
Definition cpu.h:81
AV_CPU_FLAG_AVX512ICL
#define AV_CPU_FLAG_AVX512ICL
F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ.
Definition cpu.h:61
AV_CPU_FLAG_CLMUL
#define AV_CPU_FLAG_CLMUL
Carry-less Multiplication instruction.
Definition cpu.h:50
AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_ARMV8
Definition cpu.h:74
AV_CPU_FLAG_PMULL
#define AV_CPU_FLAG_PMULL
Definition cpu.h:85
AV_CPU_FLAG_SLOW_GATHER
#define AV_CPU_FLAG_SLOW_GATHER
CPU has slow gathers.
Definition cpu.h:62
AV_CPU_FLAG_SIMD128
#define AV_CPU_FLAG_SIMD128
Definition cpu.h:107
AV_CPU_FLAG_MSA
#define AV_CPU_FLAG_MSA
Definition cpu.h:89
AV_CPU_FLAG_RV_ZVBB
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
Definition cpu.h:102
AV_CPU_FLAG_AVXSLOW
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition cpu.h:52
AV_CPU_FLAG_RVV_F32
#define AV_CPU_FLAG_RVV_F32
Vectors of float's *‍/.
Definition cpu.h:98
AV_CPU_FLAG_ARMV6
#define AV_CPU_FLAG_ARMV6
Definition cpu.h:69
AV_CPU_FLAG_SME
#define AV_CPU_FLAG_SME
Definition cpu.h:80
AV_CPU_FLAG_MMX
#define AV_CPU_FLAG_MMX
standard MMX
Definition cpu.h:32
AV_CPU_FLAG_MMI
#define AV_CPU_FLAG_MMI
Definition cpu.h:88
AV_CPU_FLAG_RVV_F64
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
Definition cpu.h:100
AV_CPU_FLAG_3DNOW
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition cpu.h:35
AV_CPU_FLAG_AVX
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition cpu.h:51
AV_CPU_FLAG_RV_MISALIGNED
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
Definition cpu.h:103
opt.h
AVOptions.
AVClass
Describe the class of an AVClass context structure.
Definition log.h:76
AVClass::class_name
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition log.h:81
AVOption
AVOption.
Definition opt.h:428
av_log
#define av_log(a,...)
Definition tableprint_vlc.h:27
len
int len
Definition vorbis_enc_data.h:426
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