32#define REMATRIX_CHANNEL_FUNC(opt) \
33void ff_mlp_rematrix_channel_##opt(int32_t *samples, \
34 const int32_t *coeffs, \
35 const uint8_t *bypassed_lsbs, \
36 const int8_t *noise_buffer, \
38 unsigned int dest_ch, \
40 unsigned int maxchan, \
41 int matrix_noise_shift, \
42 int access_unit_size_pow2, \
48#if HAVE_X86_7REGS && HAVE_INLINE_ASM && HAVE_INLINE_ASM_NONLOCAL_LABELS
50extern char ff_mlp_firorder_8;
51extern char ff_mlp_firorder_7;
52extern char ff_mlp_firorder_6;
53extern char ff_mlp_firorder_5;
54extern char ff_mlp_firorder_4;
55extern char ff_mlp_firorder_3;
56extern char ff_mlp_firorder_2;
57extern char ff_mlp_firorder_1;
58extern char ff_mlp_firorder_0;
60extern char ff_mlp_iirorder_4;
61extern char ff_mlp_iirorder_3;
62extern char ff_mlp_iirorder_2;
63extern char ff_mlp_iirorder_1;
64extern char ff_mlp_iirorder_0;
66static const void *
const firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
67 &ff_mlp_firorder_2, &ff_mlp_firorder_3,
68 &ff_mlp_firorder_4, &ff_mlp_firorder_5,
69 &ff_mlp_firorder_6, &ff_mlp_firorder_7,
71static const void *
const iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
72 &ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
77#define MLPMUL(label, offset, offs, offc) \
78 LABEL_MANGLE(label)": \n\t" \
79 "movslq "offset"+"offs"(%0), %%rax\n\t" \
80 "movslq "offset"+"offc"(%1), %%rdx\n\t" \
81 "imul %%rdx, %%rax\n\t" \
82 "add %%rax, %%rsi\n\t"
84#define FIRMULREG(label, offset, firc)\
85 LABEL_MANGLE(label)": \n\t" \
86 "movslq "#offset"(%0), %%rax\n\t" \
87 "imul %"#firc", %%rax\n\t" \
88 "add %%rax, %%rsi\n\t"
91 "xor %%rsi, %%rsi\n\t"
98#define RESULT32 "%%esi"
102#define MLPMUL(label, offset, offs, offc) \
103 LABEL_MANGLE(label)": \n\t" \
104 "mov "offset"+"offs"(%0), %%eax\n\t" \
105 "imull "offset"+"offc"(%1) \n\t" \
106 "add %%eax , %%esi\n\t" \
107 "adc %%edx , %%ecx\n\t"
109#define FIRMULREG(label, offset, firc) \
110 MLPMUL(label, #offset, "0", "0")
113 "xor %%esi, %%esi\n\t" \
114 "xor %%ecx, %%ecx\n\t"
117 "mov %%ecx, %%edx\n\t" \
118 "mov %%esi, %%eax\n\t" \
119 "movzbl %7 , %%ecx\n\t" \
120 "shrd %%cl, %%edx, %%eax\n\t" \
123#define RESULT "%%eax"
124#define RESULT32 "%%eax"
128#define BINC AV_STRINGIFY(4* MAX_CHANNELS)
129#define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
130#define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
132#define FIRMUL(label, offset) MLPMUL(label, #offset, "0", "0")
133#define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
136 int firorder,
int iirorder,
138 int blocksize,
int32_t *sample_buffer)
140 const void *firjump = firtable[firorder];
141 const void *iirjump = iirtable[iirorder];
143 blocksize = -blocksize;
149 FIRMUL (ff_mlp_firorder_8, 0x1c )
150 FIRMUL (ff_mlp_firorder_7, 0x18 )
151 FIRMUL (ff_mlp_firorder_6, 0x14 )
152 FIRMUL (ff_mlp_firorder_5, 0x10 )
153 FIRMUL (ff_mlp_firorder_4, 0x0c )
154 FIRMUL (ff_mlp_firorder_3, 0x08 )
155 FIRMUL (ff_mlp_firorder_2, 0x04 )
156 FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
159 IIRMUL (ff_mlp_iirorder_4, 0x0c )
160 IIRMUL (ff_mlp_iirorder_3, 0x08 )
161 IIRMUL (ff_mlp_iirorder_2, 0x04 )
162 IIRMUL (ff_mlp_iirorder_1, 0x00 )
165 "mov "RESULT
" ,"ACCUM" \n\t"
166 "add (%2) ,"RESULT
" \n\t"
167 "and %4 ,"RESULT
" \n\t"
169 "mov "RESULT32
", (%0) \n\t"
170 "mov "RESULT32
", (%2) \n\t"
171 "add $"BINC
" , %2 \n\t"
172 "sub "ACCUM" ,"RESULT
" \n\t"
173 "mov "RESULT32
","IOFFS
"(%0) \n\t"
182 "r"(iirjump) ,
"c"(filter_shift)
184 :
"rax",
"rdx",
"rsi"
187 :
"m"(
mask),
"m"(firjump),
188 "m"(iirjump) ,
"m"(filter_shift)
189 :
"eax",
"edx",
"esi",
"ecx"
199#if HAVE_X86_7REGS && HAVE_INLINE_ASM && HAVE_INLINE_ASM_NONLOCAL_LABELS
201 c->mlp_filter_channel = mlp_filter_channel_x86;
205 c->mlp_rematrix_channel = ff_mlp_rematrix_channel_sse4;
207 c->mlp_rematrix_channel = ff_mlp_rematrix_channel_avx2_bmi2;
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
static struct @346255127015250356166251341105367306144006377143 state
Macro definitions for various function/variable attributes.
static atomic_int cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
#define EXTERNAL_AVX2_FAST(flags)
#define INLINE_MMX(flags)
#define EXTERNAL_SSE4(flags)
static const uint16_t mask[17]
Utility Preprocessor macros.
av_cold void ff_mlpdsp_init_x86(MLPDSPContext *c)
#define REMATRIX_CHANNEL_FUNC(opt)
static const double coeff[2][5]