FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 #include "hevc_sei.h"
26 
27 #include "libavutil/hwcontext_cuda.h"
28 #include "libavutil/hwcontext.h"
29 #include "libavutil/cuda_check.h"
30 #include "libavutil/imgutils.h"
31 #include "libavutil/mem.h"
32 #include "libavutil/pixdesc.h"
33 #include "atsc_a53.h"
34 #include "encode.h"
35 #include "internal.h"
36 #include "packet_internal.h"
37 
38 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
39 
40 #define NVENC_CAP 0x30
41 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
42  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
43  rc == NV_ENC_PARAMS_RC_CBR_HQ)
44 
45 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
46  AV_PIX_FMT_YUV420P,
47  AV_PIX_FMT_NV12,
48  AV_PIX_FMT_P010,
49  AV_PIX_FMT_YUV444P,
50  AV_PIX_FMT_P016, // Truncated to 10bits
51  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
52  AV_PIX_FMT_0RGB32,
53  AV_PIX_FMT_0BGR32,
54  AV_PIX_FMT_GBRP,
55  AV_PIX_FMT_GBRP16, // Truncated to 10bits
56  AV_PIX_FMT_CUDA,
57 #if CONFIG_D3D11VA
58  AV_PIX_FMT_D3D11,
59 #endif
60  AV_PIX_FMT_NONE
61 };
62 
63 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
64  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
65  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
66 #if CONFIG_D3D11VA
67  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
68  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
69 #endif
70  NULL,
71 };
72 
73 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
74  pix_fmt == AV_PIX_FMT_P016 || \
75  pix_fmt == AV_PIX_FMT_YUV444P16 || \
76  pix_fmt == AV_PIX_FMT_GBRP16)
77 
78 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
79  pix_fmt == AV_PIX_FMT_YUV444P16 || \
80  pix_fmt == AV_PIX_FMT_GBRP || \
81  pix_fmt == AV_PIX_FMT_GBRP16)
82 
83 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
84  pix_fmt == AV_PIX_FMT_GBRP16)
85 
86 static const struct {
87  NVENCSTATUS nverr;
88  int averr;
89  const char *desc;
90 } nvenc_errors[] = {
91  { NV_ENC_SUCCESS, 0, "success" },
92  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
93  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
94  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
95  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
96  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
97  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
98  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
99  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
100  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
101  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
102  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
103  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
104  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
105  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
106  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
107  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
108  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
109  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
110  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
111  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
112  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
113  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
114  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
115  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
116  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
117 };
118 
119 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
120 {
121  int i;
122  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
123  if (nvenc_errors[i].nverr == err) {
124  if (desc)
125  *desc = nvenc_errors[i].desc;
126  return nvenc_errors[i].averr;
127  }
128  }
129  if (desc)
130  *desc = "unknown error";
131  return AVERROR_UNKNOWN;
132 }
133 
134 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
135  const char *error_string)
136 {
137  const char *desc;
138  const char *details = "(no details)";
139  int ret = nvenc_map_error(err, &desc);
140 
141 #ifdef NVENC_HAVE_GETLASTERRORSTRING
142  NvencContext *ctx = avctx->priv_data;
143  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
144 
145  if (p_nvenc && ctx->nvencoder)
146  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
147 #endif
148 
149  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
150 
151  return ret;
152 }
153 
154 typedef struct GUIDTuple {
155  const GUID guid;
156  int flags;
157 } GUIDTuple;
158 
159 #define PRESET_ALIAS(alias, name, ...) \
160  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
161 
162 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
163 
164 static void nvenc_map_preset(NvencContext *ctx)
165 {
166  GUIDTuple presets[] = {
167 #ifdef NVENC_HAVE_NEW_PRESETS
168  PRESET(P1),
169  PRESET(P2),
170  PRESET(P3),
171  PRESET(P4),
172  PRESET(P5),
173  PRESET(P6),
174  PRESET(P7),
175  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
176  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
177  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
178  // Compat aliases
179  PRESET_ALIAS(DEFAULT, P4, NVENC_DEPRECATED_PRESET),
180  PRESET_ALIAS(HP, P1, NVENC_DEPRECATED_PRESET),
181  PRESET_ALIAS(HQ, P7, NVENC_DEPRECATED_PRESET),
182  PRESET_ALIAS(BD, P5, NVENC_DEPRECATED_PRESET),
183  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
184  PRESET_ALIAS(LOW_LATENCY_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
185  PRESET_ALIAS(LOW_LATENCY_HQ, P7, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
186  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
187  PRESET_ALIAS(LOSSLESS_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
188 #else
189  PRESET(DEFAULT),
190  PRESET(HP),
191  PRESET(HQ),
192  PRESET(BD),
193  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
194  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
195  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
196  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
197  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
198  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
199  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
200  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
201 #endif
202  };
203 
204  GUIDTuple *t = &presets[ctx->preset];
205 
206  ctx->init_encode_params.presetGUID = t->guid;
207  ctx->flags = t->flags;
208 
209 #ifdef NVENC_HAVE_NEW_PRESETS
210  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
211  ctx->flags |= NVENC_LOSSLESS;
212 #endif
213 }
214 
215 #undef PRESET
216 #undef PRESET_ALIAS
217 
218 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
219 {
220 #if NVENCAPI_CHECK_VERSION(11, 2)
221  const char *minver = "(unknown)";
222 #elif NVENCAPI_CHECK_VERSION(11, 1)
223 # if defined(_WIN32) || defined(__CYGWIN__)
224  const char *minver = "471.41";
225 # else
226  const char *minver = "470.57.02";
227 # endif
228 #elif NVENCAPI_CHECK_VERSION(11, 0)
229 # if defined(_WIN32) || defined(__CYGWIN__)
230  const char *minver = "456.71";
231 # else
232  const char *minver = "455.28";
233 # endif
234 #elif NVENCAPI_CHECK_VERSION(10, 0)
235 # if defined(_WIN32) || defined(__CYGWIN__)
236  const char *minver = "450.51";
237 # else
238  const char *minver = "445.87";
239 # endif
240 #elif NVENCAPI_CHECK_VERSION(9, 1)
241 # if defined(_WIN32) || defined(__CYGWIN__)
242  const char *minver = "436.15";
243 # else
244  const char *minver = "435.21";
245 # endif
246 #elif NVENCAPI_CHECK_VERSION(9, 0)
247 # if defined(_WIN32) || defined(__CYGWIN__)
248  const char *minver = "418.81";
249 # else
250  const char *minver = "418.30";
251 # endif
252 #elif NVENCAPI_CHECK_VERSION(8, 2)
253 # if defined(_WIN32) || defined(__CYGWIN__)
254  const char *minver = "397.93";
255 # else
256  const char *minver = "396.24";
257 #endif
258 #elif NVENCAPI_CHECK_VERSION(8, 1)
259 # if defined(_WIN32) || defined(__CYGWIN__)
260  const char *minver = "390.77";
261 # else
262  const char *minver = "390.25";
263 # endif
264 #else
265 # if defined(_WIN32) || defined(__CYGWIN__)
266  const char *minver = "378.66";
267 # else
268  const char *minver = "378.13";
269 # endif
270 #endif
271  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
272 }
273 
274 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
275 {
276  NvencContext *ctx = avctx->priv_data;
277  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
278  NVENCSTATUS err;
279  uint32_t nvenc_max_ver;
280  int ret;
281 
282  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
283  if (ret < 0)
284  return ret;
285 
286  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
287  if (ret < 0) {
288  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
289  return ret;
290  }
291 
292  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
293  if (err != NV_ENC_SUCCESS)
294  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
295 
296  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
297 
298  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
299  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
300  "Required: %d.%d Found: %d.%d\n",
301  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
302  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
303  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
304  return AVERROR(ENOSYS);
305  }
306 
307  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
308 
309  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
310  if (err != NV_ENC_SUCCESS)
311  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
312 
313  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
314 
315  return 0;
316 }
317 
318 static int nvenc_push_context(AVCodecContext *avctx)
319 {
320  NvencContext *ctx = avctx->priv_data;
321  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
322 
323  if (ctx->d3d11_device)
324  return 0;
325 
326  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
327 }
328 
329 static int nvenc_pop_context(AVCodecContext *avctx)
330 {
331  NvencContext *ctx = avctx->priv_data;
332  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
333  CUcontext dummy;
334 
335  if (ctx->d3d11_device)
336  return 0;
337 
338  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
339 }
340 
341 static av_cold int nvenc_open_session(AVCodecContext *avctx)
342 {
343  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
344  NvencContext *ctx = avctx->priv_data;
345  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
346  NVENCSTATUS ret;
347 
348  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
349  params.apiVersion = NVENCAPI_VERSION;
350  if (ctx->d3d11_device) {
351  params.device = ctx->d3d11_device;
352  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
353  } else {
354  params.device = ctx->cu_context;
355  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
356  }
357 
358  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
359  if (ret != NV_ENC_SUCCESS) {
360  ctx->nvencoder = NULL;
361  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
362  }
363 
364  return 0;
365 }
366 
367 static int nvenc_check_codec_support(AVCodecContext *avctx)
368 {
369  NvencContext *ctx = avctx->priv_data;
370  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
371  int i, ret, count = 0;
372  GUID *guids = NULL;
373 
374  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
375 
376  if (ret != NV_ENC_SUCCESS || !count)
377  return AVERROR(ENOSYS);
378 
379  guids = av_malloc(count * sizeof(GUID));
380  if (!guids)
381  return AVERROR(ENOMEM);
382 
383  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
384  if (ret != NV_ENC_SUCCESS) {
385  ret = AVERROR(ENOSYS);
386  goto fail;
387  }
388 
389  ret = AVERROR(ENOSYS);
390  for (i = 0; i < count; i++) {
391  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
392  ret = 0;
393  break;
394  }
395  }
396 
397 fail:
398  av_free(guids);
399 
400  return ret;
401 }
402 
403 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
404 {
405  NvencContext *ctx = avctx->priv_data;
406  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
407  NV_ENC_CAPS_PARAM params = { 0 };
408  int ret, val = 0;
409 
410  params.version = NV_ENC_CAPS_PARAM_VER;
411  params.capsToQuery = cap;
412 
413  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
414 
415  if (ret == NV_ENC_SUCCESS)
416  return val;
417  return 0;
418 }
419 
420 static int nvenc_check_capabilities(AVCodecContext *avctx)
421 {
422  NvencContext *ctx = avctx->priv_data;
423  int ret;
424 
425  ret = nvenc_check_codec_support(avctx);
426  if (ret < 0) {
427  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
428  return ret;
429  }
430 
431  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
432  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
433  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
434  return AVERROR(ENOSYS);
435  }
436 
437  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
438  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
439  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
440  return AVERROR(ENOSYS);
441  }
442 
443  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
444  if (ret < avctx->width) {
445  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
446  avctx->width, ret);
447  return AVERROR(ENOSYS);
448  }
449 
450  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
451  if (ret < avctx->height) {
452  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
453  avctx->height, ret);
454  return AVERROR(ENOSYS);
455  }
456 
457  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
458  if (ret < avctx->max_b_frames) {
459  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
460  avctx->max_b_frames, ret);
461 
462  return AVERROR(ENOSYS);
463  }
464 
465  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
466  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
467  av_log(avctx, AV_LOG_WARNING,
468  "Interlaced encoding is not supported. Supported level: %d\n",
469  ret);
470  return AVERROR(ENOSYS);
471  }
472 
473  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
474  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
475  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
476  return AVERROR(ENOSYS);
477  }
478 
479  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
480  if (ctx->rc_lookahead > 0 && ret <= 0) {
481  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
482  return AVERROR(ENOSYS);
483  }
484 
485  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
486  if (ctx->temporal_aq > 0 && ret <= 0) {
487  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
488  return AVERROR(ENOSYS);
489  }
490 
491  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
492  if (ctx->weighted_pred > 0 && ret <= 0) {
493  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
494  return AVERROR(ENOSYS);
495  }
496 
497  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
498  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
499  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
500  return AVERROR(ENOSYS);
501  }
502 
503 #ifdef NVENC_HAVE_BFRAME_REF_MODE
504  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
505  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
506  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
507  return AVERROR(ENOSYS);
508  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
509  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
510  return AVERROR(ENOSYS);
511  }
512 #else
513  if (ctx->b_ref_mode != 0) {
514  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
515  return AVERROR(ENOSYS);
516  }
517 #endif
518 
519 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
520  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
521  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
522  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
523  return AVERROR(ENOSYS);
524  }
525 #else
526  if(avctx->refs != 0) {
527  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
528  return AVERROR(ENOSYS);
529  }
530 #endif
531 
532 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
533  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
534  if(ctx->single_slice_intra_refresh && ret <= 0) {
535  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
536  return AVERROR(ENOSYS);
537  }
538 #else
539  if(ctx->single_slice_intra_refresh) {
540  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
541  return AVERROR(ENOSYS);
542  }
543 #endif
544 
545  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
546  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
547  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
548  return AVERROR(ENOSYS);
549  }
550 
551 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
552  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
553  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
554  return AVERROR(ENOSYS);
555  }
556 #endif
557 
558  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
559  if(ctx->constrained_encoding && ret <= 0) {
560  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
561  return AVERROR(ENOSYS);
562  }
563 
564  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
565 
566  return 0;
567 }
568 
569 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
570 {
571  NvencContext *ctx = avctx->priv_data;
572  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
573  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
574  char name[128] = { 0};
575  int major, minor, ret;
576  CUdevice cu_device;
577  int loglevel = AV_LOG_VERBOSE;
578 
579  if (ctx->device == LIST_DEVICES)
580  loglevel = AV_LOG_INFO;
581 
582  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
583  if (ret < 0)
584  return ret;
585 
586  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
587  if (ret < 0)
588  return ret;
589 
590  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
591  if (ret < 0)
592  return ret;
593 
594  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
595  if (((major << 4) | minor) < NVENC_CAP) {
596  av_log(avctx, loglevel, "does not support NVENC\n");
597  goto fail;
598  }
599 
600  if (ctx->device != idx && ctx->device != ANY_DEVICE)
601  return -1;
602 
603  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
604  if (ret < 0)
605  goto fail;
606 
607  ctx->cu_context = ctx->cu_context_internal;
608  ctx->cu_stream = NULL;
609 
610  if ((ret = nvenc_pop_context(avctx)) < 0)
611  goto fail2;
612 
613  if ((ret = nvenc_open_session(avctx)) < 0)
614  goto fail2;
615 
616  if ((ret = nvenc_check_capabilities(avctx)) < 0)
617  goto fail3;
618 
619  av_log(avctx, loglevel, "supports NVENC\n");
620 
621  dl_fn->nvenc_device_count++;
622 
623  if (ctx->device == idx || ctx->device == ANY_DEVICE)
624  return 0;
625 
626 fail3:
627  if ((ret = nvenc_push_context(avctx)) < 0)
628  return ret;
629 
630  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
631  ctx->nvencoder = NULL;
632 
633  if ((ret = nvenc_pop_context(avctx)) < 0)
634  return ret;
635 
636 fail2:
637  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
638  ctx->cu_context_internal = NULL;
639 
640 fail:
641  return AVERROR(ENOSYS);
642 }
643 
644 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
645 {
646  NvencContext *ctx = avctx->priv_data;
647  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
648 
649  switch (avctx->codec->id) {
650  case AV_CODEC_ID_H264:
651  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
652  break;
653  case AV_CODEC_ID_HEVC:
654  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
655  break;
656  default:
657  return AVERROR_BUG;
658  }
659 
660  nvenc_map_preset(ctx);
661 
662  if (ctx->flags & NVENC_DEPRECATED_PRESET)
663  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
664 
665  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
666  AVHWFramesContext *frames_ctx;
667  AVHWDeviceContext *hwdev_ctx;
668  AVCUDADeviceContext *cuda_device_hwctx = NULL;
669 #if CONFIG_D3D11VA
670  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
671 #endif
672  int ret;
673 
674  if (avctx->hw_frames_ctx) {
675  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
676  if (frames_ctx->format == AV_PIX_FMT_CUDA)
677  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
678 #if CONFIG_D3D11VA
679  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
680  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
681 #endif
682  else
683  return AVERROR(EINVAL);
684  } else if (avctx->hw_device_ctx) {
685  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
686  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
687  cuda_device_hwctx = hwdev_ctx->hwctx;
688 #if CONFIG_D3D11VA
689  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
690  d3d11_device_hwctx = hwdev_ctx->hwctx;
691 #endif
692  else
693  return AVERROR(EINVAL);
694  } else {
695  return AVERROR(EINVAL);
696  }
697 
698  if (cuda_device_hwctx) {
699  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
700  ctx->cu_stream = cuda_device_hwctx->stream;
701  }
702 #if CONFIG_D3D11VA
703  else if (d3d11_device_hwctx) {
704  ctx->d3d11_device = d3d11_device_hwctx->device;
705  ID3D11Device_AddRef(ctx->d3d11_device);
706  }
707 #endif
708 
709  ret = nvenc_open_session(avctx);
710  if (ret < 0)
711  return ret;
712 
713  ret = nvenc_check_capabilities(avctx);
714  if (ret < 0) {
715  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
716  return ret;
717  }
718  } else {
719  int i, nb_devices = 0;
720 
721  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
722  return AVERROR_UNKNOWN;
723 
724  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
725  return AVERROR_UNKNOWN;
726 
727  if (!nb_devices) {
728  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
729  return AVERROR_EXTERNAL;
730  }
731 
732  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
733 
734  dl_fn->nvenc_device_count = 0;
735  for (i = 0; i < nb_devices; ++i) {
736  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
737  return 0;
738  }
739 
740  if (ctx->device == LIST_DEVICES)
741  return AVERROR_EXIT;
742 
743  if (!dl_fn->nvenc_device_count) {
744  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
745  return AVERROR_EXTERNAL;
746  }
747 
748  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
749  return AVERROR(EINVAL);
750  }
751 
752  return 0;
753 }
754 
755 static av_cold void set_constqp(AVCodecContext *avctx)
756 {
757  NvencContext *ctx = avctx->priv_data;
758  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
759 
760  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
761 
762  if (ctx->init_qp_p >= 0) {
763  rc->constQP.qpInterP = ctx->init_qp_p;
764  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
765  rc->constQP.qpIntra = ctx->init_qp_i;
766  rc->constQP.qpInterB = ctx->init_qp_b;
767  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
768  rc->constQP.qpIntra = av_clip(
769  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
770  rc->constQP.qpInterB = av_clip(
771  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
772  } else {
773  rc->constQP.qpIntra = rc->constQP.qpInterP;
774  rc->constQP.qpInterB = rc->constQP.qpInterP;
775  }
776  } else if (ctx->cqp >= 0) {
777  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
778  if (avctx->b_quant_factor != 0.0)
779  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
780  if (avctx->i_quant_factor != 0.0)
781  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
782  }
783 
784  avctx->qmin = -1;
785  avctx->qmax = -1;
786 }
787 
788 static av_cold void set_vbr(AVCodecContext *avctx)
789 {
790  NvencContext *ctx = avctx->priv_data;
791  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
792  int qp_inter_p;
793 
794  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
795  rc->enableMinQP = 1;
796  rc->enableMaxQP = 1;
797 
798  rc->minQP.qpInterB = avctx->qmin;
799  rc->minQP.qpInterP = avctx->qmin;
800  rc->minQP.qpIntra = avctx->qmin;
801 
802  rc->maxQP.qpInterB = avctx->qmax;
803  rc->maxQP.qpInterP = avctx->qmax;
804  rc->maxQP.qpIntra = avctx->qmax;
805 
806  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
807  } else if (avctx->qmin >= 0) {
808  rc->enableMinQP = 1;
809 
810  rc->minQP.qpInterB = avctx->qmin;
811  rc->minQP.qpInterP = avctx->qmin;
812  rc->minQP.qpIntra = avctx->qmin;
813 
814  qp_inter_p = avctx->qmin;
815  } else {
816  qp_inter_p = 26; // default to 26
817  }
818 
819  rc->enableInitialRCQP = 1;
820 
821  if (ctx->init_qp_p < 0) {
822  rc->initialRCQP.qpInterP = qp_inter_p;
823  } else {
824  rc->initialRCQP.qpInterP = ctx->init_qp_p;
825  }
826 
827  if (ctx->init_qp_i < 0) {
828  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
829  rc->initialRCQP.qpIntra = av_clip(
830  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
831  } else {
832  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
833  }
834  } else {
835  rc->initialRCQP.qpIntra = ctx->init_qp_i;
836  }
837 
838  if (ctx->init_qp_b < 0) {
839  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
840  rc->initialRCQP.qpInterB = av_clip(
841  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
842  } else {
843  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
844  }
845  } else {
846  rc->initialRCQP.qpInterB = ctx->init_qp_b;
847  }
848 }
849 
850 static av_cold void set_lossless(AVCodecContext *avctx)
851 {
852  NvencContext *ctx = avctx->priv_data;
853  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
854 
855  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
856  rc->constQP.qpInterB = 0;
857  rc->constQP.qpInterP = 0;
858  rc->constQP.qpIntra = 0;
859 
860  avctx->qmin = -1;
861  avctx->qmax = -1;
862 }
863 
864 static void nvenc_override_rate_control(AVCodecContext *avctx)
865 {
866  NvencContext *ctx = avctx->priv_data;
867  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
868 
869  switch (ctx->rc) {
870  case NV_ENC_PARAMS_RC_CONSTQP:
871  set_constqp(avctx);
872  return;
873  case NV_ENC_PARAMS_RC_VBR_MINQP:
874  if (avctx->qmin < 0) {
875  av_log(avctx, AV_LOG_WARNING,
876  "The variable bitrate rate-control requires "
877  "the 'qmin' option set.\n");
878  set_vbr(avctx);
879  return;
880  }
881  /* fall through */
882  case NV_ENC_PARAMS_RC_VBR_HQ:
883  case NV_ENC_PARAMS_RC_VBR:
884  set_vbr(avctx);
885  break;
886  case NV_ENC_PARAMS_RC_CBR:
887  case NV_ENC_PARAMS_RC_CBR_HQ:
888  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
889  break;
890  }
891 
892  rc->rateControlMode = ctx->rc;
893 }
894 
895 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
896 {
897  NvencContext *ctx = avctx->priv_data;
898  // default minimum of 4 surfaces
899  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
900  // another multiply by 2 to avoid blocking next PBB group
901  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
902 
903  // lookahead enabled
904  if (ctx->rc_lookahead > 0) {
905  // +1 is to account for lkd_bound calculation later
906  // +4 is to allow sufficient pipelining with lookahead
907  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
908  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
909  {
910  av_log(avctx, AV_LOG_WARNING,
911  "Defined rc_lookahead requires more surfaces, "
912  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
913  }
914  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
915  } else {
916  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
917  {
918  av_log(avctx, AV_LOG_WARNING,
919  "Defined b-frame requires more surfaces, "
920  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
921  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
922  }
923  else if (ctx->nb_surfaces <= 0)
924  ctx->nb_surfaces = nb_surfaces;
925  // otherwise use user specified value
926  }
927 
928  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
929  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
930 
931  return 0;
932 }
933 
934 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
935 {
936  NvencContext *ctx = avctx->priv_data;
937 
938  if (avctx->global_quality > 0)
939  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
940 
941  if (ctx->cqp < 0 && avctx->global_quality > 0)
942  ctx->cqp = avctx->global_quality;
943 
944  if (avctx->bit_rate > 0) {
945  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
946  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
947  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
948  }
949 
950  if (avctx->rc_max_rate > 0)
951  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
952 
953 #ifdef NVENC_HAVE_MULTIPASS
954  ctx->encode_config.rcParams.multiPass = ctx->multipass;
955 
956  if (ctx->flags & NVENC_ONE_PASS)
957  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
958  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
959  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
960 
961  if (ctx->rc < 0) {
962  if (ctx->cbr) {
963  ctx->rc = NV_ENC_PARAMS_RC_CBR;
964  } else if (ctx->cqp >= 0) {
965  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
966  } else if (ctx->quality >= 0.0f) {
967  ctx->rc = NV_ENC_PARAMS_RC_VBR;
968  }
969  }
970 #else
971  if (ctx->rc < 0) {
972  if (ctx->flags & NVENC_ONE_PASS)
973  ctx->twopass = 0;
974  if (ctx->flags & NVENC_TWO_PASSES)
975  ctx->twopass = 1;
976 
977  if (ctx->twopass < 0)
978  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
979 
980  if (ctx->cbr) {
981  if (ctx->twopass) {
982  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
983  } else {
984  ctx->rc = NV_ENC_PARAMS_RC_CBR;
985  }
986  } else if (ctx->cqp >= 0) {
987  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
988  } else if (ctx->twopass) {
989  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
990  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
991  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
992  }
993  }
994 #endif
995 
996  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
997  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
998  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
999 
1000  ctx->rc &= ~RC_MODE_DEPRECATED;
1001  }
1002 
1003 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1004  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1005  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1006 #else
1007  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1008  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1009 #endif
1010 
1011 #ifdef NVENC_HAVE_LDKFS
1012  if (ctx->ldkfs)
1013  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1014 #endif
1015 
1016  if (ctx->flags & NVENC_LOSSLESS) {
1017  set_lossless(avctx);
1018  } else if (ctx->rc >= 0) {
1019  nvenc_override_rate_control(avctx);
1020  } else {
1021  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1022  set_vbr(avctx);
1023  }
1024 
1025  if (avctx->rc_buffer_size > 0) {
1026  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1027  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1028  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1029  }
1030 
1031  if (ctx->aq) {
1032  ctx->encode_config.rcParams.enableAQ = 1;
1033  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1034  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1035  }
1036 
1037  if (ctx->temporal_aq) {
1038  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1039  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1040  }
1041 
1042  if (ctx->rc_lookahead > 0) {
1043  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1044  ctx->encode_config.frameIntervalP - 4;
1045 
1046  if (lkd_bound < 0) {
1047  av_log(avctx, AV_LOG_WARNING,
1048  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1049  } else {
1050  ctx->encode_config.rcParams.enableLookahead = 1;
1051  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1052  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1053  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1054  av_log(avctx, AV_LOG_VERBOSE,
1055  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1056  ctx->encode_config.rcParams.lookaheadDepth,
1057  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1058  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1059  }
1060  }
1061 
1062  if (ctx->strict_gop) {
1063  ctx->encode_config.rcParams.strictGOPTarget = 1;
1064  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1065  }
1066 
1067  if (ctx->nonref_p)
1068  ctx->encode_config.rcParams.enableNonRefP = 1;
1069 
1070  if (ctx->zerolatency)
1071  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1072 
1073  if (ctx->quality) {
1074  //convert from float to fixed point 8.8
1075  int tmp_quality = (int)(ctx->quality * 256.0f);
1076  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1077  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1078 
1079  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1080 
1081  //CQ mode shall discard avg bitrate & honor max bitrate;
1082  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1083  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1084  }
1085 }
1086 
1087 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1088 {
1089  NvencContext *ctx = avctx->priv_data;
1090  NV_ENC_CONFIG *cc = &ctx->encode_config;
1091  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1092  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1093 
1094  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1095  vui->colourPrimaries = avctx->color_primaries;
1096  vui->transferCharacteristics = avctx->color_trc;
1097  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1098  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1099 
1100  vui->colourDescriptionPresentFlag =
1101  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1102 
1103  vui->videoSignalTypePresentFlag =
1104  (vui->colourDescriptionPresentFlag
1105  || vui->videoFormat != 5
1106  || vui->videoFullRangeFlag != 0);
1107 
1108  h264->sliceMode = 3;
1109  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1110 
1111  if (ctx->intra_refresh) {
1112  h264->enableIntraRefresh = 1;
1113  h264->intraRefreshPeriod = avctx->gop_size;
1114  h264->intraRefreshCnt = avctx->gop_size - 1;
1115 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1116  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1117 #endif
1118  }
1119 
1120  if (ctx->constrained_encoding)
1121  h264->enableConstrainedEncoding = 1;
1122 
1123  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1124  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1125  h264->outputAUD = ctx->aud;
1126 
1127  if (ctx->dpb_size >= 0) {
1128  /* 0 means "let the hardware decide" */
1129  h264->maxNumRefFrames = ctx->dpb_size;
1130  }
1131 
1132  if (ctx->intra_refresh) {
1133  h264->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1134  } else if (avctx->gop_size >= 0) {
1135  h264->idrPeriod = avctx->gop_size;
1136  }
1137 
1138  if (IS_CBR(cc->rcParams.rateControlMode)) {
1139  h264->outputBufferingPeriodSEI = 1;
1140  }
1141 
1142  h264->outputPictureTimingSEI = 1;
1143 
1144  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1145  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1146  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1147  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1148  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1149  }
1150 
1151  if (ctx->flags & NVENC_LOSSLESS) {
1152  h264->qpPrimeYZeroTransformBypassFlag = 1;
1153  } else {
1154  switch(ctx->profile) {
1155  case NV_ENC_H264_PROFILE_BASELINE:
1156  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1157  avctx->profile = FF_PROFILE_H264_BASELINE;
1158  break;
1159  case NV_ENC_H264_PROFILE_MAIN:
1160  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1161  avctx->profile = FF_PROFILE_H264_MAIN;
1162  break;
1163  case NV_ENC_H264_PROFILE_HIGH:
1164  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1165  avctx->profile = FF_PROFILE_H264_HIGH;
1166  break;
1167  case NV_ENC_H264_PROFILE_HIGH_444P:
1168  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1169  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1170  break;
1171  }
1172  }
1173 
1174  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1175  if (IS_YUV444(ctx->data_pix_fmt)) {
1176  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1177  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1178  }
1179 
1180  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1181 
1182  h264->level = ctx->level;
1183 
1184  if (ctx->coder >= 0)
1185  h264->entropyCodingMode = ctx->coder;
1186 
1187 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1188  h264->useBFramesAsRef = ctx->b_ref_mode;
1189 #endif
1190 
1191 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1192  h264->numRefL0 = avctx->refs;
1193  h264->numRefL1 = avctx->refs;
1194 #endif
1195 
1196  return 0;
1197 }
1198 
1199 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1200 {
1201  NvencContext *ctx = avctx->priv_data;
1202  NV_ENC_CONFIG *cc = &ctx->encode_config;
1203  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1204  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1205 
1206  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1207  vui->colourPrimaries = avctx->color_primaries;
1208  vui->transferCharacteristics = avctx->color_trc;
1209  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1210  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1211 
1212  vui->colourDescriptionPresentFlag =
1213  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1214 
1215  vui->videoSignalTypePresentFlag =
1216  (vui->colourDescriptionPresentFlag
1217  || vui->videoFormat != 5
1218  || vui->videoFullRangeFlag != 0);
1219 
1220  hevc->sliceMode = 3;
1221  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1222 
1223  if (ctx->intra_refresh) {
1224  hevc->enableIntraRefresh = 1;
1225  hevc->intraRefreshPeriod = avctx->gop_size;
1226  hevc->intraRefreshCnt = avctx->gop_size - 1;
1227 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1228  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1229 #endif
1230  }
1231 
1232 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1233  if (ctx->constrained_encoding)
1234  hevc->enableConstrainedEncoding = 1;
1235 #endif
1236 
1237  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1238  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1239  hevc->outputAUD = ctx->aud;
1240 
1241  if (ctx->dpb_size >= 0) {
1242  /* 0 means "let the hardware decide" */
1243  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1244  }
1245 
1246  if (ctx->intra_refresh) {
1247  hevc->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1248  } else if (avctx->gop_size >= 0) {
1249  hevc->idrPeriod = avctx->gop_size;
1250  }
1251 
1252  if (IS_CBR(cc->rcParams.rateControlMode)) {
1253  hevc->outputBufferingPeriodSEI = 1;
1254  }
1255 
1256  hevc->outputPictureTimingSEI = 1;
1257 
1258  switch (ctx->profile) {
1259  case NV_ENC_HEVC_PROFILE_MAIN:
1260  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1261  avctx->profile = FF_PROFILE_HEVC_MAIN;
1262  break;
1263  case NV_ENC_HEVC_PROFILE_MAIN_10:
1264  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1265  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1266  break;
1267  case NV_ENC_HEVC_PROFILE_REXT:
1268  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1269  avctx->profile = FF_PROFILE_HEVC_REXT;
1270  break;
1271  }
1272 
1273  // force setting profile as main10 if input is 10 bit
1274  if (IS_10BIT(ctx->data_pix_fmt)) {
1275  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1276  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1277  }
1278 
1279  // force setting profile as rext if input is yuv444
1280  if (IS_YUV444(ctx->data_pix_fmt)) {
1281  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1282  avctx->profile = FF_PROFILE_HEVC_REXT;
1283  }
1284 
1285  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1286 
1287  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1288 
1289  hevc->level = ctx->level;
1290 
1291  hevc->tier = ctx->tier;
1292 
1293 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1294  hevc->useBFramesAsRef = ctx->b_ref_mode;
1295 #endif
1296 
1297 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1298  hevc->numRefL0 = avctx->refs;
1299  hevc->numRefL1 = avctx->refs;
1300 #endif
1301 
1302  return 0;
1303 }
1304 
1305 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1306 {
1307  switch (avctx->codec->id) {
1308  case AV_CODEC_ID_H264:
1309  return nvenc_setup_h264_config(avctx);
1310  case AV_CODEC_ID_HEVC:
1311  return nvenc_setup_hevc_config(avctx);
1312  /* Earlier switch/case will return if unknown codec is passed. */
1313  }
1314 
1315  return 0;
1316 }
1317 
1318 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1319  int sw, sh;
1320 
1321  sw = avctx->width;
1322  sh = avctx->height;
1323 
1324  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1325  sw *= avctx->sample_aspect_ratio.num;
1326  sh *= avctx->sample_aspect_ratio.den;
1327  }
1328 
1329  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1330 }
1331 
1332 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1333 {
1334  NvencContext *ctx = avctx->priv_data;
1335  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1336  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1337 
1338  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1339  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1340  AVCPBProperties *cpb_props;
1341  int res = 0;
1342  int dw, dh;
1343 
1344  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1345  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1346 
1347  ctx->init_encode_params.encodeHeight = avctx->height;
1348  ctx->init_encode_params.encodeWidth = avctx->width;
1349 
1350  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1351 
1352  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1353  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1354 
1355 #ifdef NVENC_HAVE_NEW_PRESETS
1356  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1357 
1358  if (ctx->flags & NVENC_LOSSLESS)
1359  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1360  else if (ctx->flags & NVENC_LOWLATENCY)
1361  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1362 
1363  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1364  ctx->init_encode_params.encodeGUID,
1365  ctx->init_encode_params.presetGUID,
1366  ctx->init_encode_params.tuningInfo,
1367  &preset_config);
1368 #else
1369  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1370  ctx->init_encode_params.encodeGUID,
1371  ctx->init_encode_params.presetGUID,
1372  &preset_config);
1373 #endif
1374  if (nv_status != NV_ENC_SUCCESS)
1375  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1376 
1377  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1378 
1379  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1380 
1381  compute_dar(avctx, &dw, &dh);
1382  ctx->init_encode_params.darHeight = dh;
1383  ctx->init_encode_params.darWidth = dw;
1384 
1385  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1386  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1387  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1388  } else {
1389  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1390  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1391  }
1392 
1393  ctx->init_encode_params.enableEncodeAsync = 0;
1394  ctx->init_encode_params.enablePTD = 1;
1395 
1396 #ifdef NVENC_HAVE_NEW_PRESETS
1397  /* If lookahead isn't set from CLI, use value from preset.
1398  * P6 & P7 presets may enable lookahead for better quality.
1399  * */
1400  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1401  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1402 #endif
1403 
1404  if (ctx->weighted_pred == 1)
1405  ctx->init_encode_params.enableWeightedPrediction = 1;
1406 
1407  if (ctx->bluray_compat) {
1408  ctx->aud = 1;
1409  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1410  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1411  switch (avctx->codec->id) {
1412  case AV_CODEC_ID_H264:
1413  /* maximum level depends on used resolution */
1414  break;
1415  case AV_CODEC_ID_HEVC:
1416  ctx->level = NV_ENC_LEVEL_HEVC_51;
1417  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1418  break;
1419  }
1420  }
1421 
1422  if (avctx->gop_size > 0) {
1423  if (avctx->max_b_frames >= 0) {
1424  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1425  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1426  }
1427 
1428  ctx->encode_config.gopLength = avctx->gop_size;
1429  } else if (avctx->gop_size == 0) {
1430  ctx->encode_config.frameIntervalP = 0;
1431  ctx->encode_config.gopLength = 1;
1432  }
1433 
1434  /* force to enable intra refresh */
1435  if(ctx->single_slice_intra_refresh)
1436  ctx->intra_refresh = 1;
1437 
1438  if (ctx->intra_refresh)
1439  ctx->encode_config.gopLength = NVENC_INFINITE_GOPLENGTH;
1440 
1441  nvenc_recalc_surfaces(avctx);
1442 
1443  nvenc_setup_rate_control(avctx);
1444 
1445  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1446  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1447  } else {
1448  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1449  }
1450 
1451  res = nvenc_setup_codec_config(avctx);
1452  if (res)
1453  return res;
1454 
1455  res = nvenc_push_context(avctx);
1456  if (res < 0)
1457  return res;
1458 
1459  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1460  if (nv_status != NV_ENC_SUCCESS) {
1461  nvenc_pop_context(avctx);
1462  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1463  }
1464 
1465 #ifdef NVENC_HAVE_CUSTREAM_PTR
1466  if (ctx->cu_context) {
1467  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1468  if (nv_status != NV_ENC_SUCCESS) {
1469  nvenc_pop_context(avctx);
1470  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1471  }
1472  }
1473 #endif
1474 
1475  res = nvenc_pop_context(avctx);
1476  if (res < 0)
1477  return res;
1478 
1479  if (ctx->encode_config.frameIntervalP > 1)
1480  avctx->has_b_frames = 2;
1481 
1482  if (ctx->encode_config.rcParams.averageBitRate > 0)
1483  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1484 
1485  cpb_props = ff_add_cpb_side_data(avctx);
1486  if (!cpb_props)
1487  return AVERROR(ENOMEM);
1488  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1489  cpb_props->avg_bitrate = avctx->bit_rate;
1490  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1491 
1492  return 0;
1493 }
1494 
1495 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1496 {
1497  switch (pix_fmt) {
1498  case AV_PIX_FMT_YUV420P:
1499  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1500  case AV_PIX_FMT_NV12:
1501  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1502  case AV_PIX_FMT_P010:
1503  case AV_PIX_FMT_P016:
1504  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1505  case AV_PIX_FMT_GBRP:
1506  case AV_PIX_FMT_YUV444P:
1507  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1508  case AV_PIX_FMT_GBRP16:
1509  case AV_PIX_FMT_YUV444P16:
1510  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1511  case AV_PIX_FMT_0RGB32:
1512  return NV_ENC_BUFFER_FORMAT_ARGB;
1513  case AV_PIX_FMT_0BGR32:
1514  return NV_ENC_BUFFER_FORMAT_ABGR;
1515  default:
1516  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1517  }
1518 }
1519 
1520 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1521 {
1522  NvencContext *ctx = avctx->priv_data;
1523  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1524  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1525  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1526 
1527  NVENCSTATUS nv_status;
1528  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1529  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1530 
1531  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1532  ctx->surfaces[idx].in_ref = av_frame_alloc();
1533  if (!ctx->surfaces[idx].in_ref)
1534  return AVERROR(ENOMEM);
1535  } else {
1536  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1537 
1538  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1539  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1540  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1541  av_get_pix_fmt_name(ctx->data_pix_fmt));
1542  return AVERROR(EINVAL);
1543  }
1544 
1545  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1546  allocSurf.width = avctx->width;
1547  allocSurf.height = avctx->height;
1548  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1549 
1550  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1551  if (nv_status != NV_ENC_SUCCESS) {
1552  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1553  }
1554 
1555  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1556  ctx->surfaces[idx].width = allocSurf.width;
1557  ctx->surfaces[idx].height = allocSurf.height;
1558  }
1559 
1560  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1561  if (nv_status != NV_ENC_SUCCESS) {
1562  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1563  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1564  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1565  av_frame_free(&ctx->surfaces[idx].in_ref);
1566  return err;
1567  }
1568 
1569  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1570 
1571  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1572 
1573  return 0;
1574 }
1575 
1576 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1577 {
1578  NvencContext *ctx = avctx->priv_data;
1579  int i, res = 0, res2;
1580 
1581  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1582  if (!ctx->surfaces)
1583  return AVERROR(ENOMEM);
1584 
1585  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1586  if (!ctx->timestamp_list)
1587  return AVERROR(ENOMEM);
1588 
1589  ctx->unused_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1590  if (!ctx->unused_surface_queue)
1591  return AVERROR(ENOMEM);
1592 
1593  ctx->output_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1594  if (!ctx->output_surface_queue)
1595  return AVERROR(ENOMEM);
1596  ctx->output_surface_ready_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1597  if (!ctx->output_surface_ready_queue)
1598  return AVERROR(ENOMEM);
1599 
1600  res = nvenc_push_context(avctx);
1601  if (res < 0)
1602  return res;
1603 
1604  for (i = 0; i < ctx->nb_surfaces; i++) {
1605  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1606  goto fail;
1607  }
1608 
1609 fail:
1610  res2 = nvenc_pop_context(avctx);
1611  if (res2 < 0)
1612  return res2;
1613 
1614  return res;
1615 }
1616 
1617 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1618 {
1619  NvencContext *ctx = avctx->priv_data;
1620  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1621  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1622 
1623  NVENCSTATUS nv_status;
1624  uint32_t outSize = 0;
1625  char tmpHeader[256];
1626  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1627  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1628 
1629  payload.spsppsBuffer = tmpHeader;
1630  payload.inBufferSize = sizeof(tmpHeader);
1631  payload.outSPSPPSPayloadSize = &outSize;
1632 
1633  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1634  if (nv_status != NV_ENC_SUCCESS) {
1635  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1636  }
1637 
1638  avctx->extradata_size = outSize;
1639  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1640 
1641  if (!avctx->extradata) {
1642  return AVERROR(ENOMEM);
1643  }
1644 
1645  memcpy(avctx->extradata, tmpHeader, outSize);
1646 
1647  return 0;
1648 }
1649 
1650 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1651 {
1652  NvencContext *ctx = avctx->priv_data;
1653  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1654  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1655  int i, res;
1656 
1657  /* the encoder has to be flushed before it can be closed */
1658  if (ctx->nvencoder) {
1659  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1660  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1661 
1662  res = nvenc_push_context(avctx);
1663  if (res < 0)
1664  return res;
1665 
1666  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1667  }
1668 
1669  av_fifo_freep(&ctx->timestamp_list);
1670  av_fifo_freep(&ctx->output_surface_ready_queue);
1671  av_fifo_freep(&ctx->output_surface_queue);
1672  av_fifo_freep(&ctx->unused_surface_queue);
1673 
1674  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1675  for (i = 0; i < ctx->nb_registered_frames; i++) {
1676  if (ctx->registered_frames[i].mapped)
1677  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1678  if (ctx->registered_frames[i].regptr)
1679  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1680  }
1681  ctx->nb_registered_frames = 0;
1682  }
1683 
1684  if (ctx->surfaces) {
1685  for (i = 0; i < ctx->nb_surfaces; ++i) {
1686  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1687  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1688  av_frame_free(&ctx->surfaces[i].in_ref);
1689  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1690  }
1691  }
1692  av_freep(&ctx->surfaces);
1693  ctx->nb_surfaces = 0;
1694 
1695  av_frame_free(&ctx->frame);
1696 
1697  av_freep(&ctx->sei_data);
1698 
1699  if (ctx->nvencoder) {
1700  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1701 
1702  res = nvenc_pop_context(avctx);
1703  if (res < 0)
1704  return res;
1705  }
1706  ctx->nvencoder = NULL;
1707 
1708  if (ctx->cu_context_internal)
1709  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1710  ctx->cu_context = ctx->cu_context_internal = NULL;
1711 
1712 #if CONFIG_D3D11VA
1713  if (ctx->d3d11_device) {
1714  ID3D11Device_Release(ctx->d3d11_device);
1715  ctx->d3d11_device = NULL;
1716  }
1717 #endif
1718 
1719  nvenc_free_functions(&dl_fn->nvenc_dl);
1720  cuda_free_functions(&dl_fn->cuda_dl);
1721 
1722  dl_fn->nvenc_device_count = 0;
1723 
1724  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1725 
1726  return 0;
1727 }
1728 
1729 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1730 {
1731  NvencContext *ctx = avctx->priv_data;
1732  int ret;
1733 
1734  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1735  AVHWFramesContext *frames_ctx;
1736  if (!avctx->hw_frames_ctx) {
1737  av_log(avctx, AV_LOG_ERROR,
1738  "hw_frames_ctx must be set when using GPU frames as input\n");
1739  return AVERROR(EINVAL);
1740  }
1741  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1742  if (frames_ctx->format != avctx->pix_fmt) {
1743  av_log(avctx, AV_LOG_ERROR,
1744  "hw_frames_ctx must match the GPU frame type\n");
1745  return AVERROR(EINVAL);
1746  }
1747  ctx->data_pix_fmt = frames_ctx->sw_format;
1748  } else {
1749  ctx->data_pix_fmt = avctx->pix_fmt;
1750  }
1751 
1752  ctx->frame = av_frame_alloc();
1753  if (!ctx->frame)
1754  return AVERROR(ENOMEM);
1755 
1756  if ((ret = nvenc_load_libraries(avctx)) < 0)
1757  return ret;
1758 
1759  if ((ret = nvenc_setup_device(avctx)) < 0)
1760  return ret;
1761 
1762  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1763  return ret;
1764 
1765  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1766  return ret;
1767 
1768  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1769  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1770  return ret;
1771  }
1772 
1773  return 0;
1774 }
1775 
1776 static NvencSurface *get_free_frame(NvencContext *ctx)
1777 {
1778  NvencSurface *tmp_surf;
1779 
1780  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1781  // queue empty
1782  return NULL;
1783 
1784  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1785  return tmp_surf;
1786 }
1787 
1788 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1789  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1790 {
1791  int dst_linesize[4] = {
1792  lock_buffer_params->pitch,
1793  lock_buffer_params->pitch,
1794  lock_buffer_params->pitch,
1795  lock_buffer_params->pitch
1796  };
1797  uint8_t *dst_data[4];
1798  int ret;
1799 
1800  if (frame->format == AV_PIX_FMT_YUV420P)
1801  dst_linesize[1] = dst_linesize[2] >>= 1;
1802 
1803  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1804  lock_buffer_params->bufferDataPtr, dst_linesize);
1805  if (ret < 0)
1806  return ret;
1807 
1808  if (frame->format == AV_PIX_FMT_YUV420P)
1809  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1810 
1811  av_image_copy(dst_data, dst_linesize,
1812  (const uint8_t**)frame->data, frame->linesize, frame->format,
1813  avctx->width, avctx->height);
1814 
1815  return 0;
1816 }
1817 
1818 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1819 {
1820  NvencContext *ctx = avctx->priv_data;
1821  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1822  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1823  NVENCSTATUS nv_status;
1824 
1825  int i, first_round;
1826 
1827  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1828  for (first_round = 1; first_round >= 0; first_round--) {
1829  for (i = 0; i < ctx->nb_registered_frames; i++) {
1830  if (!ctx->registered_frames[i].mapped) {
1831  if (ctx->registered_frames[i].regptr) {
1832  if (first_round)
1833  continue;
1834  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1835  if (nv_status != NV_ENC_SUCCESS)
1836  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1837  ctx->registered_frames[i].ptr = NULL;
1838  ctx->registered_frames[i].regptr = NULL;
1839  }
1840  return i;
1841  }
1842  }
1843  }
1844  } else {
1845  return ctx->nb_registered_frames++;
1846  }
1847 
1848  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1849  return AVERROR(ENOMEM);
1850 }
1851 
1852 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
1853 {
1854  NvencContext *ctx = avctx->priv_data;
1855  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1856  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1857 
1858  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1859  NV_ENC_REGISTER_RESOURCE reg = { 0 };
1860  int i, idx, ret;
1861 
1862  for (i = 0; i < ctx->nb_registered_frames; i++) {
1863  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1864  return i;
1865  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1866  return i;
1867  }
1868 
1869  idx = nvenc_find_free_reg_resource(avctx);
1870  if (idx < 0)
1871  return idx;
1872 
1873  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1874  reg.width = frames_ctx->width;
1875  reg.height = frames_ctx->height;
1876  reg.pitch = frame->linesize[0];
1877  reg.resourceToRegister = frame->data[0];
1878 
1879  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1880  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1881  }
1882  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1883  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1884  reg.subResourceIndex = (intptr_t)frame->data[1];
1885  }
1886 
1887  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1888  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1889  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1890  av_get_pix_fmt_name(frames_ctx->sw_format));
1891  return AVERROR(EINVAL);
1892  }
1893 
1894  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1895  if (ret != NV_ENC_SUCCESS) {
1896  nvenc_print_error(avctx, ret, "Error registering an input resource");
1897  return AVERROR_UNKNOWN;
1898  }
1899 
1900  ctx->registered_frames[idx].ptr = frame->data[0];
1901  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1902  ctx->registered_frames[idx].regptr = reg.registeredResource;
1903  return idx;
1904 }
1905 
1906 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
1907  NvencSurface *nvenc_frame)
1908 {
1909  NvencContext *ctx = avctx->priv_data;
1910  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1911  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1912 
1913  int res;
1914  NVENCSTATUS nv_status;
1915 
1916  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1917  int reg_idx = nvenc_register_frame(avctx, frame);
1918  if (reg_idx < 0) {
1919  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1920  return reg_idx;
1921  }
1922 
1923  res = av_frame_ref(nvenc_frame->in_ref, frame);
1924  if (res < 0)
1925  return res;
1926 
1927  if (!ctx->registered_frames[reg_idx].mapped) {
1928  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1929  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1930  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1931  if (nv_status != NV_ENC_SUCCESS) {
1932  av_frame_unref(nvenc_frame->in_ref);
1933  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1934  }
1935  }
1936 
1937  ctx->registered_frames[reg_idx].mapped += 1;
1938 
1939  nvenc_frame->reg_idx = reg_idx;
1940  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1941  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1942  nvenc_frame->pitch = frame->linesize[0];
1943 
1944  return 0;
1945  } else {
1946  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1947 
1948  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1949  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1950 
1951  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1952  if (nv_status != NV_ENC_SUCCESS) {
1953  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1954  }
1955 
1956  nvenc_frame->pitch = lockBufferParams.pitch;
1957  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1958 
1959  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1960  if (nv_status != NV_ENC_SUCCESS) {
1961  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1962  }
1963 
1964  return res;
1965  }
1966 }
1967 
1968 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
1969  NV_ENC_PIC_PARAMS *params,
1970  NV_ENC_SEI_PAYLOAD *sei_data,
1971  int sei_count)
1972 {
1973  NvencContext *ctx = avctx->priv_data;
1974 
1975  switch (avctx->codec->id) {
1976  case AV_CODEC_ID_H264:
1977  params->codecPicParams.h264PicParams.sliceMode =
1978  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1979  params->codecPicParams.h264PicParams.sliceModeData =
1980  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1981  if (sei_count > 0) {
1982  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1983  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
1984  }
1985 
1986  break;
1987  case AV_CODEC_ID_HEVC:
1988  params->codecPicParams.hevcPicParams.sliceMode =
1989  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1990  params->codecPicParams.hevcPicParams.sliceModeData =
1991  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1992  if (sei_count > 0) {
1993  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1994  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
1995  }
1996 
1997  break;
1998  }
1999 }
2000 
2001 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
2002 {
2003  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
2004 }
2005 
2006 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
2007 {
2008  int64_t timestamp = AV_NOPTS_VALUE;
2009  if (av_fifo_size(queue) > 0)
2010  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
2011 
2012  return timestamp;
2013 }
2014 
2015 static int nvenc_set_timestamp(AVCodecContext *avctx,
2016  NV_ENC_LOCK_BITSTREAM *params,
2017  AVPacket *pkt)
2018 {
2019  NvencContext *ctx = avctx->priv_data;
2020 
2021  pkt->pts = params->outputTimeStamp;
2022  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2023 
2024  pkt->dts -= FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
2025 
2026  return 0;
2027 }
2028 
2029 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2030 {
2031  NvencContext *ctx = avctx->priv_data;
2032  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2033  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2034 
2035  uint32_t slice_mode_data;
2036  uint32_t *slice_offsets = NULL;
2037  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2038  NVENCSTATUS nv_status;
2039  int res = 0;
2040 
2041  enum AVPictureType pict_type;
2042 
2043  switch (avctx->codec->id) {
2044  case AV_CODEC_ID_H264:
2045  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2046  break;
2047  case AV_CODEC_ID_H265:
2048  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2049  break;
2050  default:
2051  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
2052  res = AVERROR(EINVAL);
2053  goto error;
2054  }
2055  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
2056 
2057  if (!slice_offsets) {
2058  res = AVERROR(ENOMEM);
2059  goto error;
2060  }
2061 
2062  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2063 
2064  lock_params.doNotWait = 0;
2065  lock_params.outputBitstream = tmpoutsurf->output_surface;
2066  lock_params.sliceOffsets = slice_offsets;
2067 
2068  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2069  if (nv_status != NV_ENC_SUCCESS) {
2070  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2071  goto error;
2072  }
2073 
2074  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2075 
2076  if (res < 0) {
2077  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2078  goto error;
2079  }
2080 
2081  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2082 
2083  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2084  if (nv_status != NV_ENC_SUCCESS) {
2085  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2086  goto error;
2087  }
2088 
2089 
2090  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2091  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2092  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2093  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2094  if (nv_status != NV_ENC_SUCCESS) {
2095  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2096  goto error;
2097  }
2098  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2099  res = AVERROR_BUG;
2100  goto error;
2101  }
2102 
2103  av_frame_unref(tmpoutsurf->in_ref);
2104 
2105  tmpoutsurf->input_surface = NULL;
2106  }
2107 
2108  switch (lock_params.pictureType) {
2109  case NV_ENC_PIC_TYPE_IDR:
2110  pkt->flags |= AV_PKT_FLAG_KEY;
2111  case NV_ENC_PIC_TYPE_I:
2112  pict_type = AV_PICTURE_TYPE_I;
2113  break;
2114  case NV_ENC_PIC_TYPE_P:
2115  pict_type = AV_PICTURE_TYPE_P;
2116  break;
2117  case NV_ENC_PIC_TYPE_B:
2118  pict_type = AV_PICTURE_TYPE_B;
2119  break;
2120  case NV_ENC_PIC_TYPE_BI:
2121  pict_type = AV_PICTURE_TYPE_BI;
2122  break;
2123  default:
2124  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2125  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2126  res = AVERROR_EXTERNAL;
2127  goto error;
2128  }
2129 
2130  ff_side_data_set_encoder_stats(pkt,
2131  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2132 
2133  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2134  if (res < 0)
2135  goto error2;
2136 
2137  av_free(slice_offsets);
2138 
2139  return 0;
2140 
2141 error:
2142  timestamp_queue_dequeue(ctx->timestamp_list);
2143 
2144 error2:
2145  av_free(slice_offsets);
2146 
2147  return res;
2148 }
2149 
2150 static int output_ready(AVCodecContext *avctx, int flush)
2151 {
2152  NvencContext *ctx = avctx->priv_data;
2153  int nb_ready, nb_pending;
2154 
2155  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
2156  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
2157  if (flush)
2158  return nb_ready > 0;
2159  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2160 }
2161 
2162 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2163 {
2164  NvencContext *ctx = avctx->priv_data;
2165  int sei_count = 0;
2166  int i, res;
2167 
2168  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2169  void *a53_data = NULL;
2170  size_t a53_size = 0;
2171 
2172  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2173  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2174  }
2175 
2176  if (a53_data) {
2177  void *tmp = av_fast_realloc(ctx->sei_data,
2178  &ctx->sei_data_size,
2179  (sei_count + 1) * sizeof(*ctx->sei_data));
2180  if (!tmp) {
2181  av_free(a53_data);
2182  res = AVERROR(ENOMEM);
2183  goto error;
2184  } else {
2185  ctx->sei_data = tmp;
2186  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2187  ctx->sei_data[sei_count].payloadType = 4;
2188  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2189  sei_count++;
2190  }
2191  }
2192  }
2193 
2194  if (ctx->s12m_tc && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2195  void *tc_data = NULL;
2196  size_t tc_size = 0;
2197 
2198  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2199  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2200  }
2201 
2202  if (tc_data) {
2203  void *tmp = av_fast_realloc(ctx->sei_data,
2204  &ctx->sei_data_size,
2205  (sei_count + 1) * sizeof(*ctx->sei_data));
2206  if (!tmp) {
2207  av_free(tc_data);
2208  res = AVERROR(ENOMEM);
2209  goto error;
2210  } else {
2211  ctx->sei_data = tmp;
2212  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2213  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2214  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2215  sei_count++;
2216  }
2217  }
2218  }
2219 
2220  if (!ctx->udu_sei)
2221  return sei_count;
2222 
2223  for (i = 0; i < frame->nb_side_data; i++) {
2224  AVFrameSideData *side_data = frame->side_data[i];
2225  void *tmp;
2226 
2227  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2228  continue;
2229 
2230  tmp = av_fast_realloc(ctx->sei_data,
2231  &ctx->sei_data_size,
2232  (sei_count + 1) * sizeof(*ctx->sei_data));
2233  if (!tmp) {
2234  res = AVERROR(ENOMEM);
2235  goto error;
2236  } else {
2237  ctx->sei_data = tmp;
2238  ctx->sei_data[sei_count].payloadSize = side_data->size;
2239  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2240  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2241 
2242  if (!ctx->sei_data[sei_count].payload) {
2243  res = AVERROR(ENOMEM);
2244  goto error;
2245  }
2246 
2247  sei_count++;
2248  }
2249  }
2250 
2251  return sei_count;
2252 
2253 error:
2254  for (i = 0; i < sei_count; i++)
2255  av_freep(&(ctx->sei_data[i].payload));
2256 
2257  return res;
2258 }
2259 
2260 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2261 {
2262  NvencContext *ctx = avctx->priv_data;
2263  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2264  NVENCSTATUS ret;
2265 
2266  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2267  int needs_reconfig = 0;
2268  int needs_encode_config = 0;
2269  int reconfig_bitrate = 0, reconfig_dar = 0;
2270  int dw, dh;
2271 
2272  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2273  params.reInitEncodeParams = ctx->init_encode_params;
2274 
2275  compute_dar(avctx, &dw, &dh);
2276  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2277  av_log(avctx, AV_LOG_VERBOSE,
2278  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2279  ctx->init_encode_params.darWidth,
2280  ctx->init_encode_params.darHeight, dw, dh);
2281 
2282  params.reInitEncodeParams.darHeight = dh;
2283  params.reInitEncodeParams.darWidth = dw;
2284 
2285  needs_reconfig = 1;
2286  reconfig_dar = 1;
2287  }
2288 
2289  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2290  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2291  av_log(avctx, AV_LOG_VERBOSE,
2292  "avg bitrate change: %d -> %d\n",
2293  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2294  (uint32_t)avctx->bit_rate);
2295 
2296  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2297  reconfig_bitrate = 1;
2298  }
2299 
2300  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2301  av_log(avctx, AV_LOG_VERBOSE,
2302  "max bitrate change: %d -> %d\n",
2303  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2304  (uint32_t)avctx->rc_max_rate);
2305 
2306  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2307  reconfig_bitrate = 1;
2308  }
2309 
2310  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2311  av_log(avctx, AV_LOG_VERBOSE,
2312  "vbv buffer size change: %d -> %d\n",
2313  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2314  avctx->rc_buffer_size);
2315 
2316  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2317  reconfig_bitrate = 1;
2318  }
2319 
2320  if (reconfig_bitrate) {
2321  params.resetEncoder = 1;
2322  params.forceIDR = 1;
2323 
2324  needs_encode_config = 1;
2325  needs_reconfig = 1;
2326  }
2327  }
2328 
2329  if (!needs_encode_config)
2330  params.reInitEncodeParams.encodeConfig = NULL;
2331 
2332  if (needs_reconfig) {
2333  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2334  if (ret != NV_ENC_SUCCESS) {
2335  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2336  } else {
2337  if (reconfig_dar) {
2338  ctx->init_encode_params.darHeight = dh;
2339  ctx->init_encode_params.darWidth = dw;
2340  }
2341 
2342  if (reconfig_bitrate) {
2343  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2344  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2345  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2346  }
2347 
2348  }
2349  }
2350 }
2351 
2352 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2353 {
2354  NVENCSTATUS nv_status;
2355  NvencSurface *tmp_out_surf, *in_surf;
2356  int res, res2;
2357  int sei_count = 0;
2358  int i;
2359 
2360  NvencContext *ctx = avctx->priv_data;
2361  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2362  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2363 
2364  NV_ENC_PIC_PARAMS pic_params = { 0 };
2365  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2366 
2367  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2368  return AVERROR(EINVAL);
2369 
2370  if (frame && frame->buf[0]) {
2371  in_surf = get_free_frame(ctx);
2372  if (!in_surf)
2373  return AVERROR(EAGAIN);
2374 
2375  res = nvenc_push_context(avctx);
2376  if (res < 0)
2377  return res;
2378 
2379  reconfig_encoder(avctx, frame);
2380 
2381  res = nvenc_upload_frame(avctx, frame, in_surf);
2382 
2383  res2 = nvenc_pop_context(avctx);
2384  if (res2 < 0)
2385  return res2;
2386 
2387  if (res)
2388  return res;
2389 
2390  pic_params.inputBuffer = in_surf->input_surface;
2391  pic_params.bufferFmt = in_surf->format;
2392  pic_params.inputWidth = in_surf->width;
2393  pic_params.inputHeight = in_surf->height;
2394  pic_params.inputPitch = in_surf->pitch;
2395  pic_params.outputBitstream = in_surf->output_surface;
2396 
2397  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2398  if (frame->top_field_first)
2399  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2400  else
2401  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2402  } else {
2403  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2404  }
2405 
2406  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2407  pic_params.encodePicFlags =
2408  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2409  } else {
2410  pic_params.encodePicFlags = 0;
2411  }
2412 
2413  pic_params.inputTimeStamp = frame->pts;
2414 
2415  if (ctx->extra_sei) {
2416  res = prepare_sei_data_array(avctx, frame);
2417  if (res < 0)
2418  return res;
2419  sei_count = res;
2420  }
2421 
2422  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2423  } else {
2424  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2425  }
2426 
2427  res = nvenc_push_context(avctx);
2428  if (res < 0)
2429  return res;
2430 
2431  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2432 
2433  for (i = 0; i < sei_count; i++)
2434  av_freep(&(ctx->sei_data[i].payload));
2435 
2436  res = nvenc_pop_context(avctx);
2437  if (res < 0)
2438  return res;
2439 
2440  if (nv_status != NV_ENC_SUCCESS &&
2441  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2442  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2443 
2444  if (frame && frame->buf[0]) {
2445  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2446  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2447  }
2448 
2449  /* all the pending buffers are now ready for output */
2450  if (nv_status == NV_ENC_SUCCESS) {
2451  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2452  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2453  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2454  }
2455  }
2456 
2457  return 0;
2458 }
2459 
2460 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
2461 {
2462  NvencSurface *tmp_out_surf;
2463  int res, res2;
2464 
2465  NvencContext *ctx = avctx->priv_data;
2466 
2467  AVFrame *frame = ctx->frame;
2468 
2469  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2470  return AVERROR(EINVAL);
2471 
2472  if (!frame->buf[0]) {
2473  res = ff_encode_get_frame(avctx, frame);
2474  if (res < 0 && res != AVERROR_EOF)
2475  return res;
2476  }
2477 
2478  res = nvenc_send_frame(avctx, frame);
2479  if (res < 0) {
2480  if (res != AVERROR(EAGAIN))
2481  return res;
2482  } else
2483  av_frame_unref(frame);
2484 
2485  if (output_ready(avctx, avctx->internal->draining)) {
2486  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2487 
2488  res = nvenc_push_context(avctx);
2489  if (res < 0)
2490  return res;
2491 
2492  res = process_output_surface(avctx, pkt, tmp_out_surf);
2493 
2494  res2 = nvenc_pop_context(avctx);
2495  if (res2 < 0)
2496  return res2;
2497 
2498  if (res)
2499  return res;
2500 
2501  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2502  } else if (avctx->internal->draining) {
2503  return AVERROR_EOF;
2504  } else {
2505  return AVERROR(EAGAIN);
2506  }
2507 
2508  return 0;
2509 }
2510 
2511 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
2512 {
2513  NvencContext *ctx = avctx->priv_data;
2514 
2515  nvenc_send_frame(avctx, NULL);
2516  av_fifo_reset(ctx->timestamp_list);
2517 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:31
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1616
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:159
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:225
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:155
level
uint8_t level
Definition: svq3.c:202
av_clip
#define av_clip
Definition: common.h:96
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:960
P3
#define P3
Definition: hevcdsp_template.c:1497
av_fifo_generic_write
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:130
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:617
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:142
GUIDTuple
Definition: nvenc.c:154
NONE
@ NONE
Definition: af_afade.c:54
GUIDTuple::flags
int flags
Definition: nvenc.c:156
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:604
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1564
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:318
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2150
NvencContext
Definition: nvenc.h:153
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:151
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:83
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:109
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:317
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:26
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:953
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2015
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:597
P1
#define P1
Definition: cavsdsp.c:39
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:373
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:671
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1576
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2260
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:524
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:45
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:755
NvencSurface
Definition: nvenc.h:80
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:145
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:134
BD
#define BD
av_fifo_generic_read
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:219
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:990
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1165
nverr
NVENCSTATUS nverr
Definition: nvenc.c:87
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:850
PRESET
#define PRESET(name,...)
Definition: nvenc.c:162
av_fifo_reset
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied.
Definition: fifo.c:65
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:135
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:428
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2511
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:268
nvenc.h
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:311
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVFifoBuffer
Definition: fifo.h:31
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1318
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:1710
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1906
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:99
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:688
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:788
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:119
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:392
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:403
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:179
fail
#define fail()
Definition: checkasm.h:128
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:90
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:932
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:164
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:463
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1568
val
static double val(void *priv, double ch)
Definition: aeval.c:76
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1788
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:83
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:218
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:260
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:420
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:97
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:946
pkt
AVPacket * pkt
Definition: movenc.c:59
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:226
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1613
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:485
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:679
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1729
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:504
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:449
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:417
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1318
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:382
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:515
NvencDynLoadFunctions
Definition: nvenc.h:93
ctx
AVFormatContext * ctx
Definition: movenc.c:48
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:141
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demuxing_decoding.c:41
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1617
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:2001
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1194
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:96
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:104
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:77
NvencSurface::pitch
int pitch
Definition: nvenc.h:87
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:82
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1179
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:40
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:423
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:73
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:934
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
flush
static void flush(AVCodecContext *avctx)
Definition: aacdec_template.c:593
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:84
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:967
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:418
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:433
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1650
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1614
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:95
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1087
convert_header.major
int major
Definition: convert_header.py:23
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:177
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:506
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:89
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:329
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:96
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:578
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:325
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:367
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:63
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:1030
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1520
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:225
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:569
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1852
AVCodecHWConfigInternal
Definition: hwconfig.h:29
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2460
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:372
height
#define height
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:864
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:379
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:303
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:119
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1776
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:664
AVCodec::id
enum AVCodecID id
Definition: codec.h:216
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:341
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:99
convert_header.minor
int minor
Definition: convert_header.py:26
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:130
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:271
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:366
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:484
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:136
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2029
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:274
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:895
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:109
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:224
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2162
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:435
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:263
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1908
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:78
P2
#define P2
Definition: cavsdsp.c:38
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:41
AVCodecContext::height
int height
Definition: avcodec.h:556
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:593
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:38
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1495
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:271
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:454
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1858
NvencSurface::width
int width
Definition: nvenc.h:85
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1332
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:88
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:381
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:125
cuda_check.h
atsc_a53.h
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:1968
AVCodecContext
main external API structure.
Definition: avcodec.h:383
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:78
NvencSurface::height
int height
Definition: nvenc.h:86
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:140
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1158
AVRational::den
int den
Denominator.
Definition: rational.h:60
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:2006
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
dummy
int dummy
Definition: motion.c:65
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1525
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1576
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:695
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:224
AV_CODEC_ID_H265
#define AV_CODEC_ID_H265
Definition: codec_id.h:225
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:89
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1818
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1566
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:453
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:190
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:158
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:98
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:150
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:655
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:157
packet_internal.h
av_fifo_size
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:71
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:223
av_fifo_freep
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:57
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:983
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: packet.h:350
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:410
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:644
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:556
av_fifo_alloc
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:44
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:143
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:28
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:134
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1305
nvenc_errors
static const struct @99 nvenc_errors[]
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int
int
Definition: ffmpeg_filter.c:153
hevc_sei.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:753
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1199
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:149
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2352
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2580
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