FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 #include "hevc_sei.h"
26 
28 #include "libavutil/hwcontext.h"
29 #include "libavutil/cuda_check.h"
30 #include "libavutil/imgutils.h"
31 #include "libavutil/avassert.h"
32 #include "libavutil/mem.h"
33 #include "libavutil/pixdesc.h"
34 #include "encode.h"
35 #include "internal.h"
36 #include "packet_internal.h"
37 
38 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
39 
40 #define NVENC_CAP 0x30
41 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
42  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
43  rc == NV_ENC_PARAMS_RC_CBR_HQ)
44 
45 #ifdef NVENC_HAVE_NEW_PRESETS
46 #define IS_SDK10_PRESET(p) ((p) >= PRESET_P1 && (p) <= PRESET_P7)
47 #else
48 #define IS_SDK10_PRESET(p) 0
49 #endif
50 
56  AV_PIX_FMT_P016, // Truncated to 10bits
57  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
61 #if CONFIG_D3D11VA
63 #endif
65 };
66 
68  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
70 #if CONFIG_D3D11VA
71  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
73 #endif
74  NULL,
75 };
76 
77 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
78  pix_fmt == AV_PIX_FMT_P016 || \
79  pix_fmt == AV_PIX_FMT_YUV444P16)
80 
81 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
82  pix_fmt == AV_PIX_FMT_YUV444P16)
83 
84 static const struct {
85  NVENCSTATUS nverr;
86  int averr;
87  const char *desc;
88 } nvenc_errors[] = {
89  { NV_ENC_SUCCESS, 0, "success" },
90  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
91  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
92  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
93  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
94  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
95  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
96  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
97  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
98  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
99  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
100  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
101  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
102  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
103  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
104  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
105  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
106  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
107  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
108  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
109  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
110  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
111  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
112  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
113  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
114  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
115 };
116 
117 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
118 {
119  int i;
120  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
121  if (nvenc_errors[i].nverr == err) {
122  if (desc)
123  *desc = nvenc_errors[i].desc;
124  return nvenc_errors[i].averr;
125  }
126  }
127  if (desc)
128  *desc = "unknown error";
129  return AVERROR_UNKNOWN;
130 }
131 
132 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
133  const char *error_string)
134 {
135  const char *desc;
136  const char *details = "(no details)";
137  int ret = nvenc_map_error(err, &desc);
138 
139 #ifdef NVENC_HAVE_GETLASTERRORSTRING
140  NvencContext *ctx = avctx->priv_data;
141  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
142 
143  if (p_nvenc && ctx->nvencoder)
144  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
145 #endif
146 
147  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
148 
149  return ret;
150 }
151 
153 {
154 #if NVENCAPI_CHECK_VERSION(10, 1)
155  const char *minver = "(unknown)";
156 #elif NVENCAPI_CHECK_VERSION(10, 0)
157 # if defined(_WIN32) || defined(__CYGWIN__)
158  const char *minver = "450.51";
159 # else
160  const char *minver = "445.87";
161 # endif
162 #elif NVENCAPI_CHECK_VERSION(9, 1)
163 # if defined(_WIN32) || defined(__CYGWIN__)
164  const char *minver = "436.15";
165 # else
166  const char *minver = "435.21";
167 # endif
168 #elif NVENCAPI_CHECK_VERSION(9, 0)
169 # if defined(_WIN32) || defined(__CYGWIN__)
170  const char *minver = "418.81";
171 # else
172  const char *minver = "418.30";
173 # endif
174 #elif NVENCAPI_CHECK_VERSION(8, 2)
175 # if defined(_WIN32) || defined(__CYGWIN__)
176  const char *minver = "397.93";
177 # else
178  const char *minver = "396.24";
179 #endif
180 #elif NVENCAPI_CHECK_VERSION(8, 1)
181 # if defined(_WIN32) || defined(__CYGWIN__)
182  const char *minver = "390.77";
183 # else
184  const char *minver = "390.25";
185 # endif
186 #else
187 # if defined(_WIN32) || defined(__CYGWIN__)
188  const char *minver = "378.66";
189 # else
190  const char *minver = "378.13";
191 # endif
192 #endif
193  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
194 }
195 
197 {
198  NvencContext *ctx = avctx->priv_data;
200  NVENCSTATUS err;
201  uint32_t nvenc_max_ver;
202  int ret;
203 
204  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
205  if (ret < 0)
206  return ret;
207 
208  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
209  if (ret < 0) {
211  return ret;
212  }
213 
214  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
215  if (err != NV_ENC_SUCCESS)
216  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
217 
218  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
219 
220  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
221  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
222  "Required: %d.%d Found: %d.%d\n",
223  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
224  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
226  return AVERROR(ENOSYS);
227  }
228 
229  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
230 
231  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
232  if (err != NV_ENC_SUCCESS)
233  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
234 
235  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
236 
237  return 0;
238 }
239 
241 {
242  NvencContext *ctx = avctx->priv_data;
244 
245  if (ctx->d3d11_device)
246  return 0;
247 
248  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
249 }
250 
252 {
253  NvencContext *ctx = avctx->priv_data;
255  CUcontext dummy;
256 
257  if (ctx->d3d11_device)
258  return 0;
259 
260  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
261 }
262 
264 {
265  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
266  NvencContext *ctx = avctx->priv_data;
267  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
268  NVENCSTATUS ret;
269 
270  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
271  params.apiVersion = NVENCAPI_VERSION;
272  if (ctx->d3d11_device) {
273  params.device = ctx->d3d11_device;
274  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
275  } else {
276  params.device = ctx->cu_context;
277  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
278  }
279 
280  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
281  if (ret != NV_ENC_SUCCESS) {
282  ctx->nvencoder = NULL;
283  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
284  }
285 
286  return 0;
287 }
288 
290 {
291  NvencContext *ctx = avctx->priv_data;
292  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
293  int i, ret, count = 0;
294  GUID *guids = NULL;
295 
296  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
297 
298  if (ret != NV_ENC_SUCCESS || !count)
299  return AVERROR(ENOSYS);
300 
301  guids = av_malloc(count * sizeof(GUID));
302  if (!guids)
303  return AVERROR(ENOMEM);
304 
305  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
306  if (ret != NV_ENC_SUCCESS) {
307  ret = AVERROR(ENOSYS);
308  goto fail;
309  }
310 
311  ret = AVERROR(ENOSYS);
312  for (i = 0; i < count; i++) {
313  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
314  ret = 0;
315  break;
316  }
317  }
318 
319 fail:
320  av_free(guids);
321 
322  return ret;
323 }
324 
325 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
326 {
327  NvencContext *ctx = avctx->priv_data;
328  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
329  NV_ENC_CAPS_PARAM params = { 0 };
330  int ret, val = 0;
331 
332  params.version = NV_ENC_CAPS_PARAM_VER;
333  params.capsToQuery = cap;
334 
335  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
336 
337  if (ret == NV_ENC_SUCCESS)
338  return val;
339  return 0;
340 }
341 
343 {
344  NvencContext *ctx = avctx->priv_data;
345  int ret;
346 
347  ret = nvenc_check_codec_support(avctx);
348  if (ret < 0) {
349  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
350  return ret;
351  }
352 
353  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
354  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
355  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
356  return AVERROR(ENOSYS);
357  }
358 
359  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
360  if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
361  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
362  return AVERROR(ENOSYS);
363  }
364 
365  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
366  if (ret < avctx->width) {
367  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
368  avctx->width, ret);
369  return AVERROR(ENOSYS);
370  }
371 
372  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
373  if (ret < avctx->height) {
374  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
375  avctx->height, ret);
376  return AVERROR(ENOSYS);
377  }
378 
379  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
380  if (ret < avctx->max_b_frames) {
381  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
382  avctx->max_b_frames, ret);
383 
384  return AVERROR(ENOSYS);
385  }
386 
387  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
388  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
389  av_log(avctx, AV_LOG_WARNING,
390  "Interlaced encoding is not supported. Supported level: %d\n",
391  ret);
392  return AVERROR(ENOSYS);
393  }
394 
395  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
396  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
397  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
398  return AVERROR(ENOSYS);
399  }
400 
401  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
402  if (ctx->rc_lookahead > 0 && ret <= 0) {
403  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
404  return AVERROR(ENOSYS);
405  }
406 
407  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
408  if (ctx->temporal_aq > 0 && ret <= 0) {
409  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
410  return AVERROR(ENOSYS);
411  }
412 
413  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
414  if (ctx->weighted_pred > 0 && ret <= 0) {
415  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
416  return AVERROR(ENOSYS);
417  }
418 
419  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
420  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
421  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
422  return AVERROR(ENOSYS);
423  }
424 
425 #ifdef NVENC_HAVE_BFRAME_REF_MODE
426  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
427  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1) {
428  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
429  return AVERROR(ENOSYS);
430  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
431  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
432  return AVERROR(ENOSYS);
433  }
434 #else
435  if (ctx->b_ref_mode != 0) {
436  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
437  return AVERROR(ENOSYS);
438  }
439 #endif
440 
441 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
442  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
443  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
444  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
445  return AVERROR(ENOSYS);
446  }
447 #else
448  if(avctx->refs != 0) {
449  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
450  return AVERROR(ENOSYS);
451  }
452 #endif
453 
454  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
455 
456  return 0;
457 }
458 
459 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
460 {
461  NvencContext *ctx = avctx->priv_data;
463  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
464  char name[128] = { 0};
465  int major, minor, ret;
466  CUdevice cu_device;
467  int loglevel = AV_LOG_VERBOSE;
468 
469  if (ctx->device == LIST_DEVICES)
470  loglevel = AV_LOG_INFO;
471 
472  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
473  if (ret < 0)
474  return ret;
475 
476  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
477  if (ret < 0)
478  return ret;
479 
480  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
481  if (ret < 0)
482  return ret;
483 
484  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
485  if (((major << 4) | minor) < NVENC_CAP) {
486  av_log(avctx, loglevel, "does not support NVENC\n");
487  goto fail;
488  }
489 
490  if (ctx->device != idx && ctx->device != ANY_DEVICE)
491  return -1;
492 
493  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
494  if (ret < 0)
495  goto fail;
496 
497  ctx->cu_context = ctx->cu_context_internal;
498  ctx->cu_stream = NULL;
499 
500  if ((ret = nvenc_pop_context(avctx)) < 0)
501  goto fail2;
502 
503  if ((ret = nvenc_open_session(avctx)) < 0)
504  goto fail2;
505 
506  if ((ret = nvenc_check_capabilities(avctx)) < 0)
507  goto fail3;
508 
509  av_log(avctx, loglevel, "supports NVENC\n");
510 
511  dl_fn->nvenc_device_count++;
512 
513  if (ctx->device == idx || ctx->device == ANY_DEVICE)
514  return 0;
515 
516 fail3:
517  if ((ret = nvenc_push_context(avctx)) < 0)
518  return ret;
519 
520  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
521  ctx->nvencoder = NULL;
522 
523  if ((ret = nvenc_pop_context(avctx)) < 0)
524  return ret;
525 
526 fail2:
527  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
528  ctx->cu_context_internal = NULL;
529 
530 fail:
531  return AVERROR(ENOSYS);
532 }
533 
535 {
536  NvencContext *ctx = avctx->priv_data;
538 
539  switch (avctx->codec->id) {
540  case AV_CODEC_ID_H264:
541  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
542  break;
543  case AV_CODEC_ID_HEVC:
544  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
545  break;
546  default:
547  return AVERROR_BUG;
548  }
549 
550  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
551  AVHWFramesContext *frames_ctx;
552  AVHWDeviceContext *hwdev_ctx;
553  AVCUDADeviceContext *cuda_device_hwctx = NULL;
554 #if CONFIG_D3D11VA
555  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
556 #endif
557  int ret;
558 
559  if (avctx->hw_frames_ctx) {
560  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
561  if (frames_ctx->format == AV_PIX_FMT_CUDA)
562  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
563 #if CONFIG_D3D11VA
564  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
565  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
566 #endif
567  else
568  return AVERROR(EINVAL);
569  } else if (avctx->hw_device_ctx) {
570  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
571  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
572  cuda_device_hwctx = hwdev_ctx->hwctx;
573 #if CONFIG_D3D11VA
574  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
575  d3d11_device_hwctx = hwdev_ctx->hwctx;
576 #endif
577  else
578  return AVERROR(EINVAL);
579  } else {
580  return AVERROR(EINVAL);
581  }
582 
583  if (cuda_device_hwctx) {
584  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
585  ctx->cu_stream = cuda_device_hwctx->stream;
586  }
587 #if CONFIG_D3D11VA
588  else if (d3d11_device_hwctx) {
589  ctx->d3d11_device = d3d11_device_hwctx->device;
590  ID3D11Device_AddRef(ctx->d3d11_device);
591  }
592 #endif
593 
594  ret = nvenc_open_session(avctx);
595  if (ret < 0)
596  return ret;
597 
598  ret = nvenc_check_capabilities(avctx);
599  if (ret < 0) {
600  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
601  return ret;
602  }
603  } else {
604  int i, nb_devices = 0;
605 
606  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
607  return AVERROR_UNKNOWN;
608 
609  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
610  return AVERROR_UNKNOWN;
611 
612  if (!nb_devices) {
613  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
614  return AVERROR_EXTERNAL;
615  }
616 
617  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
618 
619  dl_fn->nvenc_device_count = 0;
620  for (i = 0; i < nb_devices; ++i) {
621  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
622  return 0;
623  }
624 
625  if (ctx->device == LIST_DEVICES)
626  return AVERROR_EXIT;
627 
628  if (!dl_fn->nvenc_device_count) {
629  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
630  return AVERROR_EXTERNAL;
631  }
632 
633  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
634  return AVERROR(EINVAL);
635  }
636 
637  return 0;
638 }
639 
640 typedef struct GUIDTuple {
641  const GUID guid;
642  int flags;
643 } GUIDTuple;
644 
645 #define PRESET_ALIAS(alias, name, ...) \
646  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
647 
648 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
649 
651 {
652  GUIDTuple presets[] = {
653  PRESET(DEFAULT),
654  PRESET(HP),
655  PRESET(HQ),
656  PRESET(BD),
657  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
658  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
659  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
660  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
661  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
662  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
663  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
664  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
665 #ifdef NVENC_HAVE_NEW_PRESETS
666  PRESET(P1),
667  PRESET(P2),
668  PRESET(P3),
669  PRESET(P4),
670  PRESET(P5),
671  PRESET(P6),
672  PRESET(P7),
673 #endif
674  };
675 
676  GUIDTuple *t = &presets[ctx->preset];
677 
678  ctx->init_encode_params.presetGUID = t->guid;
679  ctx->flags = t->flags;
680 }
681 
682 #undef PRESET
683 #undef PRESET_ALIAS
684 
685 static av_cold void set_constqp(AVCodecContext *avctx)
686 {
687  NvencContext *ctx = avctx->priv_data;
688  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
689 
690  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
691 
692  if (ctx->init_qp_p >= 0) {
693  rc->constQP.qpInterP = ctx->init_qp_p;
694  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
695  rc->constQP.qpIntra = ctx->init_qp_i;
696  rc->constQP.qpInterB = ctx->init_qp_b;
697  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
698  rc->constQP.qpIntra = av_clip(
699  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
700  rc->constQP.qpInterB = av_clip(
701  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
702  } else {
703  rc->constQP.qpIntra = rc->constQP.qpInterP;
704  rc->constQP.qpInterB = rc->constQP.qpInterP;
705  }
706  } else if (ctx->cqp >= 0) {
707  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
708  if (avctx->b_quant_factor != 0.0)
709  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
710  if (avctx->i_quant_factor != 0.0)
711  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
712  }
713 
714  avctx->qmin = -1;
715  avctx->qmax = -1;
716 }
717 
718 static av_cold void set_vbr(AVCodecContext *avctx)
719 {
720  NvencContext *ctx = avctx->priv_data;
721  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
722  int qp_inter_p;
723 
724  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
725  rc->enableMinQP = 1;
726  rc->enableMaxQP = 1;
727 
728  rc->minQP.qpInterB = avctx->qmin;
729  rc->minQP.qpInterP = avctx->qmin;
730  rc->minQP.qpIntra = avctx->qmin;
731 
732  rc->maxQP.qpInterB = avctx->qmax;
733  rc->maxQP.qpInterP = avctx->qmax;
734  rc->maxQP.qpIntra = avctx->qmax;
735 
736  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
737  } else if (avctx->qmin >= 0) {
738  rc->enableMinQP = 1;
739 
740  rc->minQP.qpInterB = avctx->qmin;
741  rc->minQP.qpInterP = avctx->qmin;
742  rc->minQP.qpIntra = avctx->qmin;
743 
744  qp_inter_p = avctx->qmin;
745  } else {
746  qp_inter_p = 26; // default to 26
747  }
748 
749  rc->enableInitialRCQP = 1;
750 
751  if (ctx->init_qp_p < 0) {
752  rc->initialRCQP.qpInterP = qp_inter_p;
753  } else {
754  rc->initialRCQP.qpInterP = ctx->init_qp_p;
755  }
756 
757  if (ctx->init_qp_i < 0) {
758  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
759  rc->initialRCQP.qpIntra = av_clip(
760  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
761  } else {
762  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
763  }
764  } else {
765  rc->initialRCQP.qpIntra = ctx->init_qp_i;
766  }
767 
768  if (ctx->init_qp_b < 0) {
769  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
770  rc->initialRCQP.qpInterB = av_clip(
771  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
772  } else {
773  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
774  }
775  } else {
776  rc->initialRCQP.qpInterB = ctx->init_qp_b;
777  }
778 }
779 
781 {
782  NvencContext *ctx = avctx->priv_data;
783  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
784 
785  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
786  rc->constQP.qpInterB = 0;
787  rc->constQP.qpInterP = 0;
788  rc->constQP.qpIntra = 0;
789 
790  avctx->qmin = -1;
791  avctx->qmax = -1;
792 }
793 
795 {
796  NvencContext *ctx = avctx->priv_data;
797  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
798 
799  switch (ctx->rc) {
800  case NV_ENC_PARAMS_RC_CONSTQP:
801  set_constqp(avctx);
802  return;
803  case NV_ENC_PARAMS_RC_VBR_MINQP:
804  if (avctx->qmin < 0) {
805  av_log(avctx, AV_LOG_WARNING,
806  "The variable bitrate rate-control requires "
807  "the 'qmin' option set.\n");
808  set_vbr(avctx);
809  return;
810  }
811  /* fall through */
812  case NV_ENC_PARAMS_RC_VBR_HQ:
813  case NV_ENC_PARAMS_RC_VBR:
814  set_vbr(avctx);
815  break;
816  case NV_ENC_PARAMS_RC_CBR:
817  case NV_ENC_PARAMS_RC_CBR_HQ:
818  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
819  break;
820  }
821 
822  rc->rateControlMode = ctx->rc;
823 }
824 
826 {
827  NvencContext *ctx = avctx->priv_data;
828  // default minimum of 4 surfaces
829  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
830  // another multiply by 2 to avoid blocking next PBB group
831  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
832 
833  // lookahead enabled
834  if (ctx->rc_lookahead > 0) {
835  // +1 is to account for lkd_bound calculation later
836  // +4 is to allow sufficient pipelining with lookahead
837  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
838  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
839  {
840  av_log(avctx, AV_LOG_WARNING,
841  "Defined rc_lookahead requires more surfaces, "
842  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
843  }
844  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
845  } else {
846  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
847  {
848  av_log(avctx, AV_LOG_WARNING,
849  "Defined b-frame requires more surfaces, "
850  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
851  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
852  }
853  else if (ctx->nb_surfaces <= 0)
854  ctx->nb_surfaces = nb_surfaces;
855  // otherwise use user specified value
856  }
857 
859  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
860 
861  return 0;
862 }
863 
865 {
866  NvencContext *ctx = avctx->priv_data;
867 
868  if (avctx->global_quality > 0)
869  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
870 
871  if (ctx->cqp < 0 && avctx->global_quality > 0)
872  ctx->cqp = avctx->global_quality;
873 
874  if (avctx->bit_rate > 0) {
875  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
876  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
877  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
878  }
879 
880  if (avctx->rc_max_rate > 0)
881  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
882 
883 #ifdef NVENC_HAVE_MULTIPASS
884  ctx->encode_config.rcParams.multiPass = ctx->multipass;
885  if (ctx->encode_config.rcParams.multiPass != NV_ENC_MULTI_PASS_DISABLED)
886  ctx->flags |= NVENC_TWO_PASSES;
887 #endif
888 
889  if (ctx->rc < 0) {
890  if (ctx->flags & NVENC_ONE_PASS)
891  ctx->twopass = 0;
892  if (ctx->flags & NVENC_TWO_PASSES)
893  ctx->twopass = 1;
894 
895  if (ctx->twopass < 0)
896  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
897 
898  if (ctx->cbr) {
899  if (ctx->twopass) {
900  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
901  } else {
902  ctx->rc = NV_ENC_PARAMS_RC_CBR;
903  }
904  } else if (ctx->cqp >= 0) {
905  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
906  } else if (ctx->twopass) {
907  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
908  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
909  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
910  }
911  }
912 
913  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
914  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
915  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_quality -> cbr_ld_hq\n");
916  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_size -> cbr_hq\n");
917  av_log(avctx, AV_LOG_WARNING, "\tvbr_2pass -> vbr_hq\n");
918  av_log(avctx, AV_LOG_WARNING, "\tvbr_minqp -> (no replacement)\n");
919 
920  ctx->rc &= ~RC_MODE_DEPRECATED;
921  }
922 
923 #ifdef NVENC_HAVE_LDKFS
924  if (ctx->ldkfs)
925  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
926 #endif
927 
928  if (ctx->flags & NVENC_LOSSLESS) {
929  set_lossless(avctx);
930  } else if (ctx->rc >= 0) {
932  } else {
933  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
934  set_vbr(avctx);
935  }
936 
937  if (avctx->rc_buffer_size > 0) {
938  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
939  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
940  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
941  }
942 
943  if (ctx->aq) {
944  ctx->encode_config.rcParams.enableAQ = 1;
945  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
946  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
947  }
948 
949  if (ctx->temporal_aq) {
950  ctx->encode_config.rcParams.enableTemporalAQ = 1;
951  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
952  }
953 
954  if (ctx->rc_lookahead > 0) {
955  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
956  ctx->encode_config.frameIntervalP - 4;
957 
958  if (lkd_bound < 0) {
959  av_log(avctx, AV_LOG_WARNING,
960  "Lookahead not enabled. Increase buffer delay (-delay).\n");
961  } else {
962  ctx->encode_config.rcParams.enableLookahead = 1;
963  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
964  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
965  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
966  av_log(avctx, AV_LOG_VERBOSE,
967  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
968  ctx->encode_config.rcParams.lookaheadDepth,
969  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
970  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
971  }
972  }
973 
974  if (ctx->strict_gop) {
975  ctx->encode_config.rcParams.strictGOPTarget = 1;
976  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
977  }
978 
979  if (ctx->nonref_p)
980  ctx->encode_config.rcParams.enableNonRefP = 1;
981 
982  if (ctx->zerolatency)
983  ctx->encode_config.rcParams.zeroReorderDelay = 1;
984 
985  if (ctx->quality) {
986  //convert from float to fixed point 8.8
987  int tmp_quality = (int)(ctx->quality * 256.0f);
988  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
989  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
990 
991  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
992 
993  //CQ mode shall discard avg bitrate & honor max bitrate;
994  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
995  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
996  }
997 }
998 
1000 {
1001  NvencContext *ctx = avctx->priv_data;
1002  NV_ENC_CONFIG *cc = &ctx->encode_config;
1003  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1004  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1005 
1006  vui->colourMatrix = avctx->colorspace;
1007  vui->colourPrimaries = avctx->color_primaries;
1008  vui->transferCharacteristics = avctx->color_trc;
1009  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1011 
1012  vui->colourDescriptionPresentFlag =
1013  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1014 
1015  vui->videoSignalTypePresentFlag =
1016  (vui->colourDescriptionPresentFlag
1017  || vui->videoFormat != 5
1018  || vui->videoFullRangeFlag != 0);
1019 
1020  h264->sliceMode = 3;
1021  h264->sliceModeData = 1;
1022 
1023  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1024  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1025  h264->outputAUD = ctx->aud;
1026 
1027  if (ctx->dpb_size >= 0) {
1028  /* 0 means "let the hardware decide" */
1029  h264->maxNumRefFrames = ctx->dpb_size;
1030  }
1031  if (avctx->gop_size >= 0) {
1032  h264->idrPeriod = cc->gopLength;
1033  }
1034 
1035  if (IS_CBR(cc->rcParams.rateControlMode)) {
1036  h264->outputBufferingPeriodSEI = 1;
1037  }
1038 
1039  h264->outputPictureTimingSEI = 1;
1040 
1041  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1042  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1043  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1044  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1045  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1046  }
1047 
1048  if (ctx->flags & NVENC_LOSSLESS) {
1049  h264->qpPrimeYZeroTransformBypassFlag = 1;
1050  } else {
1051  switch(ctx->profile) {
1053  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1055  break;
1057  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1058  avctx->profile = FF_PROFILE_H264_MAIN;
1059  break;
1061  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1062  avctx->profile = FF_PROFILE_H264_HIGH;
1063  break;
1065  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1067  break;
1068  }
1069  }
1070 
1071  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1072  if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
1073  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1075  }
1076 
1077  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1078 
1079  h264->level = ctx->level;
1080 
1081  if (ctx->coder >= 0)
1082  h264->entropyCodingMode = ctx->coder;
1083 
1084 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1085  h264->useBFramesAsRef = ctx->b_ref_mode;
1086 #endif
1087 
1088 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1089  h264->numRefL0 = avctx->refs;
1090  h264->numRefL1 = avctx->refs;
1091 #endif
1092 
1093  return 0;
1094 }
1095 
1097 {
1098  NvencContext *ctx = avctx->priv_data;
1099  NV_ENC_CONFIG *cc = &ctx->encode_config;
1100  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1101  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1102 
1103  vui->colourMatrix = avctx->colorspace;
1104  vui->colourPrimaries = avctx->color_primaries;
1105  vui->transferCharacteristics = avctx->color_trc;
1106  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1108 
1109  vui->colourDescriptionPresentFlag =
1110  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1111 
1112  vui->videoSignalTypePresentFlag =
1113  (vui->colourDescriptionPresentFlag
1114  || vui->videoFormat != 5
1115  || vui->videoFullRangeFlag != 0);
1116 
1117  hevc->sliceMode = 3;
1118  hevc->sliceModeData = 1;
1119 
1120  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1121  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1122  hevc->outputAUD = ctx->aud;
1123 
1124  if (ctx->dpb_size >= 0) {
1125  /* 0 means "let the hardware decide" */
1126  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1127  }
1128  if (avctx->gop_size >= 0) {
1129  hevc->idrPeriod = cc->gopLength;
1130  }
1131 
1132  if (IS_CBR(cc->rcParams.rateControlMode)) {
1133  hevc->outputBufferingPeriodSEI = 1;
1134  }
1135 
1136  hevc->outputPictureTimingSEI = 1;
1137 
1138  switch (ctx->profile) {
1140  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1141  avctx->profile = FF_PROFILE_HEVC_MAIN;
1142  break;
1144  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1146  break;
1148  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1149  avctx->profile = FF_PROFILE_HEVC_REXT;
1150  break;
1151  }
1152 
1153  // force setting profile as main10 if input is 10 bit
1154  if (IS_10BIT(ctx->data_pix_fmt)) {
1155  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1157  }
1158 
1159  // force setting profile as rext if input is yuv444
1160  if (IS_YUV444(ctx->data_pix_fmt)) {
1161  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1162  avctx->profile = FF_PROFILE_HEVC_REXT;
1163  }
1164 
1165  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1166 
1167  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1168 
1169  hevc->level = ctx->level;
1170 
1171  hevc->tier = ctx->tier;
1172 
1173 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1174  hevc->useBFramesAsRef = ctx->b_ref_mode;
1175 #endif
1176 
1177 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1178  hevc->numRefL0 = avctx->refs;
1179  hevc->numRefL1 = avctx->refs;
1180 #endif
1181 
1182  return 0;
1183 }
1184 
1186 {
1187  switch (avctx->codec->id) {
1188  case AV_CODEC_ID_H264:
1189  return nvenc_setup_h264_config(avctx);
1190  case AV_CODEC_ID_HEVC:
1191  return nvenc_setup_hevc_config(avctx);
1192  /* Earlier switch/case will return if unknown codec is passed. */
1193  }
1194 
1195  return 0;
1196 }
1197 
1198 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1199  int sw, sh;
1200 
1201  sw = avctx->width;
1202  sh = avctx->height;
1203 
1204  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1205  sw *= avctx->sample_aspect_ratio.num;
1206  sh *= avctx->sample_aspect_ratio.den;
1207  }
1208 
1209  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1210 }
1211 
1213 {
1214  NvencContext *ctx = avctx->priv_data;
1216  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1217 
1218  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1219  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1220  AVCPBProperties *cpb_props;
1221  int res = 0;
1222  int dw, dh;
1223 
1224  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1225  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1226 
1227  ctx->init_encode_params.encodeHeight = avctx->height;
1228  ctx->init_encode_params.encodeWidth = avctx->width;
1229 
1230  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1231 
1232  nvenc_map_preset(ctx);
1233 
1234  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1235  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1236 
1237  if (IS_SDK10_PRESET(ctx->preset)) {
1238 #ifdef NVENC_HAVE_NEW_PRESETS
1239  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1240 
1241  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1242  ctx->init_encode_params.encodeGUID,
1243  ctx->init_encode_params.presetGUID,
1244  ctx->init_encode_params.tuningInfo,
1245  &preset_config);
1246 #endif
1247  } else {
1248 #ifdef NVENC_HAVE_NEW_PRESETS
1249  // Turn off tuning info parameter if older presets are on
1250  ctx->init_encode_params.tuningInfo = 0;
1251 #endif
1252 
1253  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1254  ctx->init_encode_params.encodeGUID,
1255  ctx->init_encode_params.presetGUID,
1256  &preset_config);
1257  }
1258  if (nv_status != NV_ENC_SUCCESS)
1259  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1260 
1261  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1262 
1263  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1264 
1265  compute_dar(avctx, &dw, &dh);
1266  ctx->init_encode_params.darHeight = dh;
1267  ctx->init_encode_params.darWidth = dw;
1268 
1269  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1270  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1271  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1272  } else {
1273  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1274  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1275  }
1276 
1277  ctx->init_encode_params.enableEncodeAsync = 0;
1278  ctx->init_encode_params.enablePTD = 1;
1279 
1280 #ifdef NVENC_HAVE_NEW_PRESETS
1281  /* If lookahead isn't set from CLI, use value from preset.
1282  * P6 & P7 presets may enable lookahead for better quality.
1283  * */
1284  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1285  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1286 
1287  if (ctx->init_encode_params.tuningInfo == NV_ENC_TUNING_INFO_LOSSLESS)
1288  ctx->flags |= NVENC_LOSSLESS;
1289 #endif
1290 
1291  if (ctx->weighted_pred == 1)
1292  ctx->init_encode_params.enableWeightedPrediction = 1;
1293 
1294  if (ctx->bluray_compat) {
1295  ctx->aud = 1;
1296  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1297  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1298  switch (avctx->codec->id) {
1299  case AV_CODEC_ID_H264:
1300  /* maximum level depends on used resolution */
1301  break;
1302  case AV_CODEC_ID_HEVC:
1303  ctx->level = NV_ENC_LEVEL_HEVC_51;
1304  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1305  break;
1306  }
1307  }
1308 
1309  if (avctx->gop_size > 0) {
1310  if (avctx->max_b_frames >= 0) {
1311  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1312  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1313  }
1314 
1315  ctx->encode_config.gopLength = avctx->gop_size;
1316  } else if (avctx->gop_size == 0) {
1317  ctx->encode_config.frameIntervalP = 0;
1318  ctx->encode_config.gopLength = 1;
1319  }
1320 
1321  nvenc_recalc_surfaces(avctx);
1322 
1323  nvenc_setup_rate_control(avctx);
1324 
1325  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1326  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1327  } else {
1328  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1329  }
1330 
1331  res = nvenc_setup_codec_config(avctx);
1332  if (res)
1333  return res;
1334 
1335  res = nvenc_push_context(avctx);
1336  if (res < 0)
1337  return res;
1338 
1339  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1340  if (nv_status != NV_ENC_SUCCESS) {
1341  nvenc_pop_context(avctx);
1342  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1343  }
1344 
1345 #ifdef NVENC_HAVE_CUSTREAM_PTR
1346  if (ctx->cu_context) {
1347  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1348  if (nv_status != NV_ENC_SUCCESS) {
1349  nvenc_pop_context(avctx);
1350  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1351  }
1352  }
1353 #endif
1354 
1355  res = nvenc_pop_context(avctx);
1356  if (res < 0)
1357  return res;
1358 
1359  if (ctx->encode_config.frameIntervalP > 1)
1360  avctx->has_b_frames = 2;
1361 
1362  if (ctx->encode_config.rcParams.averageBitRate > 0)
1363  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1364 
1365  cpb_props = ff_add_cpb_side_data(avctx);
1366  if (!cpb_props)
1367  return AVERROR(ENOMEM);
1368  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1369  cpb_props->avg_bitrate = avctx->bit_rate;
1370  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1371 
1372  return 0;
1373 }
1374 
1375 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1376 {
1377  switch (pix_fmt) {
1378  case AV_PIX_FMT_YUV420P:
1379  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1380  case AV_PIX_FMT_NV12:
1381  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1382  case AV_PIX_FMT_P010:
1383  case AV_PIX_FMT_P016:
1384  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1385  case AV_PIX_FMT_YUV444P:
1386  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1387  case AV_PIX_FMT_YUV444P16:
1388  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1389  case AV_PIX_FMT_0RGB32:
1390  return NV_ENC_BUFFER_FORMAT_ARGB;
1391  case AV_PIX_FMT_0BGR32:
1392  return NV_ENC_BUFFER_FORMAT_ABGR;
1393  default:
1394  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1395  }
1396 }
1397 
1398 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1399 {
1400  NvencContext *ctx = avctx->priv_data;
1402  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1403  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1404 
1405  NVENCSTATUS nv_status;
1406  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1407  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1408 
1409  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1410  ctx->surfaces[idx].in_ref = av_frame_alloc();
1411  if (!ctx->surfaces[idx].in_ref)
1412  return AVERROR(ENOMEM);
1413  } else {
1414  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1415 
1417  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1418  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1420  return AVERROR(EINVAL);
1421  }
1422 
1423  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1424  allocSurf.width = avctx->width;
1425  allocSurf.height = avctx->height;
1426  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1427 
1428  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1429  if (nv_status != NV_ENC_SUCCESS) {
1430  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1431  }
1432 
1433  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1434  ctx->surfaces[idx].width = allocSurf.width;
1435  ctx->surfaces[idx].height = allocSurf.height;
1436  }
1437 
1438  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1439  if (nv_status != NV_ENC_SUCCESS) {
1440  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1441  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1442  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1443  av_frame_free(&ctx->surfaces[idx].in_ref);
1444  return err;
1445  }
1446 
1447  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1448  ctx->surfaces[idx].size = allocOut.size;
1449 
1450  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1451 
1452  return 0;
1453 }
1454 
1456 {
1457  NvencContext *ctx = avctx->priv_data;
1458  int i, res = 0, res2;
1459 
1460  ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1461  if (!ctx->surfaces)
1462  return AVERROR(ENOMEM);
1463 
1464  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1465  if (!ctx->timestamp_list)
1466  return AVERROR(ENOMEM);
1467 
1469  if (!ctx->unused_surface_queue)
1470  return AVERROR(ENOMEM);
1471 
1473  if (!ctx->output_surface_queue)
1474  return AVERROR(ENOMEM);
1476  if (!ctx->output_surface_ready_queue)
1477  return AVERROR(ENOMEM);
1478 
1479  res = nvenc_push_context(avctx);
1480  if (res < 0)
1481  return res;
1482 
1483  for (i = 0; i < ctx->nb_surfaces; i++) {
1484  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1485  goto fail;
1486  }
1487 
1488 fail:
1489  res2 = nvenc_pop_context(avctx);
1490  if (res2 < 0)
1491  return res2;
1492 
1493  return res;
1494 }
1495 
1497 {
1498  NvencContext *ctx = avctx->priv_data;
1500  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1501 
1502  NVENCSTATUS nv_status;
1503  uint32_t outSize = 0;
1504  char tmpHeader[256];
1505  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1506  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1507 
1508  payload.spsppsBuffer = tmpHeader;
1509  payload.inBufferSize = sizeof(tmpHeader);
1510  payload.outSPSPPSPayloadSize = &outSize;
1511 
1512  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1513  if (nv_status != NV_ENC_SUCCESS) {
1514  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1515  }
1516 
1517  avctx->extradata_size = outSize;
1519 
1520  if (!avctx->extradata) {
1521  return AVERROR(ENOMEM);
1522  }
1523 
1524  memcpy(avctx->extradata, tmpHeader, outSize);
1525 
1526  return 0;
1527 }
1528 
1530 {
1531  NvencContext *ctx = avctx->priv_data;
1533  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1534  int i, res;
1535 
1536  /* the encoder has to be flushed before it can be closed */
1537  if (ctx->nvencoder) {
1538  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1539  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1540 
1541  res = nvenc_push_context(avctx);
1542  if (res < 0)
1543  return res;
1544 
1545  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1546  }
1547 
1552 
1553  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1554  for (i = 0; i < ctx->nb_registered_frames; i++) {
1555  if (ctx->registered_frames[i].mapped)
1556  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1557  if (ctx->registered_frames[i].regptr)
1558  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1559  }
1560  ctx->nb_registered_frames = 0;
1561  }
1562 
1563  if (ctx->surfaces) {
1564  for (i = 0; i < ctx->nb_surfaces; ++i) {
1565  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1566  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1567  av_frame_free(&ctx->surfaces[i].in_ref);
1568  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1569  }
1570  }
1571  av_freep(&ctx->surfaces);
1572  ctx->nb_surfaces = 0;
1573 
1574  av_frame_free(&ctx->frame);
1575 
1576  if (ctx->nvencoder) {
1577  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1578 
1579  res = nvenc_pop_context(avctx);
1580  if (res < 0)
1581  return res;
1582  }
1583  ctx->nvencoder = NULL;
1584 
1585  if (ctx->cu_context_internal)
1586  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1587  ctx->cu_context = ctx->cu_context_internal = NULL;
1588 
1589 #if CONFIG_D3D11VA
1590  if (ctx->d3d11_device) {
1591  ID3D11Device_Release(ctx->d3d11_device);
1592  ctx->d3d11_device = NULL;
1593  }
1594 #endif
1595 
1596  nvenc_free_functions(&dl_fn->nvenc_dl);
1597  cuda_free_functions(&dl_fn->cuda_dl);
1598 
1599  dl_fn->nvenc_device_count = 0;
1600 
1601  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1602 
1603  return 0;
1604 }
1605 
1607 {
1608  NvencContext *ctx = avctx->priv_data;
1609  int ret;
1610 
1611  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1612  AVHWFramesContext *frames_ctx;
1613  if (!avctx->hw_frames_ctx) {
1614  av_log(avctx, AV_LOG_ERROR,
1615  "hw_frames_ctx must be set when using GPU frames as input\n");
1616  return AVERROR(EINVAL);
1617  }
1618  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1619  if (frames_ctx->format != avctx->pix_fmt) {
1620  av_log(avctx, AV_LOG_ERROR,
1621  "hw_frames_ctx must match the GPU frame type\n");
1622  return AVERROR(EINVAL);
1623  }
1624  ctx->data_pix_fmt = frames_ctx->sw_format;
1625  } else {
1626  ctx->data_pix_fmt = avctx->pix_fmt;
1627  }
1628 
1629  ctx->frame = av_frame_alloc();
1630  if (!ctx->frame)
1631  return AVERROR(ENOMEM);
1632 
1633  if ((ret = nvenc_load_libraries(avctx)) < 0)
1634  return ret;
1635 
1636  if ((ret = nvenc_setup_device(avctx)) < 0)
1637  return ret;
1638 
1639  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1640  return ret;
1641 
1642  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1643  return ret;
1644 
1645  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1646  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1647  return ret;
1648  }
1649 
1650  return 0;
1651 }
1652 
1654 {
1655  NvencSurface *tmp_surf;
1656 
1657  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1658  // queue empty
1659  return NULL;
1660 
1661  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1662  return tmp_surf;
1663 }
1664 
1665 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1666  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1667 {
1668  int dst_linesize[4] = {
1669  lock_buffer_params->pitch,
1670  lock_buffer_params->pitch,
1671  lock_buffer_params->pitch,
1672  lock_buffer_params->pitch
1673  };
1674  uint8_t *dst_data[4];
1675  int ret;
1676 
1677  if (frame->format == AV_PIX_FMT_YUV420P)
1678  dst_linesize[1] = dst_linesize[2] >>= 1;
1679 
1680  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1681  lock_buffer_params->bufferDataPtr, dst_linesize);
1682  if (ret < 0)
1683  return ret;
1684 
1685  if (frame->format == AV_PIX_FMT_YUV420P)
1686  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1687 
1688  av_image_copy(dst_data, dst_linesize,
1689  (const uint8_t**)frame->data, frame->linesize, frame->format,
1690  avctx->width, avctx->height);
1691 
1692  return 0;
1693 }
1694 
1696 {
1697  NvencContext *ctx = avctx->priv_data;
1699  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1700  NVENCSTATUS nv_status;
1701 
1702  int i, first_round;
1703 
1705  for (first_round = 1; first_round >= 0; first_round--) {
1706  for (i = 0; i < ctx->nb_registered_frames; i++) {
1707  if (!ctx->registered_frames[i].mapped) {
1708  if (ctx->registered_frames[i].regptr) {
1709  if (first_round)
1710  continue;
1711  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1712  if (nv_status != NV_ENC_SUCCESS)
1713  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1714  ctx->registered_frames[i].ptr = NULL;
1715  ctx->registered_frames[i].regptr = NULL;
1716  }
1717  return i;
1718  }
1719  }
1720  }
1721  } else {
1722  return ctx->nb_registered_frames++;
1723  }
1724 
1725  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1726  return AVERROR(ENOMEM);
1727 }
1728 
1730 {
1731  NvencContext *ctx = avctx->priv_data;
1733  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1734 
1735  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1736  NV_ENC_REGISTER_RESOURCE reg;
1737  int i, idx, ret;
1738 
1739  for (i = 0; i < ctx->nb_registered_frames; i++) {
1740  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1741  return i;
1742  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1743  return i;
1744  }
1745 
1746  idx = nvenc_find_free_reg_resource(avctx);
1747  if (idx < 0)
1748  return idx;
1749 
1750  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1751  reg.width = frames_ctx->width;
1752  reg.height = frames_ctx->height;
1753  reg.pitch = frame->linesize[0];
1754  reg.resourceToRegister = frame->data[0];
1755 
1756  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1757  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1758  }
1759  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1760  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1761  reg.subResourceIndex = (intptr_t)frame->data[1];
1762  }
1763 
1764  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1765  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1766  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1767  av_get_pix_fmt_name(frames_ctx->sw_format));
1768  return AVERROR(EINVAL);
1769  }
1770 
1771  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1772  if (ret != NV_ENC_SUCCESS) {
1773  nvenc_print_error(avctx, ret, "Error registering an input resource");
1774  return AVERROR_UNKNOWN;
1775  }
1776 
1777  ctx->registered_frames[idx].ptr = frame->data[0];
1778  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1779  ctx->registered_frames[idx].regptr = reg.registeredResource;
1780  return idx;
1781 }
1782 
1784  NvencSurface *nvenc_frame)
1785 {
1786  NvencContext *ctx = avctx->priv_data;
1788  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1789 
1790  int res;
1791  NVENCSTATUS nv_status;
1792 
1793  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1794  int reg_idx = nvenc_register_frame(avctx, frame);
1795  if (reg_idx < 0) {
1796  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1797  return reg_idx;
1798  }
1799 
1800  res = av_frame_ref(nvenc_frame->in_ref, frame);
1801  if (res < 0)
1802  return res;
1803 
1804  if (!ctx->registered_frames[reg_idx].mapped) {
1805  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1806  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1807  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1808  if (nv_status != NV_ENC_SUCCESS) {
1809  av_frame_unref(nvenc_frame->in_ref);
1810  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1811  }
1812  }
1813 
1814  ctx->registered_frames[reg_idx].mapped += 1;
1815 
1816  nvenc_frame->reg_idx = reg_idx;
1817  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1818  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1819  nvenc_frame->pitch = frame->linesize[0];
1820 
1821  return 0;
1822  } else {
1823  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1824 
1825  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1826  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1827 
1828  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1829  if (nv_status != NV_ENC_SUCCESS) {
1830  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1831  }
1832 
1833  nvenc_frame->pitch = lockBufferParams.pitch;
1834  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1835 
1836  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1837  if (nv_status != NV_ENC_SUCCESS) {
1838  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1839  }
1840 
1841  return res;
1842  }
1843 }
1844 
1846  NV_ENC_PIC_PARAMS *params,
1847  NV_ENC_SEI_PAYLOAD *sei_data,
1848  int sei_count)
1849 {
1850  NvencContext *ctx = avctx->priv_data;
1851 
1852  switch (avctx->codec->id) {
1853  case AV_CODEC_ID_H264:
1854  params->codecPicParams.h264PicParams.sliceMode =
1855  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1856  params->codecPicParams.h264PicParams.sliceModeData =
1857  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1858  if (sei_count > 0) {
1859  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1860  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
1861  }
1862 
1863  break;
1864  case AV_CODEC_ID_HEVC:
1865  params->codecPicParams.hevcPicParams.sliceMode =
1866  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1867  params->codecPicParams.hevcPicParams.sliceModeData =
1868  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1869  if (sei_count > 0) {
1870  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1871  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
1872  }
1873 
1874  break;
1875  }
1876 }
1877 
1878 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1879 {
1880  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
1881 }
1882 
1883 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1884 {
1885  int64_t timestamp = AV_NOPTS_VALUE;
1886  if (av_fifo_size(queue) > 0)
1887  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
1888 
1889  return timestamp;
1890 }
1891 
1893  NV_ENC_LOCK_BITSTREAM *params,
1894  AVPacket *pkt)
1895 {
1896  NvencContext *ctx = avctx->priv_data;
1897 
1898  pkt->pts = params->outputTimeStamp;
1900 
1901  pkt->dts -= FFMAX(avctx->max_b_frames, 0) * FFMIN(avctx->ticks_per_frame, 1);
1902 
1903  return 0;
1904 }
1905 
1907 {
1908  NvencContext *ctx = avctx->priv_data;
1910  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1911 
1912  uint32_t slice_mode_data;
1913  uint32_t *slice_offsets = NULL;
1914  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1915  NVENCSTATUS nv_status;
1916  int res = 0;
1917 
1918  enum AVPictureType pict_type;
1919 
1920  switch (avctx->codec->id) {
1921  case AV_CODEC_ID_H264:
1922  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1923  break;
1924  case AV_CODEC_ID_H265:
1925  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1926  break;
1927  default:
1928  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1929  res = AVERROR(EINVAL);
1930  goto error;
1931  }
1932  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1933 
1934  if (!slice_offsets) {
1935  res = AVERROR(ENOMEM);
1936  goto error;
1937  }
1938 
1939  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1940 
1941  lock_params.doNotWait = 0;
1942  lock_params.outputBitstream = tmpoutsurf->output_surface;
1943  lock_params.sliceOffsets = slice_offsets;
1944 
1945  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1946  if (nv_status != NV_ENC_SUCCESS) {
1947  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1948  goto error;
1949  }
1950 
1951  res = av_new_packet(pkt, lock_params.bitstreamSizeInBytes);
1952 
1953  if (res < 0) {
1954  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1955  goto error;
1956  }
1957 
1958  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1959 
1960  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1961  if (nv_status != NV_ENC_SUCCESS) {
1962  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1963  goto error;
1964  }
1965 
1966 
1967  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1968  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
1969  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
1970  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
1971  if (nv_status != NV_ENC_SUCCESS) {
1972  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
1973  goto error;
1974  }
1975  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
1976  res = AVERROR_BUG;
1977  goto error;
1978  }
1979 
1980  av_frame_unref(tmpoutsurf->in_ref);
1981 
1982  tmpoutsurf->input_surface = NULL;
1983  }
1984 
1985  switch (lock_params.pictureType) {
1986  case NV_ENC_PIC_TYPE_IDR:
1987  pkt->flags |= AV_PKT_FLAG_KEY;
1988  case NV_ENC_PIC_TYPE_I:
1989  pict_type = AV_PICTURE_TYPE_I;
1990  break;
1991  case NV_ENC_PIC_TYPE_P:
1992  pict_type = AV_PICTURE_TYPE_P;
1993  break;
1994  case NV_ENC_PIC_TYPE_B:
1995  pict_type = AV_PICTURE_TYPE_B;
1996  break;
1997  case NV_ENC_PIC_TYPE_BI:
1998  pict_type = AV_PICTURE_TYPE_BI;
1999  break;
2000  default:
2001  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2002  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2003  res = AVERROR_EXTERNAL;
2004  goto error;
2005  }
2006 
2007 #if FF_API_CODED_FRAME
2009  avctx->coded_frame->pict_type = pict_type;
2011 #endif
2012 
2014  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2015 
2016  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2017  if (res < 0)
2018  goto error2;
2019 
2020  av_free(slice_offsets);
2021 
2022  return 0;
2023 
2024 error:
2026 
2027 error2:
2028  av_free(slice_offsets);
2029 
2030  return res;
2031 }
2032 
2033 static int output_ready(AVCodecContext *avctx, int flush)
2034 {
2035  NvencContext *ctx = avctx->priv_data;
2036  int nb_ready, nb_pending;
2037 
2038  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
2039  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
2040  if (flush)
2041  return nb_ready > 0;
2042  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2043 }
2044 
2045 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2046 {
2047  NvencContext *ctx = avctx->priv_data;
2048  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2049  NVENCSTATUS ret;
2050 
2051  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2052  int needs_reconfig = 0;
2053  int needs_encode_config = 0;
2054  int reconfig_bitrate = 0, reconfig_dar = 0;
2055  int dw, dh;
2056 
2057  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2058  params.reInitEncodeParams = ctx->init_encode_params;
2059 
2060  compute_dar(avctx, &dw, &dh);
2061  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2062  av_log(avctx, AV_LOG_VERBOSE,
2063  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2064  ctx->init_encode_params.darWidth,
2065  ctx->init_encode_params.darHeight, dw, dh);
2066 
2067  params.reInitEncodeParams.darHeight = dh;
2068  params.reInitEncodeParams.darWidth = dw;
2069 
2070  needs_reconfig = 1;
2071  reconfig_dar = 1;
2072  }
2073 
2074  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2075  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2076  av_log(avctx, AV_LOG_VERBOSE,
2077  "avg bitrate change: %d -> %d\n",
2078  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2079  (uint32_t)avctx->bit_rate);
2080 
2081  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2082  reconfig_bitrate = 1;
2083  }
2084 
2085  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2086  av_log(avctx, AV_LOG_VERBOSE,
2087  "max bitrate change: %d -> %d\n",
2088  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2089  (uint32_t)avctx->rc_max_rate);
2090 
2091  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2092  reconfig_bitrate = 1;
2093  }
2094 
2095  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2096  av_log(avctx, AV_LOG_VERBOSE,
2097  "vbv buffer size change: %d -> %d\n",
2098  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2099  avctx->rc_buffer_size);
2100 
2101  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2102  reconfig_bitrate = 1;
2103  }
2104 
2105  if (reconfig_bitrate) {
2106  params.resetEncoder = 1;
2107  params.forceIDR = 1;
2108 
2109  needs_encode_config = 1;
2110  needs_reconfig = 1;
2111  }
2112  }
2113 
2114  if (!needs_encode_config)
2115  params.reInitEncodeParams.encodeConfig = NULL;
2116 
2117  if (needs_reconfig) {
2118  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2119  if (ret != NV_ENC_SUCCESS) {
2120  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2121  } else {
2122  if (reconfig_dar) {
2123  ctx->init_encode_params.darHeight = dh;
2124  ctx->init_encode_params.darWidth = dw;
2125  }
2126 
2127  if (reconfig_bitrate) {
2128  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2129  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2130  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2131  }
2132 
2133  }
2134  }
2135 }
2136 
2137 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2138 {
2139  NVENCSTATUS nv_status;
2140  NvencSurface *tmp_out_surf, *in_surf;
2141  int res, res2;
2142  NV_ENC_SEI_PAYLOAD sei_data[8];
2143  int sei_count = 0;
2144  int i;
2145 
2146  NvencContext *ctx = avctx->priv_data;
2148  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2149 
2150  NV_ENC_PIC_PARAMS pic_params = { 0 };
2151  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2152 
2153  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2154  return AVERROR(EINVAL);
2155 
2156  if (frame && frame->buf[0]) {
2157  in_surf = get_free_frame(ctx);
2158  if (!in_surf)
2159  return AVERROR(EAGAIN);
2160 
2161  res = nvenc_push_context(avctx);
2162  if (res < 0)
2163  return res;
2164 
2165  reconfig_encoder(avctx, frame);
2166 
2167  res = nvenc_upload_frame(avctx, frame, in_surf);
2168 
2169  res2 = nvenc_pop_context(avctx);
2170  if (res2 < 0)
2171  return res2;
2172 
2173  if (res)
2174  return res;
2175 
2176  pic_params.inputBuffer = in_surf->input_surface;
2177  pic_params.bufferFmt = in_surf->format;
2178  pic_params.inputWidth = in_surf->width;
2179  pic_params.inputHeight = in_surf->height;
2180  pic_params.inputPitch = in_surf->pitch;
2181  pic_params.outputBitstream = in_surf->output_surface;
2182 
2183  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2184  if (frame->top_field_first)
2185  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2186  else
2187  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2188  } else {
2189  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2190  }
2191 
2192  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2193  pic_params.encodePicFlags =
2194  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2195  } else {
2196  pic_params.encodePicFlags = 0;
2197  }
2198 
2199  pic_params.inputTimeStamp = frame->pts;
2200 
2201  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2202  void *a53_data = NULL;
2203  size_t a53_size = 0;
2204 
2205  if (ff_alloc_a53_sei(frame, 0, (void**)&a53_data, &a53_size) < 0) {
2206  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2207  }
2208 
2209  if (a53_data) {
2210  sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2211  sei_data[sei_count].payloadType = 4;
2212  sei_data[sei_count].payload = (uint8_t*)a53_data;
2213  sei_count ++;
2214  }
2215  }
2216 
2218  void *tc_data = NULL;
2219  size_t tc_size = 0;
2220 
2221  if (ff_alloc_timecode_sei(frame, 0, (void**)&tc_data, &tc_size) < 0) {
2222  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2223  }
2224 
2225  if (tc_data) {
2226  sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2227  sei_data[sei_count].payloadType = HEVC_SEI_TYPE_TIME_CODE;
2228  sei_data[sei_count].payload = (uint8_t*)tc_data;
2229  sei_count ++;
2230  }
2231  }
2232 
2233  nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data, sei_count);
2234  } else {
2235  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2236  }
2237 
2238  res = nvenc_push_context(avctx);
2239  if (res < 0)
2240  return res;
2241 
2242  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2243 
2244  for ( i = 0; i < sei_count; i++)
2245  av_freep(&sei_data[i].payload);
2246 
2247  res = nvenc_pop_context(avctx);
2248  if (res < 0)
2249  return res;
2250 
2251  if (nv_status != NV_ENC_SUCCESS &&
2252  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2253  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2254 
2255  if (frame && frame->buf[0]) {
2256  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2258  }
2259 
2260  /* all the pending buffers are now ready for output */
2261  if (nv_status == NV_ENC_SUCCESS) {
2262  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2263  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2264  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2265  }
2266  }
2267 
2268  return 0;
2269 }
2270 
2272 {
2273  NvencSurface *tmp_out_surf;
2274  int res, res2;
2275 
2276  NvencContext *ctx = avctx->priv_data;
2277 
2278  AVFrame *frame = ctx->frame;
2279 
2280  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2281  return AVERROR(EINVAL);
2282 
2283  if (!frame->buf[0]) {
2284  res = ff_encode_get_frame(avctx, frame);
2285  if (res < 0 && res != AVERROR_EOF)
2286  return res;
2287  }
2288 
2289  res = nvenc_send_frame(avctx, frame);
2290  if (res < 0) {
2291  if (res != AVERROR(EAGAIN))
2292  return res;
2293  } else
2294  av_frame_unref(frame);
2295 
2296  if (output_ready(avctx, avctx->internal->draining)) {
2297  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2298 
2299  res = nvenc_push_context(avctx);
2300  if (res < 0)
2301  return res;
2302 
2303  res = process_output_surface(avctx, pkt, tmp_out_surf);
2304 
2305  res2 = nvenc_pop_context(avctx);
2306  if (res2 < 0)
2307  return res2;
2308 
2309  if (res)
2310  return res;
2311 
2312  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2313  } else if (avctx->internal->draining) {
2314  return AVERROR_EOF;
2315  } else {
2316  return AVERROR(EAGAIN);
2317  }
2318 
2319  return 0;
2320 }
2321 
2323 {
2324  NvencContext *ctx = avctx->priv_data;
2325 
2326  nvenc_send_frame(avctx, NULL);
2328 }
const GUID guid
Definition: nvenc.c:641
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1900
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
int no_scenecut
Definition: nvenc.h:197
#define NULL
Definition: coverity.c:32
const struct AVCodec * codec
Definition: avcodec.h:535
AVRational framerate
Definition: avcodec.h:2069
BI type.
Definition: avutil.h:280
void * nvencoder
Definition: nvenc.h:183
int support_dyn_bitrate
Definition: nvenc.h:181
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1529
int twopass
Definition: nvenc.h:191
#define CHECK_CU(x)
Definition: nvenc.c:38
static enum AVPixelFormat pix_fmt
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:83
int height
Definition: nvenc.h:79
This structure describes decoded (raw) audio or video data.
Definition: frame.h:308
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1185
AVFifoBuffer * timestamp_list
Definition: nvenc.h:166
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:728
static void flush(AVCodecContext *avctx)
NvencFunctions * nvenc_dl
Definition: nvenc.h:90
int mapped
Definition: nvenc.h:172
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:321
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:718
AVFrame * in_ref
Definition: nvenc.h:76
#define P1
Definition: cavsdsp.c:39
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
misc image utilities
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:200
int64_t bit_rate
the average bitrate
Definition: avcodec.h:576
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
Memory handling functions.
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:534
AVBufferRef * buf[AV_NUM_DATA_POINTERS]
AVBuffer references backing the data for this frame.
Definition: frame.h:499
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2137
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:99
const char * desc
Definition: nvenc.c:87
int max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: avcodec.h:454
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:786
int forced_idr
Definition: nvenc.h:198
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:1161
int num
Numerator.
Definition: rational.h:59
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:168
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:645
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1455
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:92
NvencDynLoadFunctions nvenc_dload_funcs
Definition: nvenc.h:149
ID3D11Device * d3d11_device
Definition: nvenc.h:156
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel...
Definition: avcodec.h:905
int width
The allocated dimensions of the frames in this pool.
Definition: hwcontext.h:229
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:736
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2271
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:237
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:825
static AVPacket pkt
int init_qp_b
Definition: nvenc.h:209
static void error(const char *err)
#define PRESET(name,...)
Definition: nvenc.c:648
int profile
profile
Definition: avcodec.h:1859
int preset
Definition: nvenc.h:185
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:838
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:794
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1653
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:864
int pitch
Definition: nvenc.h:80
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:122
int nvenc_device_count
Definition: nvenc.h:93
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1910
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:75
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented...
Definition: avcodec.h:649
NVENCSTATUS nverr
Definition: nvenc.c:85
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:739
AVBufferRef * hw_frames_ctx
For hwaccel-format frames, this should be a reference to the AVHWFramesContext describing the frame...
Definition: frame.h:647
int aq
Definition: nvenc.h:196
#define AV_PIX_FMT_P016
Definition: pixfmt.h:449
int b_ref_mode
Definition: nvenc.h:214
#define AV_PIX_FMT_P010
Definition: pixfmt.h:448
CUcontext cu_context
Definition: nvenc.h:153
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1898
#define DEFAULT
Definition: avdct.c:28
uint8_t
AVFifoBuffer * unused_surface_queue
Definition: nvenc.h:163
#define av_cold
Definition: attributes.h:88
#define av_malloc(s)
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:190
int ff_alloc_timecode_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info...
Definition: utils.c:2257
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:51
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:795
int init_qp_p
Definition: nvenc.h:208
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:251
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1947
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:444
int64_t pts
Presentation timestamp in time_base units (time when frame should be shown to user).
Definition: frame.h:401
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:627
float quality
Definition: nvenc.h:205
NV_ENC_INITIALIZE_PARAMS init_encode_params
Definition: nvenc.h:151
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1398
#define height
ID3D11Device * device
Device used for texture creation and access.
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
uint8_t * data
Definition: packet.h:355
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1496
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
#define AVERROR_EOF
End of file.
Definition: error.h:55
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:210
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:342
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:412
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1729
#define IS_SDK10_PRESET(p)
Definition: nvenc.c:48
int buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: avcodec.h:481
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:96
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1948
AVFifoBuffer * output_surface_ready_queue
Definition: nvenc.h:165
#define av_log(a,...)
CUcontext cu_context_internal
Definition: nvenc.h:154
An API-specific header for AV_HWDEVICE_TYPE_CUDA.
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:388
int ptr_index
Definition: nvenc.h:170
#define P3
int async_depth
Definition: nvenc.h:194
int av_new_packet(AVPacket *pkt, int size)
Allocate the payload of a packet and initialize its fields with default values.
Definition: avpacket.c:88
enum AVCodecID id
Definition: codec.h:204
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:263
void * ptr
Definition: nvenc.h:169
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:194
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:816
int coder
Definition: nvenc.h:213
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:1878
int rc
Definition: nvenc.h:189
int nb_registered_frames
Definition: nvenc.h:175
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:203
int qmax
maximum quantizer
Definition: avcodec.h:1375
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:117
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:213
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1902
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:606
GLenum GLint * params
Definition: opengl_enc.c:113
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
simple assert() macros that are a bit more flexible than ISO C assert().
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:377
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:831
const AVCodecHWConfigInternal * ff_nvenc_hw_configs[]
Definition: nvenc.c:67
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1096
GLsizei count
Definition: opengl_enc.c:108
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1375
#define FFMAX(a, b)
Definition: common.h:94
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:685
#define fail()
Definition: checkasm.h:123
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:387
int level
Definition: nvenc.h:187
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:361
int bluray_compat
Definition: nvenc.h:207
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1389
int aq_strength
Definition: nvenc.h:204
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:289
int refs
number of reference frames
Definition: avcodec.h:1114
int flags
Definition: nvenc.h:193
struct NvencContext::@111 registered_frames[MAX_REGISTERED_FRAMES]
enum AVPictureType pict_type
Picture type of the frame.
Definition: frame.h:391
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1783
NV_ENC_REGISTERED_PTR regptr
Definition: nvenc.h:171
#define FFMIN(a, b)
Definition: common.h:96
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1212
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:51
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1606
#define width
Definition: af_afade.c:54
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:1906
int width
picture width / height.
Definition: avcodec.h:699
int dpb_size
Definition: nvenc.h:217
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames...
Definition: avcodec.h:2226
#define NVENC_CAP
Definition: nvenc.c:40
AVFormatContext * ctx
Definition: movenc.c:48
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:1140
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1665
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:81
int dummy
Definition: motion.c:64
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:658
int profile
Definition: nvenc.h:186
AVFifoBuffer * output_surface_queue
Definition: nvenc.h:164
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:152
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:56
HW acceleration through CUDA.
Definition: pixfmt.h:235
#define AV_CODEC_ID_H265
Definition: codec_id.h:224
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:999
int tuning_info
Definition: nvenc.h:218
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:172
#define FF_ARRAY_ELEMS(a)
the normal 2^n-1 "JPEG" YUV ranges
Definition: pixfmt.h:538
if(ret)
CudaFunctions * cuda_dl
Definition: nvenc.h:89
enum AVPixelFormat data_pix_fmt
Definition: nvenc.h:179
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:77
int format
format of the frame, -1 if unknown or unset Values correspond to enum AVPixelFormat for video frames...
Definition: frame.h:381
This structure describes the bitrate properties of an encoded bitstream.
Definition: avcodec.h:448
#define AV_LOG_INFO
Standard information.
Definition: log.h:205
NV_ENC_CONFIG encode_config
Definition: nvenc.h:152
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:240
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:111
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:77
int linesize[AV_NUM_DATA_POINTERS]
For video, size in bytes of each picture line.
Definition: frame.h:339
int strict_gop
Definition: nvenc.h:203
int temporal_aq
Definition: nvenc.h:200
main external API structure.
Definition: avcodec.h:526
uint8_t * data
The data buffer.
Definition: buffer.h:89
int qmin
minimum quantizer
Definition: avcodec.h:1368
#define BD
int init_qp_i
Definition: nvenc.h:210
int extradata_size
Definition: avcodec.h:628
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:50
This struct is allocated as AVHWDeviceContext.hwctx.
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:325
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:1154
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:1147
int width
Definition: nvenc.h:78
int multipass
Definition: nvenc.h:219
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
#define IS_CBR(rc)
Definition: nvenc.c:41
AVPictureType
Definition: avutil.h:272
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2322
int flags
Definition: nvenc.c:642
int nonref_p
Definition: nvenc.h:202
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:808
int cbr
Definition: nvenc.h:190
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1695
int averr
Definition: nvenc.c:86
int s12m_tc
Definition: nvenc.h:216
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:554
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:592
#define flags(name, subs,...)
Definition: cbs_av1.c:560
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1198
uint8_t * data[AV_NUM_DATA_POINTERS]
pointer to the picture/channel planes.
Definition: frame.h:322
int reg_idx
Definition: nvenc.h:77
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:1845
uint8_t level
Definition: svq3.c:209
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:329
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:313
static const struct @105 nvenc_errors[]
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:721
int
int b_adapt
Definition: nvenc.h:199
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:1883
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:84
common internal api header.
int weighted_pred
Definition: nvenc.h:212
int rc_lookahead
Definition: nvenc.h:195
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2033
Bi-dir predicted.
Definition: avutil.h:276
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
attribute_deprecated AVFrame * coded_frame
the picture in the bitstream
Definition: avcodec.h:1776
int size
Definition: nvenc.h:84
NvencSurface * surfaces
Definition: nvenc.h:161
int den
Denominator.
Definition: rational.h:60
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:71
NV_ENC_MAP_INPUT_RESOURCE in_map
Definition: nvenc.h:173
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:2001
#define AV_INPUT_BUFFER_PADDING_SIZE
Required number of additionally allocated bytes at the end of the input bitstream for decoding...
Definition: avcodec.h:215
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2045
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1950
void * priv_data
Definition: avcodec.h:553
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:1892
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:663
#define av_free(p)
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:85
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:43
int top_field_first
If the content is interlaced, is top field displayed first.
Definition: frame.h:460
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:196
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:459
int avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: avcodec.h:472
CUstream cu_stream
Definition: nvenc.h:155
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:561
#define P2
Definition: cavsdsp.c:38
int device
Definition: nvenc.h:192
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed...
Definition: packet.h:354
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: utils.c:2205
This struct is allocated as AVHWDeviceContext.hwctx.
int nb_surfaces
Definition: nvenc.h:160
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:132
int aud
Definition: nvenc.h:206
int cqp
Definition: nvenc.h:211
#define av_freep(p)
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:780
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:63
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:188
#define FFSWAP(type, a, b)
Definition: common.h:99
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2489
int tier
Definition: nvenc.h:188
int ldkfs
Definition: nvenc.h:220
int a53_cc
Definition: nvenc.h:215
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied...
Definition: fifo.c:71
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later.That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another.Frame references ownership and permissions
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:2278
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
AVFrame * frame
Definition: nvenc.h:158
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:57
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
static double val(void *priv, double ch)
Definition: aeval.c:76
This structure stores compressed data.
Definition: packet.h:332
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:82
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:348
for(j=16;j >0;--j)
int i
Definition: input.c:406
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
Predicted.
Definition: avutil.h:275
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:650
int zerolatency
Definition: nvenc.h:201
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:376
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1404
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:107
void * av_mallocz_array(size_t nmemb, size_t size)
Definition: mem.c:190
const char * name
Definition: opengl_enc.c:102