FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 
27 #include "libavutil/hwcontext.h"
28 #include "libavutil/cuda_check.h"
29 #include "libavutil/imgutils.h"
30 #include "libavutil/avassert.h"
31 #include "libavutil/mem.h"
32 #include "libavutil/pixdesc.h"
33 #include "internal.h"
34 
35 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
36 
37 #define NVENC_CAP 0x30
38 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
39  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
40  rc == NV_ENC_PARAMS_RC_CBR_HQ)
41 
47  AV_PIX_FMT_P016, // Truncated to 10bits
48  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
52 #if CONFIG_D3D11VA
54 #endif
56 };
57 
58 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
59  pix_fmt == AV_PIX_FMT_P016 || \
60  pix_fmt == AV_PIX_FMT_YUV444P16)
61 
62 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
63  pix_fmt == AV_PIX_FMT_YUV444P16)
64 
65 static const struct {
66  NVENCSTATUS nverr;
67  int averr;
68  const char *desc;
69 } nvenc_errors[] = {
70  { NV_ENC_SUCCESS, 0, "success" },
71  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
72  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
73  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
74  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
75  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
76  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
77  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
78  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
79  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
80  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
81  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
82  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
83  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
84  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
85  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
86  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
87  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
88  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
89  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
90  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
91  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
92  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
93  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
94  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
95  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
96 };
97 
98 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
99 {
100  int i;
101  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
102  if (nvenc_errors[i].nverr == err) {
103  if (desc)
104  *desc = nvenc_errors[i].desc;
105  return nvenc_errors[i].averr;
106  }
107  }
108  if (desc)
109  *desc = "unknown error";
110  return AVERROR_UNKNOWN;
111 }
112 
113 static int nvenc_print_error(void *log_ctx, NVENCSTATUS err,
114  const char *error_string)
115 {
116  const char *desc;
117  int ret;
118  ret = nvenc_map_error(err, &desc);
119  av_log(log_ctx, AV_LOG_ERROR, "%s: %s (%d)\n", error_string, desc, err);
120  return ret;
121 }
122 
124 {
125 #if NVENCAPI_CHECK_VERSION(9, 0)
126 # if defined(_WIN32) || defined(__CYGWIN__)
127  const char *minver = "418.81";
128 # else
129  const char *minver = "418.30";
130 # endif
131 #elif NVENCAPI_CHECK_VERSION(8, 2)
132 # if defined(_WIN32) || defined(__CYGWIN__)
133  const char *minver = "397.93";
134 # else
135  const char *minver = "396.24";
136 #endif
137 #elif NVENCAPI_CHECK_VERSION(8, 1)
138 # if defined(_WIN32) || defined(__CYGWIN__)
139  const char *minver = "390.77";
140 # else
141  const char *minver = "390.25";
142 # endif
143 #else
144 # if defined(_WIN32) || defined(__CYGWIN__)
145  const char *minver = "378.66";
146 # else
147  const char *minver = "378.13";
148 # endif
149 #endif
150  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
151 }
152 
154 {
155  NvencContext *ctx = avctx->priv_data;
157  NVENCSTATUS err;
158  uint32_t nvenc_max_ver;
159  int ret;
160 
161  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
162  if (ret < 0)
163  return ret;
164 
165  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
166  if (ret < 0) {
168  return ret;
169  }
170 
171  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
172  if (err != NV_ENC_SUCCESS)
173  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
174 
175  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
176 
177  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
178  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
179  "Required: %d.%d Found: %d.%d\n",
180  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
181  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
183  return AVERROR(ENOSYS);
184  }
185 
186  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
187 
188  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
189  if (err != NV_ENC_SUCCESS)
190  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
191 
192  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
193 
194  return 0;
195 }
196 
198 {
199  NvencContext *ctx = avctx->priv_data;
201 
202  if (ctx->d3d11_device)
203  return 0;
204 
205  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
206 }
207 
209 {
210  NvencContext *ctx = avctx->priv_data;
212  CUcontext dummy;
213 
214  if (ctx->d3d11_device)
215  return 0;
216 
217  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
218 }
219 
221 {
222  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
223  NvencContext *ctx = avctx->priv_data;
224  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
225  NVENCSTATUS ret;
226 
227  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
228  params.apiVersion = NVENCAPI_VERSION;
229  if (ctx->d3d11_device) {
230  params.device = ctx->d3d11_device;
231  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
232  } else {
233  params.device = ctx->cu_context;
234  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
235  }
236 
237  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
238  if (ret != NV_ENC_SUCCESS) {
239  ctx->nvencoder = NULL;
240  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
241  }
242 
243  return 0;
244 }
245 
247 {
248  NvencContext *ctx = avctx->priv_data;
249  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
250  int i, ret, count = 0;
251  GUID *guids = NULL;
252 
253  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
254 
255  if (ret != NV_ENC_SUCCESS || !count)
256  return AVERROR(ENOSYS);
257 
258  guids = av_malloc(count * sizeof(GUID));
259  if (!guids)
260  return AVERROR(ENOMEM);
261 
262  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
263  if (ret != NV_ENC_SUCCESS) {
264  ret = AVERROR(ENOSYS);
265  goto fail;
266  }
267 
268  ret = AVERROR(ENOSYS);
269  for (i = 0; i < count; i++) {
270  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
271  ret = 0;
272  break;
273  }
274  }
275 
276 fail:
277  av_free(guids);
278 
279  return ret;
280 }
281 
282 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
283 {
284  NvencContext *ctx = avctx->priv_data;
285  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
286  NV_ENC_CAPS_PARAM params = { 0 };
287  int ret, val = 0;
288 
289  params.version = NV_ENC_CAPS_PARAM_VER;
290  params.capsToQuery = cap;
291 
292  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
293 
294  if (ret == NV_ENC_SUCCESS)
295  return val;
296  return 0;
297 }
298 
300 {
301  NvencContext *ctx = avctx->priv_data;
302  int ret;
303 
304  ret = nvenc_check_codec_support(avctx);
305  if (ret < 0) {
306  av_log(avctx, AV_LOG_VERBOSE, "Codec not supported\n");
307  return ret;
308  }
309 
310  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
311  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
312  av_log(avctx, AV_LOG_VERBOSE, "YUV444P not supported\n");
313  return AVERROR(ENOSYS);
314  }
315 
316  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
317  if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
318  av_log(avctx, AV_LOG_VERBOSE, "Lossless encoding not supported\n");
319  return AVERROR(ENOSYS);
320  }
321 
322  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
323  if (ret < avctx->width) {
324  av_log(avctx, AV_LOG_VERBOSE, "Width %d exceeds %d\n",
325  avctx->width, ret);
326  return AVERROR(ENOSYS);
327  }
328 
329  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
330  if (ret < avctx->height) {
331  av_log(avctx, AV_LOG_VERBOSE, "Height %d exceeds %d\n",
332  avctx->height, ret);
333  return AVERROR(ENOSYS);
334  }
335 
336  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
337  if (ret < avctx->max_b_frames) {
338  av_log(avctx, AV_LOG_VERBOSE, "Max B-frames %d exceed %d\n",
339  avctx->max_b_frames, ret);
340 
341  return AVERROR(ENOSYS);
342  }
343 
344  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
345  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
346  av_log(avctx, AV_LOG_VERBOSE,
347  "Interlaced encoding is not supported. Supported level: %d\n",
348  ret);
349  return AVERROR(ENOSYS);
350  }
351 
352  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
353  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
354  av_log(avctx, AV_LOG_VERBOSE, "10 bit encode not supported\n");
355  return AVERROR(ENOSYS);
356  }
357 
358  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
359  if (ctx->rc_lookahead > 0 && ret <= 0) {
360  av_log(avctx, AV_LOG_VERBOSE, "RC lookahead not supported\n");
361  return AVERROR(ENOSYS);
362  }
363 
364  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
365  if (ctx->temporal_aq > 0 && ret <= 0) {
366  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ not supported\n");
367  return AVERROR(ENOSYS);
368  }
369 
370  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
371  if (ctx->weighted_pred > 0 && ret <= 0) {
372  av_log (avctx, AV_LOG_VERBOSE, "Weighted Prediction not supported\n");
373  return AVERROR(ENOSYS);
374  }
375 
376  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
377  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
378  av_log(avctx, AV_LOG_VERBOSE, "CABAC entropy coding not supported\n");
379  return AVERROR(ENOSYS);
380  }
381 
382 #ifdef NVENC_HAVE_BFRAME_REF_MODE
383  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
384  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1) {
385  av_log(avctx, AV_LOG_VERBOSE, "Each B frame as reference is not supported\n");
386  return AVERROR(ENOSYS);
387  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
388  av_log(avctx, AV_LOG_VERBOSE, "B frames as references are not supported\n");
389  return AVERROR(ENOSYS);
390  }
391 #else
392  if (ctx->b_ref_mode != 0) {
393  av_log(avctx, AV_LOG_VERBOSE, "B frames as references need SDK 8.1 at build time\n");
394  return AVERROR(ENOSYS);
395  }
396 #endif
397 
398  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
399 
400  return 0;
401 }
402 
403 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
404 {
405  NvencContext *ctx = avctx->priv_data;
407  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
408  char name[128] = { 0};
409  int major, minor, ret;
410  CUdevice cu_device;
411  int loglevel = AV_LOG_VERBOSE;
412 
413  if (ctx->device == LIST_DEVICES)
414  loglevel = AV_LOG_INFO;
415 
416  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
417  if (ret < 0)
418  return ret;
419 
420  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
421  if (ret < 0)
422  return ret;
423 
424  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
425  if (ret < 0)
426  return ret;
427 
428  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
429  if (((major << 4) | minor) < NVENC_CAP) {
430  av_log(avctx, loglevel, "does not support NVENC\n");
431  goto fail;
432  }
433 
434  if (ctx->device != idx && ctx->device != ANY_DEVICE)
435  return -1;
436 
437  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
438  if (ret < 0)
439  goto fail;
440 
441  ctx->cu_context = ctx->cu_context_internal;
442 
443  if ((ret = nvenc_pop_context(avctx)) < 0)
444  goto fail2;
445 
446  if ((ret = nvenc_open_session(avctx)) < 0)
447  goto fail2;
448 
449  if ((ret = nvenc_check_capabilities(avctx)) < 0)
450  goto fail3;
451 
452  av_log(avctx, loglevel, "supports NVENC\n");
453 
454  dl_fn->nvenc_device_count++;
455 
456  if (ctx->device == idx || ctx->device == ANY_DEVICE)
457  return 0;
458 
459 fail3:
460  if ((ret = nvenc_push_context(avctx)) < 0)
461  return ret;
462 
463  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
464  ctx->nvencoder = NULL;
465 
466  if ((ret = nvenc_pop_context(avctx)) < 0)
467  return ret;
468 
469 fail2:
470  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
471  ctx->cu_context_internal = NULL;
472 
473 fail:
474  return AVERROR(ENOSYS);
475 }
476 
478 {
479  NvencContext *ctx = avctx->priv_data;
481 
482  switch (avctx->codec->id) {
483  case AV_CODEC_ID_H264:
484  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
485  break;
486  case AV_CODEC_ID_HEVC:
487  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
488  break;
489  default:
490  return AVERROR_BUG;
491  }
492 
493  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
494  AVHWFramesContext *frames_ctx;
495  AVHWDeviceContext *hwdev_ctx;
496  AVCUDADeviceContext *cuda_device_hwctx = NULL;
497 #if CONFIG_D3D11VA
498  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
499 #endif
500  int ret;
501 
502  if (avctx->hw_frames_ctx) {
503  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
504  if (frames_ctx->format == AV_PIX_FMT_CUDA)
505  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
506 #if CONFIG_D3D11VA
507  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
508  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
509 #endif
510  else
511  return AVERROR(EINVAL);
512  } else if (avctx->hw_device_ctx) {
513  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
514  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
515  cuda_device_hwctx = hwdev_ctx->hwctx;
516 #if CONFIG_D3D11VA
517  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
518  d3d11_device_hwctx = hwdev_ctx->hwctx;
519 #endif
520  else
521  return AVERROR(EINVAL);
522  } else {
523  return AVERROR(EINVAL);
524  }
525 
526  if (cuda_device_hwctx) {
527  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
528  }
529 #if CONFIG_D3D11VA
530  else if (d3d11_device_hwctx) {
531  ctx->d3d11_device = d3d11_device_hwctx->device;
532  ID3D11Device_AddRef(ctx->d3d11_device);
533  }
534 #endif
535 
536  ret = nvenc_open_session(avctx);
537  if (ret < 0)
538  return ret;
539 
540  ret = nvenc_check_capabilities(avctx);
541  if (ret < 0) {
542  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
543  return ret;
544  }
545  } else {
546  int i, nb_devices = 0;
547 
548  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
549  return AVERROR_UNKNOWN;
550 
551  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
552  return AVERROR_UNKNOWN;
553 
554  if (!nb_devices) {
555  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
556  return AVERROR_EXTERNAL;
557  }
558 
559  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
560 
561  dl_fn->nvenc_device_count = 0;
562  for (i = 0; i < nb_devices; ++i) {
563  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
564  return 0;
565  }
566 
567  if (ctx->device == LIST_DEVICES)
568  return AVERROR_EXIT;
569 
570  if (!dl_fn->nvenc_device_count) {
571  av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
572  return AVERROR_EXTERNAL;
573  }
574 
575  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
576  return AVERROR(EINVAL);
577  }
578 
579  return 0;
580 }
581 
582 typedef struct GUIDTuple {
583  const GUID guid;
584  int flags;
585 } GUIDTuple;
586 
587 #define PRESET_ALIAS(alias, name, ...) \
588  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
589 
590 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
591 
593 {
594  GUIDTuple presets[] = {
595  PRESET(DEFAULT),
596  PRESET(HP),
597  PRESET(HQ),
598  PRESET(BD),
599  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
600  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
601  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
602  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
603  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
604  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
605  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
606  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
607  };
608 
609  GUIDTuple *t = &presets[ctx->preset];
610 
611  ctx->init_encode_params.presetGUID = t->guid;
612  ctx->flags = t->flags;
613 }
614 
615 #undef PRESET
616 #undef PRESET_ALIAS
617 
618 static av_cold void set_constqp(AVCodecContext *avctx)
619 {
620  NvencContext *ctx = avctx->priv_data;
621  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
622 
623  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
624 
625  if (ctx->init_qp_p >= 0) {
626  rc->constQP.qpInterP = ctx->init_qp_p;
627  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
628  rc->constQP.qpIntra = ctx->init_qp_i;
629  rc->constQP.qpInterB = ctx->init_qp_b;
630  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
631  rc->constQP.qpIntra = av_clip(
632  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
633  rc->constQP.qpInterB = av_clip(
634  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
635  } else {
636  rc->constQP.qpIntra = rc->constQP.qpInterP;
637  rc->constQP.qpInterB = rc->constQP.qpInterP;
638  }
639  } else if (ctx->cqp >= 0) {
640  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
641  if (avctx->b_quant_factor != 0.0)
642  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
643  if (avctx->i_quant_factor != 0.0)
644  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
645  }
646 
647  avctx->qmin = -1;
648  avctx->qmax = -1;
649 }
650 
651 static av_cold void set_vbr(AVCodecContext *avctx)
652 {
653  NvencContext *ctx = avctx->priv_data;
654  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
655  int qp_inter_p;
656 
657  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
658  rc->enableMinQP = 1;
659  rc->enableMaxQP = 1;
660 
661  rc->minQP.qpInterB = avctx->qmin;
662  rc->minQP.qpInterP = avctx->qmin;
663  rc->minQP.qpIntra = avctx->qmin;
664 
665  rc->maxQP.qpInterB = avctx->qmax;
666  rc->maxQP.qpInterP = avctx->qmax;
667  rc->maxQP.qpIntra = avctx->qmax;
668 
669  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
670  } else if (avctx->qmin >= 0) {
671  rc->enableMinQP = 1;
672 
673  rc->minQP.qpInterB = avctx->qmin;
674  rc->minQP.qpInterP = avctx->qmin;
675  rc->minQP.qpIntra = avctx->qmin;
676 
677  qp_inter_p = avctx->qmin;
678  } else {
679  qp_inter_p = 26; // default to 26
680  }
681 
682  rc->enableInitialRCQP = 1;
683 
684  if (ctx->init_qp_p < 0) {
685  rc->initialRCQP.qpInterP = qp_inter_p;
686  } else {
687  rc->initialRCQP.qpInterP = ctx->init_qp_p;
688  }
689 
690  if (ctx->init_qp_i < 0) {
691  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
692  rc->initialRCQP.qpIntra = av_clip(
693  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
694  } else {
695  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
696  }
697  } else {
698  rc->initialRCQP.qpIntra = ctx->init_qp_i;
699  }
700 
701  if (ctx->init_qp_b < 0) {
702  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
703  rc->initialRCQP.qpInterB = av_clip(
704  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
705  } else {
706  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
707  }
708  } else {
709  rc->initialRCQP.qpInterB = ctx->init_qp_b;
710  }
711 }
712 
714 {
715  NvencContext *ctx = avctx->priv_data;
716  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
717 
718  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
719  rc->constQP.qpInterB = 0;
720  rc->constQP.qpInterP = 0;
721  rc->constQP.qpIntra = 0;
722 
723  avctx->qmin = -1;
724  avctx->qmax = -1;
725 }
726 
728 {
729  NvencContext *ctx = avctx->priv_data;
730  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
731 
732  switch (ctx->rc) {
733  case NV_ENC_PARAMS_RC_CONSTQP:
734  set_constqp(avctx);
735  return;
736  case NV_ENC_PARAMS_RC_VBR_MINQP:
737  if (avctx->qmin < 0) {
738  av_log(avctx, AV_LOG_WARNING,
739  "The variable bitrate rate-control requires "
740  "the 'qmin' option set.\n");
741  set_vbr(avctx);
742  return;
743  }
744  /* fall through */
745  case NV_ENC_PARAMS_RC_VBR_HQ:
746  case NV_ENC_PARAMS_RC_VBR:
747  set_vbr(avctx);
748  break;
749  case NV_ENC_PARAMS_RC_CBR:
750  case NV_ENC_PARAMS_RC_CBR_HQ:
751  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
752  break;
753  }
754 
755  rc->rateControlMode = ctx->rc;
756 }
757 
759 {
760  NvencContext *ctx = avctx->priv_data;
761  // default minimum of 4 surfaces
762  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
763  // another multiply by 2 to avoid blocking next PBB group
764  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
765 
766  // lookahead enabled
767  if (ctx->rc_lookahead > 0) {
768  // +1 is to account for lkd_bound calculation later
769  // +4 is to allow sufficient pipelining with lookahead
770  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
771  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
772  {
773  av_log(avctx, AV_LOG_WARNING,
774  "Defined rc_lookahead requires more surfaces, "
775  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
776  }
777  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
778  } else {
779  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
780  {
781  av_log(avctx, AV_LOG_WARNING,
782  "Defined b-frame requires more surfaces, "
783  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
784  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
785  }
786  else if (ctx->nb_surfaces <= 0)
787  ctx->nb_surfaces = nb_surfaces;
788  // otherwise use user specified value
789  }
790 
792  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
793 
794  return 0;
795 }
796 
798 {
799  NvencContext *ctx = avctx->priv_data;
800 
801  if (avctx->global_quality > 0)
802  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
803 
804  if (ctx->cqp < 0 && avctx->global_quality > 0)
805  ctx->cqp = avctx->global_quality;
806 
807  if (avctx->bit_rate > 0) {
808  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
809  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
810  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
811  }
812 
813  if (avctx->rc_max_rate > 0)
814  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
815 
816  if (ctx->rc < 0) {
817  if (ctx->flags & NVENC_ONE_PASS)
818  ctx->twopass = 0;
819  if (ctx->flags & NVENC_TWO_PASSES)
820  ctx->twopass = 1;
821 
822  if (ctx->twopass < 0)
823  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
824 
825  if (ctx->cbr) {
826  if (ctx->twopass) {
827  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
828  } else {
829  ctx->rc = NV_ENC_PARAMS_RC_CBR;
830  }
831  } else if (ctx->cqp >= 0) {
832  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
833  } else if (ctx->twopass) {
834  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
835  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
836  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
837  }
838  }
839 
840  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
841  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
842  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_quality -> cbr_ld_hq\n");
843  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_size -> cbr_hq\n");
844  av_log(avctx, AV_LOG_WARNING, "\tvbr_2pass -> vbr_hq\n");
845  av_log(avctx, AV_LOG_WARNING, "\tvbr_minqp -> (no replacement)\n");
846 
847  ctx->rc &= ~RC_MODE_DEPRECATED;
848  }
849 
850  if (ctx->flags & NVENC_LOSSLESS) {
851  set_lossless(avctx);
852  } else if (ctx->rc >= 0) {
854  } else {
855  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
856  set_vbr(avctx);
857  }
858 
859  if (avctx->rc_buffer_size > 0) {
860  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
861  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
862  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
863  }
864 
865  if (ctx->aq) {
866  ctx->encode_config.rcParams.enableAQ = 1;
867  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
868  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
869  }
870 
871  if (ctx->temporal_aq) {
872  ctx->encode_config.rcParams.enableTemporalAQ = 1;
873  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
874  }
875 
876  if (ctx->rc_lookahead > 0) {
877  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
878  ctx->encode_config.frameIntervalP - 4;
879 
880  if (lkd_bound < 0) {
881  av_log(avctx, AV_LOG_WARNING,
882  "Lookahead not enabled. Increase buffer delay (-delay).\n");
883  } else {
884  ctx->encode_config.rcParams.enableLookahead = 1;
885  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
886  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
887  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
888  av_log(avctx, AV_LOG_VERBOSE,
889  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
890  ctx->encode_config.rcParams.lookaheadDepth,
891  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
892  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
893  }
894  }
895 
896  if (ctx->strict_gop) {
897  ctx->encode_config.rcParams.strictGOPTarget = 1;
898  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
899  }
900 
901  if (ctx->nonref_p)
902  ctx->encode_config.rcParams.enableNonRefP = 1;
903 
904  if (ctx->zerolatency)
905  ctx->encode_config.rcParams.zeroReorderDelay = 1;
906 
907  if (ctx->quality)
908  {
909  //convert from float to fixed point 8.8
910  int tmp_quality = (int)(ctx->quality * 256.0f);
911  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
912  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
913  }
914 }
915 
917 {
918  NvencContext *ctx = avctx->priv_data;
919  NV_ENC_CONFIG *cc = &ctx->encode_config;
920  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
921  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
922 
923  vui->colourMatrix = avctx->colorspace;
924  vui->colourPrimaries = avctx->color_primaries;
925  vui->transferCharacteristics = avctx->color_trc;
926  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
928 
929  vui->colourDescriptionPresentFlag =
930  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
931 
932  vui->videoSignalTypePresentFlag =
933  (vui->colourDescriptionPresentFlag
934  || vui->videoFormat != 5
935  || vui->videoFullRangeFlag != 0);
936 
937  h264->sliceMode = 3;
938  h264->sliceModeData = 1;
939 
940  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
941  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
942  h264->outputAUD = ctx->aud;
943 
944  if (avctx->refs >= 0) {
945  /* 0 means "let the hardware decide" */
946  h264->maxNumRefFrames = avctx->refs;
947  }
948  if (avctx->gop_size >= 0) {
949  h264->idrPeriod = cc->gopLength;
950  }
951 
952  if (IS_CBR(cc->rcParams.rateControlMode)) {
953  h264->outputBufferingPeriodSEI = 1;
954  }
955 
956  h264->outputPictureTimingSEI = 1;
957 
958  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
959  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
960  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
961  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
962  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
963  }
964 
965  if (ctx->flags & NVENC_LOSSLESS) {
966  h264->qpPrimeYZeroTransformBypassFlag = 1;
967  } else {
968  switch(ctx->profile) {
970  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
972  break;
974  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
975  avctx->profile = FF_PROFILE_H264_MAIN;
976  break;
978  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
979  avctx->profile = FF_PROFILE_H264_HIGH;
980  break;
982  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
984  break;
985  }
986  }
987 
988  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
989  if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
990  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
992  }
993 
994  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
995 
996  h264->level = ctx->level;
997 
998  if (ctx->coder >= 0)
999  h264->entropyCodingMode = ctx->coder;
1000 
1001 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1002  h264->useBFramesAsRef = ctx->b_ref_mode;
1003 #endif
1004 
1005  return 0;
1006 }
1007 
1009 {
1010  NvencContext *ctx = avctx->priv_data;
1011  NV_ENC_CONFIG *cc = &ctx->encode_config;
1012  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1013  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1014 
1015  vui->colourMatrix = avctx->colorspace;
1016  vui->colourPrimaries = avctx->color_primaries;
1017  vui->transferCharacteristics = avctx->color_trc;
1018  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1020 
1021  vui->colourDescriptionPresentFlag =
1022  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1023 
1024  vui->videoSignalTypePresentFlag =
1025  (vui->colourDescriptionPresentFlag
1026  || vui->videoFormat != 5
1027  || vui->videoFullRangeFlag != 0);
1028 
1029  hevc->sliceMode = 3;
1030  hevc->sliceModeData = 1;
1031 
1032  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1033  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1034  hevc->outputAUD = ctx->aud;
1035 
1036  if (avctx->refs >= 0) {
1037  /* 0 means "let the hardware decide" */
1038  hevc->maxNumRefFramesInDPB = avctx->refs;
1039  }
1040  if (avctx->gop_size >= 0) {
1041  hevc->idrPeriod = cc->gopLength;
1042  }
1043 
1044  if (IS_CBR(cc->rcParams.rateControlMode)) {
1045  hevc->outputBufferingPeriodSEI = 1;
1046  }
1047 
1048  hevc->outputPictureTimingSEI = 1;
1049 
1050  switch (ctx->profile) {
1052  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1053  avctx->profile = FF_PROFILE_HEVC_MAIN;
1054  break;
1056  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1058  break;
1060  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1061  avctx->profile = FF_PROFILE_HEVC_REXT;
1062  break;
1063  }
1064 
1065  // force setting profile as main10 if input is 10 bit
1066  if (IS_10BIT(ctx->data_pix_fmt)) {
1067  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1069  }
1070 
1071  // force setting profile as rext if input is yuv444
1072  if (IS_YUV444(ctx->data_pix_fmt)) {
1073  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1074  avctx->profile = FF_PROFILE_HEVC_REXT;
1075  }
1076 
1077  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1078 
1079  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1080 
1081  hevc->level = ctx->level;
1082 
1083  hevc->tier = ctx->tier;
1084 
1085 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1086  hevc->useBFramesAsRef = ctx->b_ref_mode;
1087 #endif
1088 
1089  return 0;
1090 }
1091 
1093 {
1094  switch (avctx->codec->id) {
1095  case AV_CODEC_ID_H264:
1096  return nvenc_setup_h264_config(avctx);
1097  case AV_CODEC_ID_HEVC:
1098  return nvenc_setup_hevc_config(avctx);
1099  /* Earlier switch/case will return if unknown codec is passed. */
1100  }
1101 
1102  return 0;
1103 }
1104 
1105 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1106  int sw, sh;
1107 
1108  sw = avctx->width;
1109  sh = avctx->height;
1110 
1111  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1112  sw *= avctx->sample_aspect_ratio.num;
1113  sh *= avctx->sample_aspect_ratio.den;
1114  }
1115 
1116  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1117 }
1118 
1120 {
1121  NvencContext *ctx = avctx->priv_data;
1123  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1124 
1125  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1126  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1127  AVCPBProperties *cpb_props;
1128  int res = 0;
1129  int dw, dh;
1130 
1131  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1132  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1133 
1134  ctx->init_encode_params.encodeHeight = avctx->height;
1135  ctx->init_encode_params.encodeWidth = avctx->width;
1136 
1137  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1138 
1139  nvenc_map_preset(ctx);
1140 
1141  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1142  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1143 
1144  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1145  ctx->init_encode_params.encodeGUID,
1146  ctx->init_encode_params.presetGUID,
1147  &preset_config);
1148  if (nv_status != NV_ENC_SUCCESS)
1149  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1150 
1151  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1152 
1153  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1154 
1155  compute_dar(avctx, &dw, &dh);
1156  ctx->init_encode_params.darHeight = dh;
1157  ctx->init_encode_params.darWidth = dw;
1158 
1159  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1160  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1161 
1162  ctx->init_encode_params.enableEncodeAsync = 0;
1163  ctx->init_encode_params.enablePTD = 1;
1164 
1165  if (ctx->weighted_pred == 1)
1166  ctx->init_encode_params.enableWeightedPrediction = 1;
1167 
1168  if (ctx->bluray_compat) {
1169  ctx->aud = 1;
1170  avctx->refs = FFMIN(FFMAX(avctx->refs, 0), 6);
1171  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1172  switch (avctx->codec->id) {
1173  case AV_CODEC_ID_H264:
1174  /* maximum level depends on used resolution */
1175  break;
1176  case AV_CODEC_ID_HEVC:
1177  ctx->level = NV_ENC_LEVEL_HEVC_51;
1178  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1179  break;
1180  }
1181  }
1182 
1183  if (avctx->gop_size > 0) {
1184  if (avctx->max_b_frames >= 0) {
1185  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1186  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1187  }
1188 
1189  ctx->encode_config.gopLength = avctx->gop_size;
1190  } else if (avctx->gop_size == 0) {
1191  ctx->encode_config.frameIntervalP = 0;
1192  ctx->encode_config.gopLength = 1;
1193  }
1194 
1195  ctx->initial_pts[0] = AV_NOPTS_VALUE;
1196  ctx->initial_pts[1] = AV_NOPTS_VALUE;
1197 
1198  nvenc_recalc_surfaces(avctx);
1199 
1200  nvenc_setup_rate_control(avctx);
1201 
1202  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1203  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1204  } else {
1205  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1206  }
1207 
1208  res = nvenc_setup_codec_config(avctx);
1209  if (res)
1210  return res;
1211 
1212  res = nvenc_push_context(avctx);
1213  if (res < 0)
1214  return res;
1215 
1216  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1217 
1218  res = nvenc_pop_context(avctx);
1219  if (res < 0)
1220  return res;
1221 
1222  if (nv_status != NV_ENC_SUCCESS) {
1223  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1224  }
1225 
1226  if (ctx->encode_config.frameIntervalP > 1)
1227  avctx->has_b_frames = 2;
1228 
1229  if (ctx->encode_config.rcParams.averageBitRate > 0)
1230  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1231 
1232  cpb_props = ff_add_cpb_side_data(avctx);
1233  if (!cpb_props)
1234  return AVERROR(ENOMEM);
1235  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1236  cpb_props->avg_bitrate = avctx->bit_rate;
1237  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1238 
1239  return 0;
1240 }
1241 
1242 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1243 {
1244  switch (pix_fmt) {
1245  case AV_PIX_FMT_YUV420P:
1246  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1247  case AV_PIX_FMT_NV12:
1248  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1249  case AV_PIX_FMT_P010:
1250  case AV_PIX_FMT_P016:
1251  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1252  case AV_PIX_FMT_YUV444P:
1253  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1254  case AV_PIX_FMT_YUV444P16:
1255  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1256  case AV_PIX_FMT_0RGB32:
1257  return NV_ENC_BUFFER_FORMAT_ARGB;
1258  case AV_PIX_FMT_0BGR32:
1259  return NV_ENC_BUFFER_FORMAT_ABGR;
1260  default:
1261  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1262  }
1263 }
1264 
1265 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1266 {
1267  NvencContext *ctx = avctx->priv_data;
1269  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1270  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1271 
1272  NVENCSTATUS nv_status;
1273  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1274  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1275 
1276  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1277  ctx->surfaces[idx].in_ref = av_frame_alloc();
1278  if (!ctx->surfaces[idx].in_ref)
1279  return AVERROR(ENOMEM);
1280  } else {
1281  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1282 
1284  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1285  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1287  return AVERROR(EINVAL);
1288  }
1289 
1290  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1291  allocSurf.width = avctx->width;
1292  allocSurf.height = avctx->height;
1293  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1294 
1295  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1296  if (nv_status != NV_ENC_SUCCESS) {
1297  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1298  }
1299 
1300  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1301  ctx->surfaces[idx].width = allocSurf.width;
1302  ctx->surfaces[idx].height = allocSurf.height;
1303  }
1304 
1305  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1306  if (nv_status != NV_ENC_SUCCESS) {
1307  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1308  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1309  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1310  av_frame_free(&ctx->surfaces[idx].in_ref);
1311  return err;
1312  }
1313 
1314  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1315  ctx->surfaces[idx].size = allocOut.size;
1316 
1317  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1318 
1319  return 0;
1320 }
1321 
1323 {
1324  NvencContext *ctx = avctx->priv_data;
1325  int i, res = 0, res2;
1326 
1327  ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1328  if (!ctx->surfaces)
1329  return AVERROR(ENOMEM);
1330 
1331  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1332  if (!ctx->timestamp_list)
1333  return AVERROR(ENOMEM);
1334 
1336  if (!ctx->unused_surface_queue)
1337  return AVERROR(ENOMEM);
1338 
1340  if (!ctx->output_surface_queue)
1341  return AVERROR(ENOMEM);
1343  if (!ctx->output_surface_ready_queue)
1344  return AVERROR(ENOMEM);
1345 
1346  res = nvenc_push_context(avctx);
1347  if (res < 0)
1348  return res;
1349 
1350  for (i = 0; i < ctx->nb_surfaces; i++) {
1351  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1352  goto fail;
1353  }
1354 
1355 fail:
1356  res2 = nvenc_pop_context(avctx);
1357  if (res2 < 0)
1358  return res2;
1359 
1360  return res;
1361 }
1362 
1364 {
1365  NvencContext *ctx = avctx->priv_data;
1367  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1368 
1369  NVENCSTATUS nv_status;
1370  uint32_t outSize = 0;
1371  char tmpHeader[256];
1372  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1373  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1374 
1375  payload.spsppsBuffer = tmpHeader;
1376  payload.inBufferSize = sizeof(tmpHeader);
1377  payload.outSPSPPSPayloadSize = &outSize;
1378 
1379  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1380  if (nv_status != NV_ENC_SUCCESS) {
1381  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1382  }
1383 
1384  avctx->extradata_size = outSize;
1386 
1387  if (!avctx->extradata) {
1388  return AVERROR(ENOMEM);
1389  }
1390 
1391  memcpy(avctx->extradata, tmpHeader, outSize);
1392 
1393  return 0;
1394 }
1395 
1397 {
1398  NvencContext *ctx = avctx->priv_data;
1400  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1401  int i, res;
1402 
1403  /* the encoder has to be flushed before it can be closed */
1404  if (ctx->nvencoder) {
1405  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1406  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1407 
1408  res = nvenc_push_context(avctx);
1409  if (res < 0)
1410  return res;
1411 
1412  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1413  }
1414 
1419 
1420  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1421  for (i = 0; i < ctx->nb_registered_frames; i++) {
1422  if (ctx->registered_frames[i].mapped)
1423  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1424  if (ctx->registered_frames[i].regptr)
1425  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1426  }
1427  ctx->nb_registered_frames = 0;
1428  }
1429 
1430  if (ctx->surfaces) {
1431  for (i = 0; i < ctx->nb_surfaces; ++i) {
1432  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1433  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1434  av_frame_free(&ctx->surfaces[i].in_ref);
1435  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1436  }
1437  }
1438  av_freep(&ctx->surfaces);
1439  ctx->nb_surfaces = 0;
1440 
1441  if (ctx->nvencoder) {
1442  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1443 
1444  res = nvenc_pop_context(avctx);
1445  if (res < 0)
1446  return res;
1447  }
1448  ctx->nvencoder = NULL;
1449 
1450  if (ctx->cu_context_internal)
1451  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1452  ctx->cu_context = ctx->cu_context_internal = NULL;
1453 
1454 #if CONFIG_D3D11VA
1455  if (ctx->d3d11_device) {
1456  ID3D11Device_Release(ctx->d3d11_device);
1457  ctx->d3d11_device = NULL;
1458  }
1459 #endif
1460 
1461  nvenc_free_functions(&dl_fn->nvenc_dl);
1462  cuda_free_functions(&dl_fn->cuda_dl);
1463 
1464  dl_fn->nvenc_device_count = 0;
1465 
1466  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1467 
1468  return 0;
1469 }
1470 
1472 {
1473  NvencContext *ctx = avctx->priv_data;
1474  int ret;
1475 
1476  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1477  AVHWFramesContext *frames_ctx;
1478  if (!avctx->hw_frames_ctx) {
1479  av_log(avctx, AV_LOG_ERROR,
1480  "hw_frames_ctx must be set when using GPU frames as input\n");
1481  return AVERROR(EINVAL);
1482  }
1483  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1484  if (frames_ctx->format != avctx->pix_fmt) {
1485  av_log(avctx, AV_LOG_ERROR,
1486  "hw_frames_ctx must match the GPU frame type\n");
1487  return AVERROR(EINVAL);
1488  }
1489  ctx->data_pix_fmt = frames_ctx->sw_format;
1490  } else {
1491  ctx->data_pix_fmt = avctx->pix_fmt;
1492  }
1493 
1494  if ((ret = nvenc_load_libraries(avctx)) < 0)
1495  return ret;
1496 
1497  if ((ret = nvenc_setup_device(avctx)) < 0)
1498  return ret;
1499 
1500  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1501  return ret;
1502 
1503  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1504  return ret;
1505 
1506  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1507  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1508  return ret;
1509  }
1510 
1511  return 0;
1512 }
1513 
1515 {
1516  NvencSurface *tmp_surf;
1517 
1518  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1519  // queue empty
1520  return NULL;
1521 
1522  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1523  return tmp_surf;
1524 }
1525 
1526 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1527  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1528 {
1529  int dst_linesize[4] = {
1530  lock_buffer_params->pitch,
1531  lock_buffer_params->pitch,
1532  lock_buffer_params->pitch,
1533  lock_buffer_params->pitch
1534  };
1535  uint8_t *dst_data[4];
1536  int ret;
1537 
1538  if (frame->format == AV_PIX_FMT_YUV420P)
1539  dst_linesize[1] = dst_linesize[2] >>= 1;
1540 
1541  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1542  lock_buffer_params->bufferDataPtr, dst_linesize);
1543  if (ret < 0)
1544  return ret;
1545 
1546  if (frame->format == AV_PIX_FMT_YUV420P)
1547  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1548 
1549  av_image_copy(dst_data, dst_linesize,
1550  (const uint8_t**)frame->data, frame->linesize, frame->format,
1551  avctx->width, avctx->height);
1552 
1553  return 0;
1554 }
1555 
1557 {
1558  NvencContext *ctx = avctx->priv_data;
1560  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1561  NVENCSTATUS nv_status;
1562 
1563  int i, first_round;
1564 
1566  for (first_round = 1; first_round >= 0; first_round--) {
1567  for (i = 0; i < ctx->nb_registered_frames; i++) {
1568  if (!ctx->registered_frames[i].mapped) {
1569  if (ctx->registered_frames[i].regptr) {
1570  if (first_round)
1571  continue;
1572  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1573  if (nv_status != NV_ENC_SUCCESS)
1574  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1575  ctx->registered_frames[i].ptr = NULL;
1576  ctx->registered_frames[i].regptr = NULL;
1577  }
1578  return i;
1579  }
1580  }
1581  }
1582  } else {
1583  return ctx->nb_registered_frames++;
1584  }
1585 
1586  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1587  return AVERROR(ENOMEM);
1588 }
1589 
1591 {
1592  NvencContext *ctx = avctx->priv_data;
1594  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1595 
1596  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1597  NV_ENC_REGISTER_RESOURCE reg;
1598  int i, idx, ret;
1599 
1600  for (i = 0; i < ctx->nb_registered_frames; i++) {
1601  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1602  return i;
1603  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1604  return i;
1605  }
1606 
1607  idx = nvenc_find_free_reg_resource(avctx);
1608  if (idx < 0)
1609  return idx;
1610 
1611  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1612  reg.width = frames_ctx->width;
1613  reg.height = frames_ctx->height;
1614  reg.pitch = frame->linesize[0];
1615  reg.resourceToRegister = frame->data[0];
1616 
1617  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1618  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1619  }
1620  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1621  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1622  reg.subResourceIndex = (intptr_t)frame->data[1];
1623  }
1624 
1625  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1626  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1627  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1628  av_get_pix_fmt_name(frames_ctx->sw_format));
1629  return AVERROR(EINVAL);
1630  }
1631 
1632  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1633  if (ret != NV_ENC_SUCCESS) {
1634  nvenc_print_error(avctx, ret, "Error registering an input resource");
1635  return AVERROR_UNKNOWN;
1636  }
1637 
1638  ctx->registered_frames[idx].ptr = frame->data[0];
1639  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1640  ctx->registered_frames[idx].regptr = reg.registeredResource;
1641  return idx;
1642 }
1643 
1645  NvencSurface *nvenc_frame)
1646 {
1647  NvencContext *ctx = avctx->priv_data;
1649  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1650 
1651  int res;
1652  NVENCSTATUS nv_status;
1653 
1654  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1655  int reg_idx = nvenc_register_frame(avctx, frame);
1656  if (reg_idx < 0) {
1657  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1658  return reg_idx;
1659  }
1660 
1661  res = av_frame_ref(nvenc_frame->in_ref, frame);
1662  if (res < 0)
1663  return res;
1664 
1665  if (!ctx->registered_frames[reg_idx].mapped) {
1666  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1667  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1668  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1669  if (nv_status != NV_ENC_SUCCESS) {
1670  av_frame_unref(nvenc_frame->in_ref);
1671  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1672  }
1673  }
1674 
1675  ctx->registered_frames[reg_idx].mapped += 1;
1676 
1677  nvenc_frame->reg_idx = reg_idx;
1678  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1679  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1680  nvenc_frame->pitch = frame->linesize[0];
1681 
1682  return 0;
1683  } else {
1684  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1685 
1686  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1687  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1688 
1689  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1690  if (nv_status != NV_ENC_SUCCESS) {
1691  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1692  }
1693 
1694  nvenc_frame->pitch = lockBufferParams.pitch;
1695  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1696 
1697  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1698  if (nv_status != NV_ENC_SUCCESS) {
1699  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1700  }
1701 
1702  return res;
1703  }
1704 }
1705 
1707  NV_ENC_PIC_PARAMS *params,
1708  NV_ENC_SEI_PAYLOAD *sei_data)
1709 {
1710  NvencContext *ctx = avctx->priv_data;
1711 
1712  switch (avctx->codec->id) {
1713  case AV_CODEC_ID_H264:
1714  params->codecPicParams.h264PicParams.sliceMode =
1715  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1716  params->codecPicParams.h264PicParams.sliceModeData =
1717  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1718  if (sei_data) {
1719  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1720  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = 1;
1721  }
1722 
1723  break;
1724  case AV_CODEC_ID_HEVC:
1725  params->codecPicParams.hevcPicParams.sliceMode =
1726  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1727  params->codecPicParams.hevcPicParams.sliceModeData =
1728  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1729  if (sei_data) {
1730  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1731  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = 1;
1732  }
1733 
1734  break;
1735  }
1736 }
1737 
1738 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1739 {
1740  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
1741 }
1742 
1743 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1744 {
1745  int64_t timestamp = AV_NOPTS_VALUE;
1746  if (av_fifo_size(queue) > 0)
1747  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
1748 
1749  return timestamp;
1750 }
1751 
1753  NV_ENC_LOCK_BITSTREAM *params,
1754  AVPacket *pkt)
1755 {
1756  NvencContext *ctx = avctx->priv_data;
1757 
1758  pkt->pts = params->outputTimeStamp;
1759 
1760  /* generate the first dts by linearly extrapolating the
1761  * first two pts values to the past */
1762  if (avctx->max_b_frames > 0 && !ctx->first_packet_output &&
1763  ctx->initial_pts[1] != AV_NOPTS_VALUE) {
1764  int64_t ts0 = ctx->initial_pts[0], ts1 = ctx->initial_pts[1];
1765  int64_t delta;
1766 
1767  if ((ts0 < 0 && ts1 > INT64_MAX + ts0) ||
1768  (ts0 > 0 && ts1 < INT64_MIN + ts0))
1769  return AVERROR(ERANGE);
1770  delta = ts1 - ts0;
1771 
1772  if ((delta < 0 && ts0 > INT64_MAX + delta) ||
1773  (delta > 0 && ts0 < INT64_MIN + delta))
1774  return AVERROR(ERANGE);
1775  pkt->dts = ts0 - delta;
1776 
1777  ctx->first_packet_output = 1;
1778  return 0;
1779  }
1780 
1782 
1783  return 0;
1784 }
1785 
1787 {
1788  NvencContext *ctx = avctx->priv_data;
1790  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1791 
1792  uint32_t slice_mode_data;
1793  uint32_t *slice_offsets = NULL;
1794  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1795  NVENCSTATUS nv_status;
1796  int res = 0;
1797 
1798  enum AVPictureType pict_type;
1799 
1800  switch (avctx->codec->id) {
1801  case AV_CODEC_ID_H264:
1802  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1803  break;
1804  case AV_CODEC_ID_H265:
1805  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1806  break;
1807  default:
1808  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1809  res = AVERROR(EINVAL);
1810  goto error;
1811  }
1812  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1813 
1814  if (!slice_offsets) {
1815  res = AVERROR(ENOMEM);
1816  goto error;
1817  }
1818 
1819  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1820 
1821  lock_params.doNotWait = 0;
1822  lock_params.outputBitstream = tmpoutsurf->output_surface;
1823  lock_params.sliceOffsets = slice_offsets;
1824 
1825  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1826  if (nv_status != NV_ENC_SUCCESS) {
1827  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1828  goto error;
1829  }
1830 
1831  if (res = ff_alloc_packet2(avctx, pkt, lock_params.bitstreamSizeInBytes,0)) {
1832  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1833  goto error;
1834  }
1835 
1836  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1837 
1838  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1839  if (nv_status != NV_ENC_SUCCESS) {
1840  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1841  goto error;
1842  }
1843 
1844 
1845  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1846  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
1847  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
1848  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
1849  if (nv_status != NV_ENC_SUCCESS) {
1850  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
1851  goto error;
1852  }
1853  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
1854  res = AVERROR_BUG;
1855  goto error;
1856  }
1857 
1858  av_frame_unref(tmpoutsurf->in_ref);
1859 
1860  tmpoutsurf->input_surface = NULL;
1861  }
1862 
1863  switch (lock_params.pictureType) {
1864  case NV_ENC_PIC_TYPE_IDR:
1865  pkt->flags |= AV_PKT_FLAG_KEY;
1866  case NV_ENC_PIC_TYPE_I:
1867  pict_type = AV_PICTURE_TYPE_I;
1868  break;
1869  case NV_ENC_PIC_TYPE_P:
1870  pict_type = AV_PICTURE_TYPE_P;
1871  break;
1872  case NV_ENC_PIC_TYPE_B:
1873  pict_type = AV_PICTURE_TYPE_B;
1874  break;
1875  case NV_ENC_PIC_TYPE_BI:
1876  pict_type = AV_PICTURE_TYPE_BI;
1877  break;
1878  default:
1879  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
1880  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
1881  res = AVERROR_EXTERNAL;
1882  goto error;
1883  }
1884 
1885 #if FF_API_CODED_FRAME
1887  avctx->coded_frame->pict_type = pict_type;
1889 #endif
1890 
1892  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
1893 
1894  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
1895  if (res < 0)
1896  goto error2;
1897 
1898  av_free(slice_offsets);
1899 
1900  return 0;
1901 
1902 error:
1904 
1905 error2:
1906  av_free(slice_offsets);
1907 
1908  return res;
1909 }
1910 
1911 static int output_ready(AVCodecContext *avctx, int flush)
1912 {
1913  NvencContext *ctx = avctx->priv_data;
1914  int nb_ready, nb_pending;
1915 
1916  /* when B-frames are enabled, we wait for two initial timestamps to
1917  * calculate the first dts */
1918  if (!flush && avctx->max_b_frames > 0 &&
1919  (ctx->initial_pts[0] == AV_NOPTS_VALUE || ctx->initial_pts[1] == AV_NOPTS_VALUE))
1920  return 0;
1921 
1922  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
1923  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
1924  if (flush)
1925  return nb_ready > 0;
1926  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
1927 }
1928 
1929 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
1930 {
1931  NvencContext *ctx = avctx->priv_data;
1932  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
1933  NVENCSTATUS ret;
1934 
1935  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
1936  int needs_reconfig = 0;
1937  int needs_encode_config = 0;
1938  int reconfig_bitrate = 0, reconfig_dar = 0;
1939  int dw, dh;
1940 
1941  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
1942  params.reInitEncodeParams = ctx->init_encode_params;
1943 
1944  compute_dar(avctx, &dw, &dh);
1945  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
1946  av_log(avctx, AV_LOG_VERBOSE,
1947  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
1948  ctx->init_encode_params.darWidth,
1949  ctx->init_encode_params.darHeight, dw, dh);
1950 
1951  params.reInitEncodeParams.darHeight = dh;
1952  params.reInitEncodeParams.darWidth = dw;
1953 
1954  needs_reconfig = 1;
1955  reconfig_dar = 1;
1956  }
1957 
1958  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
1959  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
1960  av_log(avctx, AV_LOG_VERBOSE,
1961  "avg bitrate change: %d -> %d\n",
1962  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
1963  (uint32_t)avctx->bit_rate);
1964 
1965  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
1966  reconfig_bitrate = 1;
1967  }
1968 
1969  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
1970  av_log(avctx, AV_LOG_VERBOSE,
1971  "max bitrate change: %d -> %d\n",
1972  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
1973  (uint32_t)avctx->rc_max_rate);
1974 
1975  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
1976  reconfig_bitrate = 1;
1977  }
1978 
1979  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
1980  av_log(avctx, AV_LOG_VERBOSE,
1981  "vbv buffer size change: %d -> %d\n",
1982  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
1983  avctx->rc_buffer_size);
1984 
1985  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
1986  reconfig_bitrate = 1;
1987  }
1988 
1989  if (reconfig_bitrate) {
1990  params.resetEncoder = 1;
1991  params.forceIDR = 1;
1992 
1993  needs_encode_config = 1;
1994  needs_reconfig = 1;
1995  }
1996  }
1997 
1998  if (!needs_encode_config)
1999  params.reInitEncodeParams.encodeConfig = NULL;
2000 
2001  if (needs_reconfig) {
2002  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2003  if (ret != NV_ENC_SUCCESS) {
2004  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2005  } else {
2006  if (reconfig_dar) {
2007  ctx->init_encode_params.darHeight = dh;
2008  ctx->init_encode_params.darWidth = dw;
2009  }
2010 
2011  if (reconfig_bitrate) {
2012  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2013  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2014  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2015  }
2016 
2017  }
2018  }
2019 }
2020 
2022 {
2023  NVENCSTATUS nv_status;
2024  NvencSurface *tmp_out_surf, *in_surf;
2025  int res, res2;
2026  NV_ENC_SEI_PAYLOAD *sei_data = NULL;
2027  size_t sei_size;
2028 
2029  NvencContext *ctx = avctx->priv_data;
2031  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2032 
2033  NV_ENC_PIC_PARAMS pic_params = { 0 };
2034  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2035 
2036  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2037  return AVERROR(EINVAL);
2038 
2039  if (ctx->encoder_flushing) {
2040  if (avctx->internal->draining)
2041  return AVERROR_EOF;
2042 
2043  ctx->encoder_flushing = 0;
2044  ctx->first_packet_output = 0;
2045  ctx->initial_pts[0] = AV_NOPTS_VALUE;
2046  ctx->initial_pts[1] = AV_NOPTS_VALUE;
2048  }
2049 
2050  if (frame) {
2051  in_surf = get_free_frame(ctx);
2052  if (!in_surf)
2053  return AVERROR(EAGAIN);
2054 
2055  res = nvenc_push_context(avctx);
2056  if (res < 0)
2057  return res;
2058 
2059  reconfig_encoder(avctx, frame);
2060 
2061  res = nvenc_upload_frame(avctx, frame, in_surf);
2062 
2063  res2 = nvenc_pop_context(avctx);
2064  if (res2 < 0)
2065  return res2;
2066 
2067  if (res)
2068  return res;
2069 
2070  pic_params.inputBuffer = in_surf->input_surface;
2071  pic_params.bufferFmt = in_surf->format;
2072  pic_params.inputWidth = in_surf->width;
2073  pic_params.inputHeight = in_surf->height;
2074  pic_params.inputPitch = in_surf->pitch;
2075  pic_params.outputBitstream = in_surf->output_surface;
2076 
2077  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2078  if (frame->top_field_first)
2079  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2080  else
2081  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2082  } else {
2083  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2084  }
2085 
2086  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2087  pic_params.encodePicFlags =
2088  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2089  } else {
2090  pic_params.encodePicFlags = 0;
2091  }
2092 
2093  pic_params.inputTimeStamp = frame->pts;
2094 
2095  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2096  if (ff_alloc_a53_sei(frame, sizeof(NV_ENC_SEI_PAYLOAD), (void**)&sei_data, &sei_size) < 0) {
2097  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2098  }
2099 
2100  if (sei_data) {
2101  sei_data->payloadSize = (uint32_t)sei_size;
2102  sei_data->payloadType = 4;
2103  sei_data->payload = (uint8_t*)(sei_data + 1);
2104  }
2105  }
2106 
2107  nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data);
2108  } else {
2109  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2110  ctx->encoder_flushing = 1;
2111  }
2112 
2113  res = nvenc_push_context(avctx);
2114  if (res < 0)
2115  return res;
2116 
2117  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2118  av_free(sei_data);
2119 
2120  res = nvenc_pop_context(avctx);
2121  if (res < 0)
2122  return res;
2123 
2124  if (nv_status != NV_ENC_SUCCESS &&
2125  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2126  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2127 
2128  if (frame) {
2129  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2131 
2132  if (ctx->initial_pts[0] == AV_NOPTS_VALUE)
2133  ctx->initial_pts[0] = frame->pts;
2134  else if (ctx->initial_pts[1] == AV_NOPTS_VALUE)
2135  ctx->initial_pts[1] = frame->pts;
2136  }
2137 
2138  /* all the pending buffers are now ready for output */
2139  if (nv_status == NV_ENC_SUCCESS) {
2140  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2141  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2142  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2143  }
2144  }
2145 
2146  return 0;
2147 }
2148 
2150 {
2151  NvencSurface *tmp_out_surf;
2152  int res, res2;
2153 
2154  NvencContext *ctx = avctx->priv_data;
2155 
2156  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2157  return AVERROR(EINVAL);
2158 
2159  if (output_ready(avctx, ctx->encoder_flushing)) {
2160  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2161 
2162  res = nvenc_push_context(avctx);
2163  if (res < 0)
2164  return res;
2165 
2166  res = process_output_surface(avctx, pkt, tmp_out_surf);
2167 
2168  res2 = nvenc_pop_context(avctx);
2169  if (res2 < 0)
2170  return res2;
2171 
2172  if (res)
2173  return res;
2174 
2175  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2176  } else if (ctx->encoder_flushing) {
2177  return AVERROR_EOF;
2178  } else {
2179  return AVERROR(EAGAIN);
2180  }
2181 
2182  return 0;
2183 }
2184 
2186  const AVFrame *frame, int *got_packet)
2187 {
2188  NvencContext *ctx = avctx->priv_data;
2189  int res;
2190 
2191  if (!ctx->encoder_flushing) {
2192  res = ff_nvenc_send_frame(avctx, frame);
2193  if (res < 0)
2194  return res;
2195  }
2196 
2197  res = ff_nvenc_receive_packet(avctx, pkt);
2198  if (res == AVERROR(EAGAIN) || res == AVERROR_EOF) {
2199  *got_packet = 0;
2200  } else if (res < 0) {
2201  return res;
2202  } else {
2203  *got_packet = 1;
2204  }
2205 
2206  return 0;
2207 }
const GUID guid
Definition: nvenc.c:583
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:2939
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:60
int no_scenecut
Definition: nvenc.h:176
#define NULL
Definition: coverity.c:32
const struct AVCodec * codec
Definition: avcodec.h:1574
const char const char void * val
Definition: avisynth_c.h:863
BI type.
Definition: avutil.h:280
void * nvencoder
Definition: nvenc.h:162
int support_dyn_bitrate
Definition: nvenc.h:160
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1396
int twopass
Definition: nvenc.h:170
#define CHECK_CU(x)
Definition: nvenc.c:35
static enum AVPixelFormat pix_fmt
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:67
int height
Definition: nvenc.h:63
This structure describes decoded (raw) audio or video data.
Definition: frame.h:295
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1092
AVFifoBuffer * timestamp_list
Definition: nvenc.h:138
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:720
static void flush(AVCodecContext *avctx)
NvencFunctions * nvenc_dl
Definition: nvenc.h:74
int mapped
Definition: nvenc.h:146
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:896
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:651
AVFrame * in_ref
Definition: nvenc.h:60
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
misc image utilities
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:182
int64_t bit_rate
the average bitrate
Definition: avcodec.h:1615
#define RC_MODE_DEPRECATED
Definition: nvenc.h:40
Memory handling functions.
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:477
const char * desc
Definition: nvenc.c:68
int max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: avcodec.h:1134
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:1825
int encoder_flushing
Definition: nvenc.h:140
int forced_idr
Definition: nvenc.h:177
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:2200
int num
Numerator.
Definition: rational.h:59
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:587
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1322
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:76
NvencDynLoadFunctions nvenc_dload_funcs
Definition: nvenc.h:124
ID3D11Device * d3d11_device
Definition: nvenc.h:130
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel...
Definition: avcodec.h:1944
int width
The allocated dimensions of the frames in this pool.
Definition: hwcontext.h:228
int first_packet_output
Definition: nvenc.h:158
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:1775
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:208
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2149
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:236
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:758
static AVPacket pkt
int init_qp_b
Definition: nvenc.h:188
#define PRESET(name,...)
Definition: nvenc.c:590
int profile
profile
Definition: avcodec.h:2898
int preset
Definition: nvenc.h:164
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:1877
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:727
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1514
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:797
int pitch
Definition: nvenc.h:64
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:122
int nvenc_device_count
Definition: nvenc.h:77
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:2949
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:59
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented...
Definition: avcodec.h:1688
NVENCSTATUS nverr
Definition: nvenc.c:66
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:734
AVBufferRef * hw_frames_ctx
For hwaccel-format frames, this should be a reference to the AVHWFramesContext describing the frame...
Definition: frame.h:634
int aq
Definition: nvenc.h:175
#define AV_PIX_FMT_P016
Definition: pixfmt.h:437
int b_ref_mode
Definition: nvenc.h:193
#define AV_PIX_FMT_P010
Definition: pixfmt.h:436
CUcontext cu_context
Definition: nvenc.h:128
int ff_alloc_packet2(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int64_t min_size)
Check AVPacket size and/or allocate data.
Definition: encode.c:32
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:2937
#define DEFAULT
Definition: avdct.c:28
uint8_t
AVFifoBuffer * unused_surface_queue
Definition: nvenc.h:135
#define av_cold
Definition: attributes.h:82
#define av_malloc(s)
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:189
float delta
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:42
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:1834
int init_qp_p
Definition: nvenc.h:187
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:208
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:2986
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:443
int64_t pts
Presentation timestamp in time_base units (time when frame should be shown to user).
Definition: frame.h:388
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:1666
float quality
Definition: nvenc.h:184
NV_ENC_INITIALIZE_PARAMS init_encode_params
Definition: nvenc.h:126
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:91
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1265
#define height
ID3D11Device * device
Device used for texture creation and access.
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:39
uint8_t * data
Definition: avcodec.h:1477
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1363
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
#define AVERROR_EOF
End of file.
Definition: error.h:55
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:192
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:299
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:400
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1590
int buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: avcodec.h:1161
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:2987
AVFifoBuffer * output_surface_ready_queue
Definition: nvenc.h:137
#define av_log(a,...)
CUcontext cu_context_internal
Definition: nvenc.h:129
An API-specific header for AV_HWDEVICE_TYPE_CUDA.
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: avcodec.h:1509
int ptr_index
Definition: nvenc.h:144
int async_depth
Definition: nvenc.h:173
enum AVCodecID id
Definition: avcodec.h:3495
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:259
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:220
void * ptr
Definition: nvenc.h:143
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:176
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:1855
int coder
Definition: nvenc.h:192
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:1738
int rc
Definition: nvenc.h:168
int nb_registered_frames
Definition: nvenc.h:149
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:202
int qmax
maximum quantizer
Definition: avcodec.h:2414
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:98
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:213
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:2941
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:1645
GLenum GLint * params
Definition: opengl_enc.c:113
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
simple assert() macros that are a bit more flexible than ISO C assert().
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:365
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:1870
int ff_nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2021
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:78
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1008
GLsizei count
Definition: opengl_enc.c:108
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1242
#define FFMAX(a, b)
Definition: common.h:94
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:618
#define fail()
Definition: checkasm.h:120
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:387
int level
Definition: nvenc.h:166
int flags
A combination of AV_PKT_FLAG values.
Definition: avcodec.h:1483
int bluray_compat
Definition: nvenc.h:186
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:2428
int aq_strength
Definition: nvenc.h:183
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:246
int refs
number of reference frames
Definition: avcodec.h:2153
int flags
Definition: nvenc.h:172
struct NvencContext::@126 registered_frames[MAX_REGISTERED_FRAMES]
enum AVPictureType pict_type
Picture type of the frame.
Definition: frame.h:378
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1644
NV_ENC_REGISTERED_PTR regptr
Definition: nvenc.h:145
#define FFMIN(a, b)
Definition: common.h:96
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1119
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:51
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:148
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1471
#define width
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:1786
int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *frame, int *got_packet)
Definition: nvenc.c:2185
int width
picture width / height.
Definition: avcodec.h:1738
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames...
Definition: avcodec.h:3262
#define NVENC_CAP
Definition: nvenc.c:37
AVFormatContext * ctx
Definition: movenc.c:48
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:2179
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1526
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:62
int dummy
Definition: motion.c:64
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:1697
int profile
Definition: nvenc.h:165
AVFifoBuffer * output_surface_queue
Definition: nvenc.h:136
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:123
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:56
HW acceleration through CUDA.
Definition: pixfmt.h:235
static void error(const char *err)
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:916
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:195
#define FF_ARRAY_ELEMS(a)
the normal 2^n-1 "JPEG" YUV ranges
Definition: pixfmt.h:522
static int nvenc_print_error(void *log_ctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:113
if(ret)
CudaFunctions * cuda_dl
Definition: nvenc.h:73
enum AVPixelFormat data_pix_fmt
Definition: nvenc.h:153
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:58
int format
format of the frame, -1 if unknown or unset Values correspond to enum AVPixelFormat for video frames...
Definition: frame.h:368
This structure describes the bitrate properties of an encoded bitstream.
Definition: avcodec.h:1128
#define AV_LOG_INFO
Standard information.
Definition: log.h:187
NV_ENC_CONFIG encode_config
Definition: nvenc.h:127
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:197
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:111
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:77
int linesize[AV_NUM_DATA_POINTERS]
For video, size in bytes of each picture line.
Definition: frame.h:326
int strict_gop
Definition: nvenc.h:182
int temporal_aq
Definition: nvenc.h:179
int64_t initial_pts[2]
Definition: nvenc.h:157
main external API structure.
Definition: avcodec.h:1565
uint8_t * data
The data buffer.
Definition: buffer.h:89
int qmin
minimum quantizer
Definition: avcodec.h:2407
#define BD
int init_qp_i
Definition: nvenc.h:189
int extradata_size
Definition: avcodec.h:1667
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:50
This struct is allocated as AVHWDeviceContext.hwctx.
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:282
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data)
Definition: nvenc.c:1706
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:2193
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:2186
int width
Definition: nvenc.h:62
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:123
#define IS_CBR(rc)
Definition: nvenc.c:38
AVPictureType
Definition: avutil.h:272
int flags
Definition: nvenc.c:584
int nonref_p
Definition: nvenc.h:181
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:1847
int cbr
Definition: nvenc.h:169
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1556
int averr
Definition: nvenc.c:67
static const struct @120 nvenc_errors[]
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:553
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1631
#define flags(name, subs,...)
Definition: cbs_av1.c:561
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1105
uint8_t * data[AV_NUM_DATA_POINTERS]
pointer to the picture/channel planes.
Definition: frame.h:309
int reg_idx
Definition: nvenc.h:61
uint8_t level
Definition: svq3.c:207
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:904
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:313
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1760
int
int b_adapt
Definition: nvenc.h:178
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:1743
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:84
common internal api header.
int weighted_pred
Definition: nvenc.h:191
int rc_lookahead
Definition: nvenc.h:174
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:1911
Bi-dir predicted.
Definition: avutil.h:276
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
attribute_deprecated AVFrame * coded_frame
the picture in the bitstream
Definition: avcodec.h:2815
int size
Definition: nvenc.h:68
NvencSurface * surfaces
Definition: nvenc.h:133
int den
Denominator.
Definition: rational.h:60
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:71
NV_ENC_MAP_INPUT_RESOURCE in_map
Definition: nvenc.h:147
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1953
#define AV_INPUT_BUFFER_PADDING_SIZE
Required number of additionally allocated bytes at the end of the input bitstream for decoding...
Definition: avcodec.h:790
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1929
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:2989
void * priv_data
Definition: avcodec.h:1592
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:1752
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
#define av_free(p)
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:85
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:43
int top_field_first
If the content is interlaced, is top field displayed first.
Definition: frame.h:447
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:153
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:403
int avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: avcodec.h:1152
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:1600
int device
Definition: nvenc.h:171
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed...
Definition: avcodec.h:1476
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: utils.c:2152
This struct is allocated as AVHWDeviceContext.hwctx.
int nb_surfaces
Definition: nvenc.h:132
int aud
Definition: nvenc.h:185
int cqp
Definition: nvenc.h:190
#define av_freep(p)
#define AV_CODEC_ID_H265
Definition: avcodec.h:393
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:713
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:63
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:170
#define FFSWAP(type, a, b)
Definition: common.h:99
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2438
int tier
Definition: nvenc.h:167
int a53_cc
Definition: nvenc.h:194
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied...
Definition: fifo.c:71
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later.That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another.Frame references ownership and permissions
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:3314
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:221
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:57
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
This structure stores compressed data.
Definition: avcodec.h:1454
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:66
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: avcodec.h:1470
for(j=16;j >0;--j)
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
Predicted.
Definition: avutil.h:275
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:592
int zerolatency
Definition: nvenc.h:180
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:364
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:2443
void * av_mallocz_array(size_t nmemb, size_t size)
Definition: mem.c:191
const char * name
Definition: opengl_enc.c:102