FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc_sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
31 #include "libavutil/hwcontext_cuda.h"
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
37 #include "libavutil/mathematics.h"
38 #include "atsc_a53.h"
39 #include "encode.h"
40 #include "internal.h"
41 #include "packet_internal.h"
42 
43 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
44 
45 #define NVENC_CAP 0x30
46 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
47  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
48  rc == NV_ENC_PARAMS_RC_CBR_HQ)
49 
50 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
51  AV_PIX_FMT_YUV420P,
52  AV_PIX_FMT_NV12,
53  AV_PIX_FMT_P010,
54  AV_PIX_FMT_YUV444P,
55  AV_PIX_FMT_P016, // Truncated to 10bits
56  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
57  AV_PIX_FMT_0RGB32,
58  AV_PIX_FMT_RGB32,
59  AV_PIX_FMT_0BGR32,
60  AV_PIX_FMT_BGR32,
61  AV_PIX_FMT_X2RGB10,
62  AV_PIX_FMT_X2BGR10,
63  AV_PIX_FMT_GBRP,
64  AV_PIX_FMT_GBRP16, // Truncated to 10bits
65  AV_PIX_FMT_CUDA,
66 #if CONFIG_D3D11VA
67  AV_PIX_FMT_D3D11,
68 #endif
69  AV_PIX_FMT_NONE
70 };
71 
72 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
73  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
74  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
75 #if CONFIG_D3D11VA
76  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
77  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
78 #endif
79  NULL,
80 };
81 
82 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
83  pix_fmt == AV_PIX_FMT_P016 || \
84  pix_fmt == AV_PIX_FMT_YUV444P16 || \
85  pix_fmt == AV_PIX_FMT_X2RGB10 || \
86  pix_fmt == AV_PIX_FMT_X2BGR10 || \
87  pix_fmt == AV_PIX_FMT_GBRP16)
88 
89 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
90  pix_fmt == AV_PIX_FMT_YUV444P16 || \
91  pix_fmt == AV_PIX_FMT_GBRP || \
92  pix_fmt == AV_PIX_FMT_GBRP16)
93 
94 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
95  pix_fmt == AV_PIX_FMT_GBRP16)
96 
97 static const struct {
98  NVENCSTATUS nverr;
99  int averr;
100  const char *desc;
101 } nvenc_errors[] = {
102  { NV_ENC_SUCCESS, 0, "success" },
103  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
104  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
105  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
106  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
107  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
108  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
109  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
110  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
111  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
112  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
113  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
114  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
115  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
116  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
117  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
118  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
119  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
120  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
121  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
122  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
123  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
124  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
125  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
126  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
127  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
128 };
129 
130 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
131 {
132  int i;
133  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
134  if (nvenc_errors[i].nverr == err) {
135  if (desc)
136  *desc = nvenc_errors[i].desc;
137  return nvenc_errors[i].averr;
138  }
139  }
140  if (desc)
141  *desc = "unknown error";
142  return AVERROR_UNKNOWN;
143 }
144 
145 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
146  const char *error_string)
147 {
148  const char *desc;
149  const char *details = "(no details)";
150  int ret = nvenc_map_error(err, &desc);
151 
152 #ifdef NVENC_HAVE_GETLASTERRORSTRING
153  NvencContext *ctx = avctx->priv_data;
154  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
155 
156  if (p_nvenc && ctx->nvencoder)
157  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
158 #endif
159 
160  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
161 
162  return ret;
163 }
164 
165 typedef struct GUIDTuple {
166  const GUID guid;
167  int flags;
168 } GUIDTuple;
169 
170 #define PRESET_ALIAS(alias, name, ...) \
171  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
172 
173 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
174 
175 static void nvenc_map_preset(NvencContext *ctx)
176 {
177  GUIDTuple presets[] = {
178 #ifdef NVENC_HAVE_NEW_PRESETS
179  PRESET(P1),
180  PRESET(P2),
181  PRESET(P3),
182  PRESET(P4),
183  PRESET(P5),
184  PRESET(P6),
185  PRESET(P7),
186  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
187  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
188  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
189  // Compat aliases
190  PRESET_ALIAS(DEFAULT, P4, NVENC_DEPRECATED_PRESET),
191  PRESET_ALIAS(HP, P1, NVENC_DEPRECATED_PRESET),
192  PRESET_ALIAS(HQ, P7, NVENC_DEPRECATED_PRESET),
193  PRESET_ALIAS(BD, P5, NVENC_DEPRECATED_PRESET),
194  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
195  PRESET_ALIAS(LOW_LATENCY_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
196  PRESET_ALIAS(LOW_LATENCY_HQ, P7, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
197  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
198  PRESET_ALIAS(LOSSLESS_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
199 #else
200  PRESET(DEFAULT),
201  PRESET(HP),
202  PRESET(HQ),
203  PRESET(BD),
204  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
205  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
206  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
207  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
208  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
209  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
210  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
211  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
212 #endif
213  };
214 
215  GUIDTuple *t = &presets[ctx->preset];
216 
217  ctx->init_encode_params.presetGUID = t->guid;
218  ctx->flags = t->flags;
219 
220 #ifdef NVENC_HAVE_NEW_PRESETS
221  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
222  ctx->flags |= NVENC_LOSSLESS;
223 #endif
224 }
225 
226 #undef PRESET
227 #undef PRESET_ALIAS
228 
229 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
230 {
231 #if NVENCAPI_CHECK_VERSION(12, 1)
232  const char *minver = "(unknown)";
233 #elif NVENCAPI_CHECK_VERSION(12, 0)
234 # if defined(_WIN32) || defined(__CYGWIN__)
235  const char *minver = "522.25";
236 # else
237  const char *minver = "520.56.06";
238 # endif
239 #elif NVENCAPI_CHECK_VERSION(11, 1)
240 # if defined(_WIN32) || defined(__CYGWIN__)
241  const char *minver = "471.41";
242 # else
243  const char *minver = "470.57.02";
244 # endif
245 #elif NVENCAPI_CHECK_VERSION(11, 0)
246 # if defined(_WIN32) || defined(__CYGWIN__)
247  const char *minver = "456.71";
248 # else
249  const char *minver = "455.28";
250 # endif
251 #elif NVENCAPI_CHECK_VERSION(10, 0)
252 # if defined(_WIN32) || defined(__CYGWIN__)
253  const char *minver = "450.51";
254 # else
255  const char *minver = "445.87";
256 # endif
257 #elif NVENCAPI_CHECK_VERSION(9, 1)
258 # if defined(_WIN32) || defined(__CYGWIN__)
259  const char *minver = "436.15";
260 # else
261  const char *minver = "435.21";
262 # endif
263 #elif NVENCAPI_CHECK_VERSION(9, 0)
264 # if defined(_WIN32) || defined(__CYGWIN__)
265  const char *minver = "418.81";
266 # else
267  const char *minver = "418.30";
268 # endif
269 #elif NVENCAPI_CHECK_VERSION(8, 2)
270 # if defined(_WIN32) || defined(__CYGWIN__)
271  const char *minver = "397.93";
272 # else
273  const char *minver = "396.24";
274 #endif
275 #elif NVENCAPI_CHECK_VERSION(8, 1)
276 # if defined(_WIN32) || defined(__CYGWIN__)
277  const char *minver = "390.77";
278 # else
279  const char *minver = "390.25";
280 # endif
281 #else
282 # if defined(_WIN32) || defined(__CYGWIN__)
283  const char *minver = "378.66";
284 # else
285  const char *minver = "378.13";
286 # endif
287 #endif
288  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
289 }
290 
291 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
292 {
293  NvencContext *ctx = avctx->priv_data;
294  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
295  NVENCSTATUS err;
296  uint32_t nvenc_max_ver;
297  int ret;
298 
299  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
300  if (ret < 0)
301  return ret;
302 
303  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
304  if (ret < 0) {
305  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
306  return ret;
307  }
308 
309  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
310  if (err != NV_ENC_SUCCESS)
311  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
312 
313  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
314 
315  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
316  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
317  "Required: %d.%d Found: %d.%d\n",
318  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
319  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
320  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
321  return AVERROR(ENOSYS);
322  }
323 
324  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
325 
326  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
327  if (err != NV_ENC_SUCCESS)
328  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
329 
330  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
331 
332  return 0;
333 }
334 
335 static int nvenc_push_context(AVCodecContext *avctx)
336 {
337  NvencContext *ctx = avctx->priv_data;
338  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
339 
340  if (ctx->d3d11_device)
341  return 0;
342 
343  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
344 }
345 
346 static int nvenc_pop_context(AVCodecContext *avctx)
347 {
348  NvencContext *ctx = avctx->priv_data;
349  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
350  CUcontext dummy;
351 
352  if (ctx->d3d11_device)
353  return 0;
354 
355  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
356 }
357 
358 static av_cold int nvenc_open_session(AVCodecContext *avctx)
359 {
360  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
361  NvencContext *ctx = avctx->priv_data;
362  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
363  NVENCSTATUS ret;
364 
365  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
366  params.apiVersion = NVENCAPI_VERSION;
367  if (ctx->d3d11_device) {
368  params.device = ctx->d3d11_device;
369  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
370  } else {
371  params.device = ctx->cu_context;
372  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
373  }
374 
375  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
376  if (ret != NV_ENC_SUCCESS) {
377  ctx->nvencoder = NULL;
378  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
379  }
380 
381  return 0;
382 }
383 
384 static int nvenc_check_codec_support(AVCodecContext *avctx)
385 {
386  NvencContext *ctx = avctx->priv_data;
387  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
388  int i, ret, count = 0;
389  GUID *guids = NULL;
390 
391  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
392 
393  if (ret != NV_ENC_SUCCESS || !count)
394  return AVERROR(ENOSYS);
395 
396  guids = av_malloc(count * sizeof(GUID));
397  if (!guids)
398  return AVERROR(ENOMEM);
399 
400  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
401  if (ret != NV_ENC_SUCCESS) {
402  ret = AVERROR(ENOSYS);
403  goto fail;
404  }
405 
406  ret = AVERROR(ENOSYS);
407  for (i = 0; i < count; i++) {
408  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
409  ret = 0;
410  break;
411  }
412  }
413 
414 fail:
415  av_free(guids);
416 
417  return ret;
418 }
419 
420 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
421 {
422  NvencContext *ctx = avctx->priv_data;
423  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
424  NV_ENC_CAPS_PARAM params = { 0 };
425  int ret, val = 0;
426 
427  params.version = NV_ENC_CAPS_PARAM_VER;
428  params.capsToQuery = cap;
429 
430  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
431 
432  if (ret == NV_ENC_SUCCESS)
433  return val;
434  return 0;
435 }
436 
437 static int nvenc_check_capabilities(AVCodecContext *avctx)
438 {
439  NvencContext *ctx = avctx->priv_data;
440  int ret;
441 
442  ret = nvenc_check_codec_support(avctx);
443  if (ret < 0) {
444  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
445  return ret;
446  }
447 
448  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
449  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
450  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
451  return AVERROR(ENOSYS);
452  }
453 
454  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
455  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
456  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
457  return AVERROR(ENOSYS);
458  }
459 
460  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
461  if (ret < avctx->width) {
462  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
463  avctx->width, ret);
464  return AVERROR(ENOSYS);
465  }
466 
467  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
468  if (ret < avctx->height) {
469  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
470  avctx->height, ret);
471  return AVERROR(ENOSYS);
472  }
473 
474  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
475  if (ret < avctx->max_b_frames) {
476  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
477  avctx->max_b_frames, ret);
478 
479  return AVERROR(ENOSYS);
480  }
481 
482  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
483  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
484  av_log(avctx, AV_LOG_WARNING,
485  "Interlaced encoding is not supported. Supported level: %d\n",
486  ret);
487  return AVERROR(ENOSYS);
488  }
489 
490  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
491  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
492  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
493  return AVERROR(ENOSYS);
494  }
495 
496  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
497  if (ctx->rc_lookahead > 0 && ret <= 0) {
498  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
499  return AVERROR(ENOSYS);
500  }
501 
502  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
503  if (ctx->temporal_aq > 0 && ret <= 0) {
504  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
505  return AVERROR(ENOSYS);
506  }
507 
508  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
509  if (ctx->weighted_pred > 0 && ret <= 0) {
510  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
511  return AVERROR(ENOSYS);
512  }
513 
514  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
515  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
516  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
517  return AVERROR(ENOSYS);
518  }
519 
520 #ifdef NVENC_HAVE_BFRAME_REF_MODE
521  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
522  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
523  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
524  return AVERROR(ENOSYS);
525  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
526  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
527  return AVERROR(ENOSYS);
528  }
529 #else
530  if (ctx->b_ref_mode != 0) {
531  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
532  return AVERROR(ENOSYS);
533  }
534 #endif
535 
536 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
537  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
538  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
539  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
540  return AVERROR(ENOSYS);
541  }
542 #else
543  if(avctx->refs != 0) {
544  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
545  return AVERROR(ENOSYS);
546  }
547 #endif
548 
549 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
550  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
551  if(ctx->single_slice_intra_refresh && ret <= 0) {
552  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
553  return AVERROR(ENOSYS);
554  }
555 #else
556  if(ctx->single_slice_intra_refresh) {
557  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
558  return AVERROR(ENOSYS);
559  }
560 #endif
561 
562  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
563  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
564  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
565  return AVERROR(ENOSYS);
566  }
567 
568 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
569  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
570  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
571  return AVERROR(ENOSYS);
572  }
573 #endif
574 
575  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
576  if(ctx->constrained_encoding && ret <= 0) {
577  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
578  return AVERROR(ENOSYS);
579  }
580 
581  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
582 
583  return 0;
584 }
585 
586 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
587 {
588  NvencContext *ctx = avctx->priv_data;
589  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
590  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
591  char name[128] = { 0};
592  int major, minor, ret;
593  CUdevice cu_device;
594  int loglevel = AV_LOG_VERBOSE;
595 
596  if (ctx->device == LIST_DEVICES)
597  loglevel = AV_LOG_INFO;
598 
599  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
600  if (ret < 0)
601  return ret;
602 
603  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
604  if (ret < 0)
605  return ret;
606 
607  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
608  if (ret < 0)
609  return ret;
610 
611  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
612  if (((major << 4) | minor) < NVENC_CAP) {
613  av_log(avctx, loglevel, "does not support NVENC\n");
614  goto fail;
615  }
616 
617  if (ctx->device != idx && ctx->device != ANY_DEVICE)
618  return -1;
619 
620  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
621  if (ret < 0)
622  goto fail;
623 
624  ctx->cu_context = ctx->cu_context_internal;
625  ctx->cu_stream = NULL;
626 
627  if ((ret = nvenc_pop_context(avctx)) < 0)
628  goto fail2;
629 
630  if ((ret = nvenc_open_session(avctx)) < 0)
631  goto fail2;
632 
633  if ((ret = nvenc_check_capabilities(avctx)) < 0)
634  goto fail3;
635 
636  av_log(avctx, loglevel, "supports NVENC\n");
637 
638  dl_fn->nvenc_device_count++;
639 
640  if (ctx->device == idx || ctx->device == ANY_DEVICE)
641  return 0;
642 
643 fail3:
644  if ((ret = nvenc_push_context(avctx)) < 0)
645  return ret;
646 
647  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
648  ctx->nvencoder = NULL;
649 
650  if ((ret = nvenc_pop_context(avctx)) < 0)
651  return ret;
652 
653 fail2:
654  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
655  ctx->cu_context_internal = NULL;
656 
657 fail:
658  return AVERROR(ENOSYS);
659 }
660 
661 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
662 {
663  NvencContext *ctx = avctx->priv_data;
664  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
665 
666  switch (avctx->codec->id) {
667  case AV_CODEC_ID_H264:
668  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
669  break;
670  case AV_CODEC_ID_HEVC:
671  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
672  break;
673 #if CONFIG_AV1_NVENC_ENCODER
674  case AV_CODEC_ID_AV1:
675  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
676  break;
677 #endif
678  default:
679  return AVERROR_BUG;
680  }
681 
682  nvenc_map_preset(ctx);
683 
684  if (ctx->flags & NVENC_DEPRECATED_PRESET)
685  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
686 
687  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
688  AVHWFramesContext *frames_ctx;
689  AVHWDeviceContext *hwdev_ctx;
690  AVCUDADeviceContext *cuda_device_hwctx = NULL;
691 #if CONFIG_D3D11VA
692  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
693 #endif
694  int ret;
695 
696  if (avctx->hw_frames_ctx) {
697  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
698  if (frames_ctx->format == AV_PIX_FMT_CUDA)
699  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
700 #if CONFIG_D3D11VA
701  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
702  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
703 #endif
704  else
705  return AVERROR(EINVAL);
706  } else if (avctx->hw_device_ctx) {
707  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
708  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
709  cuda_device_hwctx = hwdev_ctx->hwctx;
710 #if CONFIG_D3D11VA
711  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
712  d3d11_device_hwctx = hwdev_ctx->hwctx;
713 #endif
714  else
715  return AVERROR(EINVAL);
716  } else {
717  return AVERROR(EINVAL);
718  }
719 
720  if (cuda_device_hwctx) {
721  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
722  ctx->cu_stream = cuda_device_hwctx->stream;
723  }
724 #if CONFIG_D3D11VA
725  else if (d3d11_device_hwctx) {
726  ctx->d3d11_device = d3d11_device_hwctx->device;
727  ID3D11Device_AddRef(ctx->d3d11_device);
728  }
729 #endif
730 
731  ret = nvenc_open_session(avctx);
732  if (ret < 0)
733  return ret;
734 
735  ret = nvenc_check_capabilities(avctx);
736  if (ret < 0) {
737  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
738  return ret;
739  }
740  } else {
741  int i, nb_devices = 0;
742 
743  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
744  return AVERROR_UNKNOWN;
745 
746  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
747  return AVERROR_UNKNOWN;
748 
749  if (!nb_devices) {
750  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
751  return AVERROR_EXTERNAL;
752  }
753 
754  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
755 
756  dl_fn->nvenc_device_count = 0;
757  for (i = 0; i < nb_devices; ++i) {
758  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
759  return 0;
760  }
761 
762  if (ctx->device == LIST_DEVICES)
763  return AVERROR_EXIT;
764 
765  if (!dl_fn->nvenc_device_count) {
766  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
767  return AVERROR_EXTERNAL;
768  }
769 
770  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
771  return AVERROR(EINVAL);
772  }
773 
774  return 0;
775 }
776 
777 static av_cold void set_constqp(AVCodecContext *avctx)
778 {
779  NvencContext *ctx = avctx->priv_data;
780  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
781 #if CONFIG_AV1_NVENC_ENCODER
782  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
783 #else
784  int qmax = 51;
785 #endif
786 
787  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
788 
789  if (ctx->init_qp_p >= 0) {
790  rc->constQP.qpInterP = ctx->init_qp_p;
791  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
792  rc->constQP.qpIntra = ctx->init_qp_i;
793  rc->constQP.qpInterB = ctx->init_qp_b;
794  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
795  rc->constQP.qpIntra = av_clip(
796  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
797  rc->constQP.qpInterB = av_clip(
798  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
799  } else {
800  rc->constQP.qpIntra = rc->constQP.qpInterP;
801  rc->constQP.qpInterB = rc->constQP.qpInterP;
802  }
803  } else if (ctx->cqp >= 0) {
804  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
805  if (avctx->b_quant_factor != 0.0)
806  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
807  if (avctx->i_quant_factor != 0.0)
808  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
809  }
810 
811  avctx->qmin = -1;
812  avctx->qmax = -1;
813 }
814 
815 static av_cold void set_vbr(AVCodecContext *avctx)
816 {
817  NvencContext *ctx = avctx->priv_data;
818  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
819  int qp_inter_p;
820 #if CONFIG_AV1_NVENC_ENCODER
821  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
822 #else
823  int qmax = 51;
824 #endif
825 
826  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
827  rc->enableMinQP = 1;
828  rc->enableMaxQP = 1;
829 
830  rc->minQP.qpInterB = avctx->qmin;
831  rc->minQP.qpInterP = avctx->qmin;
832  rc->minQP.qpIntra = avctx->qmin;
833 
834  rc->maxQP.qpInterB = avctx->qmax;
835  rc->maxQP.qpInterP = avctx->qmax;
836  rc->maxQP.qpIntra = avctx->qmax;
837 
838  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
839  } else if (avctx->qmin >= 0) {
840  rc->enableMinQP = 1;
841 
842  rc->minQP.qpInterB = avctx->qmin;
843  rc->minQP.qpInterP = avctx->qmin;
844  rc->minQP.qpIntra = avctx->qmin;
845 
846  qp_inter_p = avctx->qmin;
847  } else {
848  qp_inter_p = 26; // default to 26
849  }
850 
851  rc->enableInitialRCQP = 1;
852 
853  if (ctx->init_qp_p < 0) {
854  rc->initialRCQP.qpInterP = qp_inter_p;
855  } else {
856  rc->initialRCQP.qpInterP = ctx->init_qp_p;
857  }
858 
859  if (ctx->init_qp_i < 0) {
860  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
861  rc->initialRCQP.qpIntra = av_clip(
862  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
863  } else {
864  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
865  }
866  } else {
867  rc->initialRCQP.qpIntra = ctx->init_qp_i;
868  }
869 
870  if (ctx->init_qp_b < 0) {
871  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
872  rc->initialRCQP.qpInterB = av_clip(
873  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
874  } else {
875  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
876  }
877  } else {
878  rc->initialRCQP.qpInterB = ctx->init_qp_b;
879  }
880 }
881 
882 static av_cold void set_lossless(AVCodecContext *avctx)
883 {
884  NvencContext *ctx = avctx->priv_data;
885  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
886 
887  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
888  rc->constQP.qpInterB = 0;
889  rc->constQP.qpInterP = 0;
890  rc->constQP.qpIntra = 0;
891 
892  avctx->qmin = -1;
893  avctx->qmax = -1;
894 }
895 
896 static void nvenc_override_rate_control(AVCodecContext *avctx)
897 {
898  NvencContext *ctx = avctx->priv_data;
899  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
900 
901  switch (ctx->rc) {
902  case NV_ENC_PARAMS_RC_CONSTQP:
903  set_constqp(avctx);
904  return;
905  case NV_ENC_PARAMS_RC_VBR_MINQP:
906  if (avctx->qmin < 0) {
907  av_log(avctx, AV_LOG_WARNING,
908  "The variable bitrate rate-control requires "
909  "the 'qmin' option set.\n");
910  set_vbr(avctx);
911  return;
912  }
913  /* fall through */
914  case NV_ENC_PARAMS_RC_VBR_HQ:
915  case NV_ENC_PARAMS_RC_VBR:
916  set_vbr(avctx);
917  break;
918  case NV_ENC_PARAMS_RC_CBR:
919  case NV_ENC_PARAMS_RC_CBR_HQ:
920  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
921  break;
922  }
923 
924  rc->rateControlMode = ctx->rc;
925 }
926 
927 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
928 {
929  NvencContext *ctx = avctx->priv_data;
930  // default minimum of 4 surfaces
931  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
932  // another multiply by 2 to avoid blocking next PBB group
933  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
934 
935  // lookahead enabled
936  if (ctx->rc_lookahead > 0) {
937  // +1 is to account for lkd_bound calculation later
938  // +4 is to allow sufficient pipelining with lookahead
939  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
940  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
941  {
942  av_log(avctx, AV_LOG_WARNING,
943  "Defined rc_lookahead requires more surfaces, "
944  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
945  }
946  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
947  } else {
948  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
949  {
950  av_log(avctx, AV_LOG_WARNING,
951  "Defined b-frame requires more surfaces, "
952  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
953  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
954  }
955  else if (ctx->nb_surfaces <= 0)
956  ctx->nb_surfaces = nb_surfaces;
957  // otherwise use user specified value
958  }
959 
960  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
961  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
962 
963  return 0;
964 }
965 
966 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
967 {
968  NvencContext *ctx = avctx->priv_data;
969 
970  if (avctx->global_quality > 0)
971  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
972 
973  if (ctx->cqp < 0 && avctx->global_quality > 0)
974  ctx->cqp = avctx->global_quality;
975 
976  if (avctx->bit_rate > 0) {
977  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
978  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
979  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
980  }
981 
982  if (avctx->rc_max_rate > 0)
983  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
984 
985 #ifdef NVENC_HAVE_MULTIPASS
986  ctx->encode_config.rcParams.multiPass = ctx->multipass;
987 
988  if (ctx->flags & NVENC_ONE_PASS)
989  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
990  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
991  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
992 
993  if (ctx->rc < 0) {
994  if (ctx->cbr) {
995  ctx->rc = NV_ENC_PARAMS_RC_CBR;
996  } else if (ctx->cqp >= 0) {
997  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
998  } else if (ctx->quality >= 0.0f) {
999  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1000  }
1001  }
1002 #else
1003  if (ctx->rc < 0) {
1004  if (ctx->flags & NVENC_ONE_PASS)
1005  ctx->twopass = 0;
1006  if (ctx->flags & NVENC_TWO_PASSES)
1007  ctx->twopass = 1;
1008 
1009  if (ctx->twopass < 0)
1010  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1011 
1012  if (ctx->cbr) {
1013  if (ctx->twopass) {
1014  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1015  } else {
1016  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1017  }
1018  } else if (ctx->cqp >= 0) {
1019  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1020  } else if (ctx->twopass) {
1021  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1022  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
1023  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1024  }
1025  }
1026 #endif
1027 
1028  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1029  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1030  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1031 
1032  ctx->rc &= ~RC_MODE_DEPRECATED;
1033  }
1034 
1035 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1036  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1037  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1038 #else
1039  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1040  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1041 #endif
1042 
1043 #ifdef NVENC_HAVE_LDKFS
1044  if (ctx->ldkfs)
1045  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1046 #endif
1047 
1048  if (ctx->flags & NVENC_LOSSLESS) {
1049  set_lossless(avctx);
1050  } else if (ctx->rc >= 0) {
1051  nvenc_override_rate_control(avctx);
1052  } else {
1053  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1054  set_vbr(avctx);
1055  }
1056 
1057  if (avctx->rc_buffer_size > 0) {
1058  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1059  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1060  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1061  }
1062 
1063  if (ctx->aq) {
1064  ctx->encode_config.rcParams.enableAQ = 1;
1065  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1066  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1067  }
1068 
1069  if (ctx->temporal_aq) {
1070  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1071  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1072  }
1073 
1074  if (ctx->rc_lookahead > 0) {
1075  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1076  ctx->encode_config.frameIntervalP - 4;
1077 
1078  if (lkd_bound < 0) {
1079  av_log(avctx, AV_LOG_WARNING,
1080  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1081  } else {
1082  ctx->encode_config.rcParams.enableLookahead = 1;
1083  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1084  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1085  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1086  av_log(avctx, AV_LOG_VERBOSE,
1087  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1088  ctx->encode_config.rcParams.lookaheadDepth,
1089  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1090  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1091  }
1092  }
1093 
1094  if (ctx->strict_gop) {
1095  ctx->encode_config.rcParams.strictGOPTarget = 1;
1096  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1097  }
1098 
1099  if (ctx->nonref_p)
1100  ctx->encode_config.rcParams.enableNonRefP = 1;
1101 
1102  if (ctx->zerolatency)
1103  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1104 
1105  if (ctx->quality) {
1106  //convert from float to fixed point 8.8
1107  int tmp_quality = (int)(ctx->quality * 256.0f);
1108  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1109  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1110 
1111  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1112 
1113  //CQ mode shall discard avg bitrate & honor max bitrate;
1114  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1115  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1116  }
1117 }
1118 
1119 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1120 {
1121  NvencContext *ctx = avctx->priv_data;
1122  NV_ENC_CONFIG *cc = &ctx->encode_config;
1123  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1124  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1125 
1126  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1127 
1128  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1129  vui->colourMatrix = AVCOL_SPC_BT470BG;
1130  vui->colourPrimaries = avctx->color_primaries;
1131  vui->transferCharacteristics = avctx->color_trc;
1132  vui->videoFullRangeFlag = 0;
1133  } else {
1134  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1135  vui->colourPrimaries = avctx->color_primaries;
1136  vui->transferCharacteristics = avctx->color_trc;
1137  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1138  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1139  }
1140 
1141  vui->colourDescriptionPresentFlag =
1142  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1143 
1144  vui->videoSignalTypePresentFlag =
1145  (vui->colourDescriptionPresentFlag
1146  || vui->videoFormat != 5
1147  || vui->videoFullRangeFlag != 0);
1148 
1149  h264->sliceMode = 3;
1150  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1151 
1152  if (ctx->intra_refresh) {
1153  h264->enableIntraRefresh = 1;
1154  h264->intraRefreshPeriod = avctx->gop_size;
1155  h264->intraRefreshCnt = avctx->gop_size - 1;
1156 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1157  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1158 #endif
1159  }
1160 
1161  if (ctx->constrained_encoding)
1162  h264->enableConstrainedEncoding = 1;
1163 
1164  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1165  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1166  h264->outputAUD = ctx->aud;
1167 
1168  if (ctx->dpb_size >= 0) {
1169  /* 0 means "let the hardware decide" */
1170  h264->maxNumRefFrames = ctx->dpb_size;
1171  }
1172 
1173  if (ctx->intra_refresh) {
1174  h264->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1175  } else if (avctx->gop_size >= 0) {
1176  h264->idrPeriod = avctx->gop_size;
1177  }
1178 
1179  if (IS_CBR(cc->rcParams.rateControlMode)) {
1180  h264->outputBufferingPeriodSEI = 1;
1181  }
1182 
1183  h264->outputPictureTimingSEI = 1;
1184 
1185  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1186  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1187  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1188  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1189  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1190  }
1191 
1192  if (ctx->flags & NVENC_LOSSLESS) {
1193  h264->qpPrimeYZeroTransformBypassFlag = 1;
1194  } else {
1195  switch(ctx->profile) {
1196  case NV_ENC_H264_PROFILE_BASELINE:
1197  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1198  avctx->profile = FF_PROFILE_H264_BASELINE;
1199  break;
1200  case NV_ENC_H264_PROFILE_MAIN:
1201  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1202  avctx->profile = FF_PROFILE_H264_MAIN;
1203  break;
1204  case NV_ENC_H264_PROFILE_HIGH:
1205  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1206  avctx->profile = FF_PROFILE_H264_HIGH;
1207  break;
1208  case NV_ENC_H264_PROFILE_HIGH_444P:
1209  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1210  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1211  break;
1212  }
1213  }
1214 
1215  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1216  if (IS_YUV444(ctx->data_pix_fmt)) {
1217  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1218  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1219  }
1220 
1221  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1222 
1223  h264->level = ctx->level;
1224 
1225  if (ctx->coder >= 0)
1226  h264->entropyCodingMode = ctx->coder;
1227 
1228 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1229  if (ctx->b_ref_mode >= 0)
1230  h264->useBFramesAsRef = ctx->b_ref_mode;
1231 #endif
1232 
1233 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1234  h264->numRefL0 = avctx->refs;
1235  h264->numRefL1 = avctx->refs;
1236 #endif
1237 
1238  return 0;
1239 }
1240 
1241 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1242 {
1243  NvencContext *ctx = avctx->priv_data;
1244  NV_ENC_CONFIG *cc = &ctx->encode_config;
1245  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1246  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1247 
1248  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1249 
1250  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1251  vui->colourMatrix = AVCOL_SPC_BT470BG;
1252  vui->colourPrimaries = avctx->color_primaries;
1253  vui->transferCharacteristics = avctx->color_trc;
1254  vui->videoFullRangeFlag = 0;
1255  } else {
1256  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1257  vui->colourPrimaries = avctx->color_primaries;
1258  vui->transferCharacteristics = avctx->color_trc;
1259  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1260  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1261  }
1262 
1263  vui->colourDescriptionPresentFlag =
1264  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1265 
1266  vui->videoSignalTypePresentFlag =
1267  (vui->colourDescriptionPresentFlag
1268  || vui->videoFormat != 5
1269  || vui->videoFullRangeFlag != 0);
1270 
1271  hevc->sliceMode = 3;
1272  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1273 
1274  if (ctx->intra_refresh) {
1275  hevc->enableIntraRefresh = 1;
1276  hevc->intraRefreshPeriod = avctx->gop_size;
1277  hevc->intraRefreshCnt = avctx->gop_size - 1;
1278 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1279  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1280 #endif
1281  }
1282 
1283 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1284  if (ctx->constrained_encoding)
1285  hevc->enableConstrainedEncoding = 1;
1286 #endif
1287 
1288  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1289  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1290  hevc->outputAUD = ctx->aud;
1291 
1292  if (ctx->dpb_size >= 0) {
1293  /* 0 means "let the hardware decide" */
1294  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1295  }
1296 
1297  if (ctx->intra_refresh) {
1298  hevc->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1299  } else if (avctx->gop_size >= 0) {
1300  hevc->idrPeriod = avctx->gop_size;
1301  }
1302 
1303  if (IS_CBR(cc->rcParams.rateControlMode)) {
1304  hevc->outputBufferingPeriodSEI = 1;
1305  }
1306 
1307  hevc->outputPictureTimingSEI = 1;
1308 
1309  switch (ctx->profile) {
1310  case NV_ENC_HEVC_PROFILE_MAIN:
1311  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1312  avctx->profile = FF_PROFILE_HEVC_MAIN;
1313  break;
1314  case NV_ENC_HEVC_PROFILE_MAIN_10:
1315  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1316  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1317  break;
1318  case NV_ENC_HEVC_PROFILE_REXT:
1319  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1320  avctx->profile = FF_PROFILE_HEVC_REXT;
1321  break;
1322  }
1323 
1324  // force setting profile as main10 if input is 10 bit
1325  if (IS_10BIT(ctx->data_pix_fmt)) {
1326  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1327  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1328  }
1329 
1330  // force setting profile as rext if input is yuv444
1331  if (IS_YUV444(ctx->data_pix_fmt)) {
1332  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1333  avctx->profile = FF_PROFILE_HEVC_REXT;
1334  }
1335 
1336  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1337 
1338  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1339 
1340  hevc->level = ctx->level;
1341 
1342  hevc->tier = ctx->tier;
1343 
1344 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1345  if (ctx->b_ref_mode >= 0)
1346  hevc->useBFramesAsRef = ctx->b_ref_mode;
1347 #endif
1348 
1349 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1350  hevc->numRefL0 = avctx->refs;
1351  hevc->numRefL1 = avctx->refs;
1352 #endif
1353 
1354  return 0;
1355 }
1356 
1357 #if CONFIG_AV1_NVENC_ENCODER
1358 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1359 {
1360  NvencContext *ctx = avctx->priv_data;
1361  NV_ENC_CONFIG *cc = &ctx->encode_config;
1362  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1363 
1364  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1365 
1366  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1367  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1368  av1->colorPrimaries = avctx->color_primaries;
1369  av1->transferCharacteristics = avctx->color_trc;
1370  av1->colorRange = 0;
1371  } else {
1372  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1373  av1->colorPrimaries = avctx->color_primaries;
1374  av1->transferCharacteristics = avctx->color_trc;
1375  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1376  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1377  }
1378 
1379  if (IS_YUV444(ctx->data_pix_fmt)) {
1380  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1381  return AVERROR(ENOTSUP);
1382  } else {
1383  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1384  avctx->profile = FF_PROFILE_AV1_MAIN;
1385  }
1386 
1387  if (ctx->dpb_size >= 0) {
1388  /* 0 means "let the hardware decide" */
1389  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1390  }
1391 
1392  if (ctx->intra_refresh) {
1393  av1->enableIntraRefresh = 1;
1394  av1->intraRefreshPeriod = avctx->gop_size;
1395  av1->intraRefreshCnt = avctx->gop_size - 1;
1396 
1397  av1->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1398  } else if (avctx->gop_size >= 0) {
1399  av1->idrPeriod = avctx->gop_size;
1400  }
1401 
1402  if (IS_CBR(cc->rcParams.rateControlMode)) {
1403  av1->enableBitstreamPadding = 1;
1404  }
1405 
1406  if (ctx->tile_cols >= 0)
1407  av1->numTileColumns = ctx->tile_cols;
1408  if (ctx->tile_rows >= 0)
1409  av1->numTileRows = ctx->tile_rows;
1410 
1411  av1->outputAnnexBFormat = 0;
1412 
1413  av1->level = ctx->level;
1414  av1->tier = ctx->tier;
1415 
1416  av1->enableTimingInfo = ctx->timing_info;
1417 
1418  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1419  av1->disableSeqHdr = 0;
1420  av1->repeatSeqHdr = 1;
1421 
1422  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1423 
1424  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1425  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1426 
1427  if (ctx->b_ref_mode >= 0)
1428  av1->useBFramesAsRef = ctx->b_ref_mode;
1429 
1430  av1->numFwdRefs = avctx->refs;
1431  av1->numBwdRefs = avctx->refs;
1432 
1433  return 0;
1434 }
1435 #endif
1436 
1437 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1438 {
1439  switch (avctx->codec->id) {
1440  case AV_CODEC_ID_H264:
1441  return nvenc_setup_h264_config(avctx);
1442  case AV_CODEC_ID_HEVC:
1443  return nvenc_setup_hevc_config(avctx);
1444 #if CONFIG_AV1_NVENC_ENCODER
1445  case AV_CODEC_ID_AV1:
1446  return nvenc_setup_av1_config(avctx);
1447 #endif
1448  /* Earlier switch/case will return if unknown codec is passed. */
1449  }
1450 
1451  return 0;
1452 }
1453 
1454 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1455  int sw, sh;
1456 
1457  sw = avctx->width;
1458  sh = avctx->height;
1459 
1460 #if CONFIG_AV1_NVENC_ENCODER
1461  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1462  /* For AV1 we actually need to calculate the render width/height, not the dar */
1463  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1464  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1465  {
1466  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1467  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1468  } else {
1469  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1470  }
1471  }
1472 
1473  *dw = sw;
1474  *dh = sh;
1475  return;
1476  }
1477 #endif
1478 
1479  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1480  sw *= avctx->sample_aspect_ratio.num;
1481  sh *= avctx->sample_aspect_ratio.den;
1482  }
1483 
1484  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1485 }
1486 
1487 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1488 {
1489  NvencContext *ctx = avctx->priv_data;
1490  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1491  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1492 
1493  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1494  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1495  AVCPBProperties *cpb_props;
1496  int res = 0;
1497  int dw, dh;
1498 
1499  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1500  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1501 
1502  ctx->init_encode_params.encodeHeight = avctx->height;
1503  ctx->init_encode_params.encodeWidth = avctx->width;
1504 
1505  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1506 
1507  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1508  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1509 
1510 #ifdef NVENC_HAVE_NEW_PRESETS
1511  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1512 
1513  if (ctx->flags & NVENC_LOSSLESS)
1514  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1515  else if (ctx->flags & NVENC_LOWLATENCY)
1516  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1517 
1518  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1519  ctx->init_encode_params.encodeGUID,
1520  ctx->init_encode_params.presetGUID,
1521  ctx->init_encode_params.tuningInfo,
1522  &preset_config);
1523 #else
1524  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1525  ctx->init_encode_params.encodeGUID,
1526  ctx->init_encode_params.presetGUID,
1527  &preset_config);
1528 #endif
1529  if (nv_status != NV_ENC_SUCCESS)
1530  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1531 
1532  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1533 
1534  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1535 
1536  compute_dar(avctx, &dw, &dh);
1537  ctx->init_encode_params.darHeight = dh;
1538  ctx->init_encode_params.darWidth = dw;
1539 
1540  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1541  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1542  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1543  } else {
1544  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1545  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1546  }
1547 
1548  ctx->init_encode_params.enableEncodeAsync = 0;
1549  ctx->init_encode_params.enablePTD = 1;
1550 
1551 #ifdef NVENC_HAVE_NEW_PRESETS
1552  /* If lookahead isn't set from CLI, use value from preset.
1553  * P6 & P7 presets may enable lookahead for better quality.
1554  * */
1555  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1556  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1557 #endif
1558 
1559  if (ctx->weighted_pred == 1)
1560  ctx->init_encode_params.enableWeightedPrediction = 1;
1561 
1562  if (ctx->bluray_compat) {
1563  ctx->aud = 1;
1564  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1565  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1566  switch (avctx->codec->id) {
1567  case AV_CODEC_ID_H264:
1568  /* maximum level depends on used resolution */
1569  break;
1570  case AV_CODEC_ID_HEVC:
1571  ctx->level = NV_ENC_LEVEL_HEVC_51;
1572  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1573  break;
1574  }
1575  }
1576 
1577  if (avctx->gop_size > 0) {
1578  if (avctx->max_b_frames >= 0) {
1579  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1580  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1581  }
1582 
1583  ctx->encode_config.gopLength = avctx->gop_size;
1584  } else if (avctx->gop_size == 0) {
1585  ctx->encode_config.frameIntervalP = 0;
1586  ctx->encode_config.gopLength = 1;
1587  }
1588 
1589  /* force to enable intra refresh */
1590  if(ctx->single_slice_intra_refresh)
1591  ctx->intra_refresh = 1;
1592 
1593  if (ctx->intra_refresh)
1594  ctx->encode_config.gopLength = NVENC_INFINITE_GOPLENGTH;
1595 
1596  nvenc_recalc_surfaces(avctx);
1597 
1598  nvenc_setup_rate_control(avctx);
1599 
1600  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1601  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1602  } else {
1603  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1604  }
1605 
1606  res = nvenc_setup_codec_config(avctx);
1607  if (res)
1608  return res;
1609 
1610  res = nvenc_push_context(avctx);
1611  if (res < 0)
1612  return res;
1613 
1614  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1615  if (nv_status != NV_ENC_SUCCESS) {
1616  nvenc_pop_context(avctx);
1617  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1618  }
1619 
1620 #ifdef NVENC_HAVE_CUSTREAM_PTR
1621  if (ctx->cu_context) {
1622  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1623  if (nv_status != NV_ENC_SUCCESS) {
1624  nvenc_pop_context(avctx);
1625  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1626  }
1627  }
1628 #endif
1629 
1630  res = nvenc_pop_context(avctx);
1631  if (res < 0)
1632  return res;
1633 
1634  if (ctx->encode_config.frameIntervalP > 1)
1635  avctx->has_b_frames = 2;
1636 
1637  if (ctx->encode_config.rcParams.averageBitRate > 0)
1638  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1639 
1640  cpb_props = ff_add_cpb_side_data(avctx);
1641  if (!cpb_props)
1642  return AVERROR(ENOMEM);
1643  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1644  cpb_props->avg_bitrate = avctx->bit_rate;
1645  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1646 
1647  return 0;
1648 }
1649 
1650 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1651 {
1652  switch (pix_fmt) {
1653  case AV_PIX_FMT_YUV420P:
1654  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1655  case AV_PIX_FMT_NV12:
1656  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1657  case AV_PIX_FMT_P010:
1658  case AV_PIX_FMT_P016:
1659  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1660  case AV_PIX_FMT_GBRP:
1661  case AV_PIX_FMT_YUV444P:
1662  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1663  case AV_PIX_FMT_GBRP16:
1664  case AV_PIX_FMT_YUV444P16:
1665  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1666  case AV_PIX_FMT_0RGB32:
1667  case AV_PIX_FMT_RGB32:
1668  return NV_ENC_BUFFER_FORMAT_ARGB;
1669  case AV_PIX_FMT_0BGR32:
1670  case AV_PIX_FMT_BGR32:
1671  return NV_ENC_BUFFER_FORMAT_ABGR;
1672  case AV_PIX_FMT_X2RGB10:
1673  return NV_ENC_BUFFER_FORMAT_ARGB10;
1674  case AV_PIX_FMT_X2BGR10:
1675  return NV_ENC_BUFFER_FORMAT_ABGR10;
1676  default:
1677  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1678  }
1679 }
1680 
1681 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1682 {
1683  NvencContext *ctx = avctx->priv_data;
1684  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1685  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1686  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1687 
1688  NVENCSTATUS nv_status;
1689  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1690  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1691 
1692  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1693  ctx->surfaces[idx].in_ref = av_frame_alloc();
1694  if (!ctx->surfaces[idx].in_ref)
1695  return AVERROR(ENOMEM);
1696  } else {
1697  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1698 
1699  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1700  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1701  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1702  av_get_pix_fmt_name(ctx->data_pix_fmt));
1703  return AVERROR(EINVAL);
1704  }
1705 
1706  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1707  allocSurf.width = avctx->width;
1708  allocSurf.height = avctx->height;
1709  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1710 
1711  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1712  if (nv_status != NV_ENC_SUCCESS) {
1713  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1714  }
1715 
1716  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1717  ctx->surfaces[idx].width = allocSurf.width;
1718  ctx->surfaces[idx].height = allocSurf.height;
1719  }
1720 
1721  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1722  if (nv_status != NV_ENC_SUCCESS) {
1723  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1724  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1725  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1726  av_frame_free(&ctx->surfaces[idx].in_ref);
1727  return err;
1728  }
1729 
1730  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1731 
1732  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1733 
1734  return 0;
1735 }
1736 
1737 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1738 {
1739  NvencContext *ctx = avctx->priv_data;
1740  int i, res = 0, res2;
1741 
1742  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1743  if (!ctx->surfaces)
1744  return AVERROR(ENOMEM);
1745 
1746  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces, sizeof(int64_t), 0);
1747  if (!ctx->timestamp_list)
1748  return AVERROR(ENOMEM);
1749 
1750  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1751  if (!ctx->unused_surface_queue)
1752  return AVERROR(ENOMEM);
1753 
1754  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1755  if (!ctx->output_surface_queue)
1756  return AVERROR(ENOMEM);
1757  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1758  if (!ctx->output_surface_ready_queue)
1759  return AVERROR(ENOMEM);
1760 
1761  res = nvenc_push_context(avctx);
1762  if (res < 0)
1763  return res;
1764 
1765  for (i = 0; i < ctx->nb_surfaces; i++) {
1766  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1767  goto fail;
1768  }
1769 
1770 fail:
1771  res2 = nvenc_pop_context(avctx);
1772  if (res2 < 0)
1773  return res2;
1774 
1775  return res;
1776 }
1777 
1778 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1779 {
1780  NvencContext *ctx = avctx->priv_data;
1781  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1782  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1783 
1784  NVENCSTATUS nv_status;
1785  uint32_t outSize = 0;
1786  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
1787 
1788  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1789  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1790 
1791  payload.spsppsBuffer = tmpHeader;
1792  payload.inBufferSize = sizeof(tmpHeader);
1793  payload.outSPSPPSPayloadSize = &outSize;
1794 
1795  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1796  if (nv_status != NV_ENC_SUCCESS) {
1797  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1798  }
1799 
1800  avctx->extradata_size = outSize;
1801  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1802 
1803  if (!avctx->extradata) {
1804  return AVERROR(ENOMEM);
1805  }
1806 
1807  memcpy(avctx->extradata, tmpHeader, outSize);
1808 
1809  return 0;
1810 }
1811 
1812 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1813 {
1814  NvencContext *ctx = avctx->priv_data;
1815  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1816  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1817  int i, res;
1818 
1819  /* the encoder has to be flushed before it can be closed */
1820  if (ctx->nvencoder) {
1821  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1822  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1823 
1824  res = nvenc_push_context(avctx);
1825  if (res < 0)
1826  return res;
1827 
1828  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1829  }
1830 
1831  av_fifo_freep2(&ctx->timestamp_list);
1832  av_fifo_freep2(&ctx->output_surface_ready_queue);
1833  av_fifo_freep2(&ctx->output_surface_queue);
1834  av_fifo_freep2(&ctx->unused_surface_queue);
1835 
1836  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1837  for (i = 0; i < ctx->nb_registered_frames; i++) {
1838  if (ctx->registered_frames[i].mapped)
1839  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1840  if (ctx->registered_frames[i].regptr)
1841  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1842  }
1843  ctx->nb_registered_frames = 0;
1844  }
1845 
1846  if (ctx->surfaces) {
1847  for (i = 0; i < ctx->nb_surfaces; ++i) {
1848  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1849  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1850  av_frame_free(&ctx->surfaces[i].in_ref);
1851  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1852  }
1853  }
1854  av_freep(&ctx->surfaces);
1855  ctx->nb_surfaces = 0;
1856 
1857  av_frame_free(&ctx->frame);
1858 
1859  av_freep(&ctx->sei_data);
1860 
1861  if (ctx->nvencoder) {
1862  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1863 
1864  res = nvenc_pop_context(avctx);
1865  if (res < 0)
1866  return res;
1867  }
1868  ctx->nvencoder = NULL;
1869 
1870  if (ctx->cu_context_internal)
1871  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1872  ctx->cu_context = ctx->cu_context_internal = NULL;
1873 
1874 #if CONFIG_D3D11VA
1875  if (ctx->d3d11_device) {
1876  ID3D11Device_Release(ctx->d3d11_device);
1877  ctx->d3d11_device = NULL;
1878  }
1879 #endif
1880 
1881  nvenc_free_functions(&dl_fn->nvenc_dl);
1882  cuda_free_functions(&dl_fn->cuda_dl);
1883 
1884  dl_fn->nvenc_device_count = 0;
1885 
1886  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1887 
1888  return 0;
1889 }
1890 
1891 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1892 {
1893  NvencContext *ctx = avctx->priv_data;
1894  int ret;
1895 
1896  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1897  AVHWFramesContext *frames_ctx;
1898  if (!avctx->hw_frames_ctx) {
1899  av_log(avctx, AV_LOG_ERROR,
1900  "hw_frames_ctx must be set when using GPU frames as input\n");
1901  return AVERROR(EINVAL);
1902  }
1903  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1904  if (frames_ctx->format != avctx->pix_fmt) {
1905  av_log(avctx, AV_LOG_ERROR,
1906  "hw_frames_ctx must match the GPU frame type\n");
1907  return AVERROR(EINVAL);
1908  }
1909  ctx->data_pix_fmt = frames_ctx->sw_format;
1910  } else {
1911  ctx->data_pix_fmt = avctx->pix_fmt;
1912  }
1913 
1914  ctx->frame = av_frame_alloc();
1915  if (!ctx->frame)
1916  return AVERROR(ENOMEM);
1917 
1918  if ((ret = nvenc_load_libraries(avctx)) < 0)
1919  return ret;
1920 
1921  if ((ret = nvenc_setup_device(avctx)) < 0)
1922  return ret;
1923 
1924  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1925  return ret;
1926 
1927  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1928  return ret;
1929 
1930  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1931  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1932  return ret;
1933  }
1934 
1935  return 0;
1936 }
1937 
1938 static NvencSurface *get_free_frame(NvencContext *ctx)
1939 {
1940  NvencSurface *tmp_surf;
1941 
1942  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
1943  // queue empty
1944  return NULL;
1945 
1946  return tmp_surf;
1947 }
1948 
1949 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1950  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1951 {
1952  int dst_linesize[4] = {
1953  lock_buffer_params->pitch,
1954  lock_buffer_params->pitch,
1955  lock_buffer_params->pitch,
1956  lock_buffer_params->pitch
1957  };
1958  uint8_t *dst_data[4];
1959  int ret;
1960 
1961  if (frame->format == AV_PIX_FMT_YUV420P)
1962  dst_linesize[1] = dst_linesize[2] >>= 1;
1963 
1964  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1965  lock_buffer_params->bufferDataPtr, dst_linesize);
1966  if (ret < 0)
1967  return ret;
1968 
1969  if (frame->format == AV_PIX_FMT_YUV420P)
1970  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1971 
1972  av_image_copy(dst_data, dst_linesize,
1973  (const uint8_t**)frame->data, frame->linesize, frame->format,
1974  avctx->width, avctx->height);
1975 
1976  return 0;
1977 }
1978 
1979 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1980 {
1981  NvencContext *ctx = avctx->priv_data;
1982  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1983  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1984  NVENCSTATUS nv_status;
1985 
1986  int i, first_round;
1987 
1988  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1989  for (first_round = 1; first_round >= 0; first_round--) {
1990  for (i = 0; i < ctx->nb_registered_frames; i++) {
1991  if (!ctx->registered_frames[i].mapped) {
1992  if (ctx->registered_frames[i].regptr) {
1993  if (first_round)
1994  continue;
1995  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1996  if (nv_status != NV_ENC_SUCCESS)
1997  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1998  ctx->registered_frames[i].ptr = NULL;
1999  ctx->registered_frames[i].regptr = NULL;
2000  }
2001  return i;
2002  }
2003  }
2004  }
2005  } else {
2006  return ctx->nb_registered_frames++;
2007  }
2008 
2009  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2010  return AVERROR(ENOMEM);
2011 }
2012 
2013 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
2014 {
2015  NvencContext *ctx = avctx->priv_data;
2016  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2017  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2018 
2019  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2020  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2021  int i, idx, ret;
2022 
2023  for (i = 0; i < ctx->nb_registered_frames; i++) {
2024  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2025  return i;
2026  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2027  return i;
2028  }
2029 
2030  idx = nvenc_find_free_reg_resource(avctx);
2031  if (idx < 0)
2032  return idx;
2033 
2034  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2035  reg.width = frames_ctx->width;
2036  reg.height = frames_ctx->height;
2037  reg.pitch = frame->linesize[0];
2038  reg.resourceToRegister = frame->data[0];
2039 
2040  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2041  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2042  }
2043  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2044  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2045  reg.subResourceIndex = (intptr_t)frame->data[1];
2046  }
2047 
2048  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2049  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2050  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2051  av_get_pix_fmt_name(frames_ctx->sw_format));
2052  return AVERROR(EINVAL);
2053  }
2054 
2055  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2056  if (ret != NV_ENC_SUCCESS) {
2057  nvenc_print_error(avctx, ret, "Error registering an input resource");
2058  return AVERROR_UNKNOWN;
2059  }
2060 
2061  ctx->registered_frames[idx].ptr = frame->data[0];
2062  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2063  ctx->registered_frames[idx].regptr = reg.registeredResource;
2064  return idx;
2065 }
2066 
2067 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
2068  NvencSurface *nvenc_frame)
2069 {
2070  NvencContext *ctx = avctx->priv_data;
2071  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2072  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2073 
2074  int res;
2075  NVENCSTATUS nv_status;
2076 
2077  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2078  int reg_idx = nvenc_register_frame(avctx, frame);
2079  if (reg_idx < 0) {
2080  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2081  return reg_idx;
2082  }
2083 
2084  res = av_frame_ref(nvenc_frame->in_ref, frame);
2085  if (res < 0)
2086  return res;
2087 
2088  if (!ctx->registered_frames[reg_idx].mapped) {
2089  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2090  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2091  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2092  if (nv_status != NV_ENC_SUCCESS) {
2093  av_frame_unref(nvenc_frame->in_ref);
2094  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2095  }
2096  }
2097 
2098  ctx->registered_frames[reg_idx].mapped += 1;
2099 
2100  nvenc_frame->reg_idx = reg_idx;
2101  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2102  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2103  nvenc_frame->pitch = frame->linesize[0];
2104 
2105  return 0;
2106  } else {
2107  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2108 
2109  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2110  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2111 
2112  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2113  if (nv_status != NV_ENC_SUCCESS) {
2114  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2115  }
2116 
2117  nvenc_frame->pitch = lockBufferParams.pitch;
2118  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2119 
2120  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2121  if (nv_status != NV_ENC_SUCCESS) {
2122  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2123  }
2124 
2125  return res;
2126  }
2127 }
2128 
2129 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
2130  NV_ENC_PIC_PARAMS *params,
2131  NV_ENC_SEI_PAYLOAD *sei_data,
2132  int sei_count)
2133 {
2134  NvencContext *ctx = avctx->priv_data;
2135 
2136  switch (avctx->codec->id) {
2137  case AV_CODEC_ID_H264:
2138  params->codecPicParams.h264PicParams.sliceMode =
2139  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2140  params->codecPicParams.h264PicParams.sliceModeData =
2141  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2142  if (sei_count > 0) {
2143  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2144  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2145  }
2146 
2147  break;
2148  case AV_CODEC_ID_HEVC:
2149  params->codecPicParams.hevcPicParams.sliceMode =
2150  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2151  params->codecPicParams.hevcPicParams.sliceModeData =
2152  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2153  if (sei_count > 0) {
2154  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2155  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2156  }
2157 
2158  break;
2159 #if CONFIG_AV1_NVENC_ENCODER
2160  case AV_CODEC_ID_AV1:
2161  params->codecPicParams.av1PicParams.numTileColumns =
2162  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2163  params->codecPicParams.av1PicParams.numTileRows =
2164  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2165  if (sei_count > 0) {
2166  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2167  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2168  }
2169 
2170  break;
2171 #endif
2172  }
2173 }
2174 
2175 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2176 {
2177  av_fifo_write(queue, &timestamp, 1);
2178 }
2179 
2180 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2181 {
2182  int64_t timestamp = AV_NOPTS_VALUE;
2183  // The following call might fail if the queue is empty.
2184  av_fifo_read(queue, &timestamp, 1);
2185 
2186  return timestamp;
2187 }
2188 
2189 static int nvenc_set_timestamp(AVCodecContext *avctx,
2190  NV_ENC_LOCK_BITSTREAM *params,
2191  AVPacket *pkt)
2192 {
2193  NvencContext *ctx = avctx->priv_data;
2194 
2195  pkt->pts = params->outputTimeStamp;
2196 
2197  if (avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER) {
2198  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2199  pkt->dts -= FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
2200  } else {
2201  pkt->dts = pkt->pts;
2202  }
2203 
2204  return 0;
2205 }
2206 
2207 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2208 {
2209  NvencContext *ctx = avctx->priv_data;
2210  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2211  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2212 
2213  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2214  NVENCSTATUS nv_status;
2215  int res = 0;
2216 
2217  enum AVPictureType pict_type;
2218 
2219  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2220 
2221  lock_params.doNotWait = 0;
2222  lock_params.outputBitstream = tmpoutsurf->output_surface;
2223 
2224  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2225  if (nv_status != NV_ENC_SUCCESS) {
2226  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2227  goto error;
2228  }
2229 
2230  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2231 
2232  if (res < 0) {
2233  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2234  goto error;
2235  }
2236 
2237  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2238 
2239  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2240  if (nv_status != NV_ENC_SUCCESS) {
2241  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2242  goto error;
2243  }
2244 
2245 
2246  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2247  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2248  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2249  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2250  if (nv_status != NV_ENC_SUCCESS) {
2251  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2252  goto error;
2253  }
2254  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2255  res = AVERROR_BUG;
2256  goto error;
2257  }
2258 
2259  av_frame_unref(tmpoutsurf->in_ref);
2260 
2261  tmpoutsurf->input_surface = NULL;
2262  }
2263 
2264  switch (lock_params.pictureType) {
2265  case NV_ENC_PIC_TYPE_IDR:
2266  pkt->flags |= AV_PKT_FLAG_KEY;
2267  case NV_ENC_PIC_TYPE_I:
2268  pict_type = AV_PICTURE_TYPE_I;
2269  break;
2270  case NV_ENC_PIC_TYPE_P:
2271  pict_type = AV_PICTURE_TYPE_P;
2272  break;
2273  case NV_ENC_PIC_TYPE_B:
2274  pict_type = AV_PICTURE_TYPE_B;
2275  break;
2276  case NV_ENC_PIC_TYPE_BI:
2277  pict_type = AV_PICTURE_TYPE_BI;
2278  break;
2279  default:
2280  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2281  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2282  res = AVERROR_EXTERNAL;
2283  goto error;
2284  }
2285 
2286  ff_side_data_set_encoder_stats(pkt,
2287  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2288 
2289  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2290  if (res < 0)
2291  goto error2;
2292 
2293  return 0;
2294 
2295 error:
2296  timestamp_queue_dequeue(ctx->timestamp_list);
2297 
2298 error2:
2299  return res;
2300 }
2301 
2302 static int output_ready(AVCodecContext *avctx, int flush)
2303 {
2304  NvencContext *ctx = avctx->priv_data;
2305  int nb_ready, nb_pending;
2306 
2307  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2308  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2309  if (flush)
2310  return nb_ready > 0;
2311  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2312 }
2313 
2314 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2315 {
2316  NvencContext *ctx = avctx->priv_data;
2317  int sei_count = 0;
2318  int i, res;
2319 
2320  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2321  void *a53_data = NULL;
2322  size_t a53_size = 0;
2323 
2324  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2325  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2326  }
2327 
2328  if (a53_data) {
2329  void *tmp = av_fast_realloc(ctx->sei_data,
2330  &ctx->sei_data_size,
2331  (sei_count + 1) * sizeof(*ctx->sei_data));
2332  if (!tmp) {
2333  av_free(a53_data);
2334  res = AVERROR(ENOMEM);
2335  goto error;
2336  } else {
2337  ctx->sei_data = tmp;
2338  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2339  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2340 
2341 #if CONFIG_AV1_NVENC_ENCODER
2342  if (avctx->codec->id == AV_CODEC_ID_AV1)
2343  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2344  else
2345 #endif
2346  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2347 
2348  sei_count++;
2349  }
2350  }
2351  }
2352 
2353  if (ctx->s12m_tc && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2354  void *tc_data = NULL;
2355  size_t tc_size = 0;
2356 
2357  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2358  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2359  }
2360 
2361  if (tc_data) {
2362  void *tmp = av_fast_realloc(ctx->sei_data,
2363  &ctx->sei_data_size,
2364  (sei_count + 1) * sizeof(*ctx->sei_data));
2365  if (!tmp) {
2366  av_free(tc_data);
2367  res = AVERROR(ENOMEM);
2368  goto error;
2369  } else {
2370  ctx->sei_data = tmp;
2371  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2372  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2373 
2374 #if CONFIG_AV1_NVENC_ENCODER
2375  if (avctx->codec->id == AV_CODEC_ID_AV1)
2376  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2377  else
2378 #endif
2379  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2380 
2381  sei_count++;
2382  }
2383  }
2384  }
2385 
2386  if (!ctx->udu_sei)
2387  return sei_count;
2388 
2389  for (i = 0; i < frame->nb_side_data; i++) {
2390  AVFrameSideData *side_data = frame->side_data[i];
2391  void *tmp;
2392 
2393  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2394  continue;
2395 
2396  tmp = av_fast_realloc(ctx->sei_data,
2397  &ctx->sei_data_size,
2398  (sei_count + 1) * sizeof(*ctx->sei_data));
2399  if (!tmp) {
2400  res = AVERROR(ENOMEM);
2401  goto error;
2402  } else {
2403  ctx->sei_data = tmp;
2404  ctx->sei_data[sei_count].payloadSize = side_data->size;
2405  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2406  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2407 
2408  if (!ctx->sei_data[sei_count].payload) {
2409  res = AVERROR(ENOMEM);
2410  goto error;
2411  }
2412 
2413  sei_count++;
2414  }
2415  }
2416 
2417  return sei_count;
2418 
2419 error:
2420  for (i = 0; i < sei_count; i++)
2421  av_freep(&(ctx->sei_data[i].payload));
2422 
2423  return res;
2424 }
2425 
2426 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2427 {
2428  NvencContext *ctx = avctx->priv_data;
2429  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2430  NVENCSTATUS ret;
2431 
2432  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2433  int needs_reconfig = 0;
2434  int needs_encode_config = 0;
2435  int reconfig_bitrate = 0, reconfig_dar = 0;
2436  int dw, dh;
2437 
2438  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2439  params.reInitEncodeParams = ctx->init_encode_params;
2440 
2441  compute_dar(avctx, &dw, &dh);
2442  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2443  av_log(avctx, AV_LOG_VERBOSE,
2444  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2445  ctx->init_encode_params.darWidth,
2446  ctx->init_encode_params.darHeight, dw, dh);
2447 
2448  params.reInitEncodeParams.darHeight = dh;
2449  params.reInitEncodeParams.darWidth = dw;
2450 
2451  needs_reconfig = 1;
2452  reconfig_dar = 1;
2453  }
2454 
2455  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2456  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2457  av_log(avctx, AV_LOG_VERBOSE,
2458  "avg bitrate change: %d -> %d\n",
2459  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2460  (uint32_t)avctx->bit_rate);
2461 
2462  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2463  reconfig_bitrate = 1;
2464  }
2465 
2466  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2467  av_log(avctx, AV_LOG_VERBOSE,
2468  "max bitrate change: %d -> %d\n",
2469  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2470  (uint32_t)avctx->rc_max_rate);
2471 
2472  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2473  reconfig_bitrate = 1;
2474  }
2475 
2476  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2477  av_log(avctx, AV_LOG_VERBOSE,
2478  "vbv buffer size change: %d -> %d\n",
2479  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2480  avctx->rc_buffer_size);
2481 
2482  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2483  reconfig_bitrate = 1;
2484  }
2485 
2486  if (reconfig_bitrate) {
2487  params.resetEncoder = 1;
2488  params.forceIDR = 1;
2489 
2490  needs_encode_config = 1;
2491  needs_reconfig = 1;
2492  }
2493  }
2494 
2495  if (!needs_encode_config)
2496  params.reInitEncodeParams.encodeConfig = NULL;
2497 
2498  if (needs_reconfig) {
2499  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2500  if (ret != NV_ENC_SUCCESS) {
2501  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2502  } else {
2503  if (reconfig_dar) {
2504  ctx->init_encode_params.darHeight = dh;
2505  ctx->init_encode_params.darWidth = dw;
2506  }
2507 
2508  if (reconfig_bitrate) {
2509  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2510  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2511  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2512  }
2513 
2514  }
2515  }
2516 }
2517 
2518 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2519 {
2520  NVENCSTATUS nv_status;
2521  NvencSurface *tmp_out_surf, *in_surf;
2522  int res, res2;
2523  int sei_count = 0;
2524  int i;
2525 
2526  NvencContext *ctx = avctx->priv_data;
2527  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2528  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2529 
2530  NV_ENC_PIC_PARAMS pic_params = { 0 };
2531  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2532 
2533  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2534  return AVERROR(EINVAL);
2535 
2536  if (frame && frame->buf[0]) {
2537  in_surf = get_free_frame(ctx);
2538  if (!in_surf)
2539  return AVERROR(EAGAIN);
2540 
2541  res = nvenc_push_context(avctx);
2542  if (res < 0)
2543  return res;
2544 
2545  reconfig_encoder(avctx, frame);
2546 
2547  res = nvenc_upload_frame(avctx, frame, in_surf);
2548 
2549  res2 = nvenc_pop_context(avctx);
2550  if (res2 < 0)
2551  return res2;
2552 
2553  if (res)
2554  return res;
2555 
2556  pic_params.inputBuffer = in_surf->input_surface;
2557  pic_params.bufferFmt = in_surf->format;
2558  pic_params.inputWidth = in_surf->width;
2559  pic_params.inputHeight = in_surf->height;
2560  pic_params.inputPitch = in_surf->pitch;
2561  pic_params.outputBitstream = in_surf->output_surface;
2562 
2563  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2564  if (frame->top_field_first)
2565  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2566  else
2567  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2568  } else {
2569  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2570  }
2571 
2572  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2573  pic_params.encodePicFlags =
2574  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2575  } else {
2576  pic_params.encodePicFlags = 0;
2577  }
2578 
2579  pic_params.inputTimeStamp = frame->pts;
2580 
2581  if (ctx->extra_sei) {
2582  res = prepare_sei_data_array(avctx, frame);
2583  if (res < 0)
2584  return res;
2585  sei_count = res;
2586  }
2587 
2588  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2589  } else {
2590  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2591  }
2592 
2593  res = nvenc_push_context(avctx);
2594  if (res < 0)
2595  return res;
2596 
2597  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2598 
2599  for (i = 0; i < sei_count; i++)
2600  av_freep(&(ctx->sei_data[i].payload));
2601 
2602  res = nvenc_pop_context(avctx);
2603  if (res < 0)
2604  return res;
2605 
2606  if (nv_status != NV_ENC_SUCCESS &&
2607  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2608  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2609 
2610  if (frame && frame->buf[0]) {
2611  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
2612 
2613  if (avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)
2614  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2615  }
2616 
2617  /* all the pending buffers are now ready for output */
2618  if (nv_status == NV_ENC_SUCCESS) {
2619  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
2620  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2621  }
2622 
2623  return 0;
2624 }
2625 
2626 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
2627 {
2628  NvencSurface *tmp_out_surf;
2629  int res, res2;
2630 
2631  NvencContext *ctx = avctx->priv_data;
2632 
2633  AVFrame *frame = ctx->frame;
2634 
2635  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2636  return AVERROR(EINVAL);
2637 
2638  if (!frame->buf[0]) {
2639  res = ff_encode_get_frame(avctx, frame);
2640  if (res < 0 && res != AVERROR_EOF)
2641  return res;
2642  }
2643 
2644  res = nvenc_send_frame(avctx, frame);
2645  if (res < 0) {
2646  if (res != AVERROR(EAGAIN))
2647  return res;
2648  } else
2649  av_frame_unref(frame);
2650 
2651  if (output_ready(avctx, avctx->internal->draining)) {
2652  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2653 
2654  res = nvenc_push_context(avctx);
2655  if (res < 0)
2656  return res;
2657 
2658  res = process_output_surface(avctx, pkt, tmp_out_surf);
2659 
2660  res2 = nvenc_pop_context(avctx);
2661  if (res2 < 0)
2662  return res2;
2663 
2664  if (res)
2665  return res;
2666 
2667  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
2668  } else if (avctx->internal->draining) {
2669  return AVERROR_EOF;
2670  } else {
2671  return AVERROR(EAGAIN);
2672  }
2673 
2674  return 0;
2675 }
2676 
2677 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
2678 {
2679  NvencContext *ctx = avctx->priv_data;
2680 
2681  nvenc_send_frame(avctx, NULL);
2682  av_fifo_reset2(ctx->timestamp_list);
2683 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:31
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1641
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:170
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:253
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:166
level
uint8_t level
Definition: svq3.c:204
av_clip
#define av_clip
Definition: common.h:95
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:975
P3
#define P3
Definition: hevcdsp_template.c:1497
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:691
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:434
GUIDTuple
Definition: nvenc.c:165
NONE
@ NONE
Definition: af_afade.c:56
GUIDTuple::flags
int flags
Definition: nvenc.c:167
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:2858
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:602
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1589
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:335
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2302
NvencContext
Definition: nvenc.h:153
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:83
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:116
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:325
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:968
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2189
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:661
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:374
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:686
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1601
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2426
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:588
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:50
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:777
NvencSurface
Definition: nvenc.h:80
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:145
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1022
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1194
nverr
NVENCSTATUS nverr
Definition: nvenc.c:98
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:145
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:882
PRESET
#define PRESET(name,...)
Definition: nvenc.c:173
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:429
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2677
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:30
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:284
nvenc.h
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:312
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1454
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:1735
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:593
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2067
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:99
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:703
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:815
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:130
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:407
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:420
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:186
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:142
fail
#define fail()
Definition: checkasm.h:134
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
dummy
int dummy
Definition: motion.c:65
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:90
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:947
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:175
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:478
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1593
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1949
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:94
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:229
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:276
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:437
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:104
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:961
pkt
AVPacket * pkt
Definition: movenc.c:59
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:234
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1638
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:500
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:694
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1891
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:505
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:464
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:472
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1334
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:437
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:530
NvencDynLoadFunctions
Definition: nvenc.h:93
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
ctx
AVFormatContext * ctx
Definition: movenc.c:48
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:136
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demuxing_decoding.c:41
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1778
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2175
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1223
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2180
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:96
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:126
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:87
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:82
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1208
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:45
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:134
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:478
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:82
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:966
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:149
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:84
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:982
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:283
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:433
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:448
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1812
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:135
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1639
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:95
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1119
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
convert_header.major
int major
Definition: convert_header.py:23
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:521
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:517
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:100
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:346
FF_PROFILE_AV1_MAIN
#define FF_PROFILE_AV1_MAIN
Definition: avcodec.h:1646
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:94
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:593
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:353
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:384
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:72
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:1062
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1681
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:233
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:586
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2013
AVCodecHWConfigInternal
Definition: hwconfig.h:29
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2626
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:373
nvenc_errors
static const struct @115 nvenc_errors[]
height
#define height
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:432
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:896
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:380
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:333
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:141
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1938
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:679
AVCodec::id
enum AVCodecID id
Definition: codec.h:218
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:358
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:97
convert_header.minor
int minor
Definition: convert_header.py:26
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:269
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:367
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:499
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2207
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:291
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:927
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:131
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:226
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2314
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:487
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:516
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:264
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1933
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:89
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:46
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:571
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:608
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:43
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1650
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:272
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:150
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:510
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1883
NvencSurface::width
int width
Definition: nvenc.h:85
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1487
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:99
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:436
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:147
cuda_check.h
atsc_a53.h
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:130
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2129
AVCodecContext
main external API structure.
Definition: avcodec.h:398
AVCodecContext::codec_descriptor
const AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1756
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:79
NvencSurface::height
int height
Definition: nvenc.h:86
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1187
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1550
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1737
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:710
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:232
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:89
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1979
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1591
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:508
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:143
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:143
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:158
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:98
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts_bsf.c:365
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:670
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:178
packet_internal.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:231
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
av_free
#define av_free(p)
Definition: tableprint_vlc.h:33
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:140
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:998
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: packet.h:351
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:425
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:34
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:661
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:571
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1437
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int
int
Definition: ffmpeg_filter.c:156
hevc_sei.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:768
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1241
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2518
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2778
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:141
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