FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc_sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
31 #include "libavutil/buffer.h"
33 #include "libavutil/hwcontext.h"
34 #include "libavutil/cuda_check.h"
35 #include "libavutil/imgutils.h"
36 #include "libavutil/mem.h"
37 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
39 #include "atsc_a53.h"
40 #include "encode.h"
41 #include "internal.h"
42 #include "packet_internal.h"
43 
44 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
45 
46 #define NVENC_CAP 0x30
47 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
48  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
49  rc == NV_ENC_PARAMS_RC_CBR_HQ)
50 
56  AV_PIX_FMT_P016, // Truncated to 10bits
57  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
65  AV_PIX_FMT_GBRP16, // Truncated to 10bits
67 #if CONFIG_D3D11VA
69 #endif
71 };
72 
74  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
76 #if CONFIG_D3D11VA
77  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
79 #endif
80  NULL,
81 };
82 
83 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
84  pix_fmt == AV_PIX_FMT_P016 || \
85  pix_fmt == AV_PIX_FMT_YUV444P16 || \
86  pix_fmt == AV_PIX_FMT_X2RGB10 || \
87  pix_fmt == AV_PIX_FMT_X2BGR10 || \
88  pix_fmt == AV_PIX_FMT_GBRP16)
89 
90 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
91  pix_fmt == AV_PIX_FMT_YUV444P16 || \
92  pix_fmt == AV_PIX_FMT_GBRP || \
93  pix_fmt == AV_PIX_FMT_GBRP16)
94 
95 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
96  pix_fmt == AV_PIX_FMT_GBRP16)
97 
98 static const struct {
99  NVENCSTATUS nverr;
100  int averr;
101  const char *desc;
102 } nvenc_errors[] = {
103  { NV_ENC_SUCCESS, 0, "success" },
104  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
105  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
106  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
107  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
108  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
109  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
110  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
111  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
112  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
113  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
114  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
115  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
116  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
117  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
118  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
119  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
120  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
121  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
122  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
123  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
124  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
125  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
126  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
127  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
128  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
129 };
130 
131 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
132 {
133  int i;
134  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
135  if (nvenc_errors[i].nverr == err) {
136  if (desc)
137  *desc = nvenc_errors[i].desc;
138  return nvenc_errors[i].averr;
139  }
140  }
141  if (desc)
142  *desc = "unknown error";
143  return AVERROR_UNKNOWN;
144 }
145 
146 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
147  const char *error_string)
148 {
149  const char *desc;
150  const char *details = "(no details)";
151  int ret = nvenc_map_error(err, &desc);
152 
153 #ifdef NVENC_HAVE_GETLASTERRORSTRING
154  NvencContext *ctx = avctx->priv_data;
155  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
156 
157  if (p_nvenc && ctx->nvencoder)
158  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
159 #endif
160 
161  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
162 
163  return ret;
164 }
165 
166 typedef struct FrameData {
167  int64_t pts;
168  int64_t duration;
169 #if FF_API_REORDERED_OPAQUE
170  int64_t reordered_opaque;
171 #endif
172 
173  void *frame_opaque;
175 } FrameData;
176 
177 static void reorder_queue_flush(AVFifo *queue)
178 {
179  FrameData fd;
180 
181  av_assert0(queue);
182 
183  while (av_fifo_read(queue, &fd, 1) >= 0)
185 }
186 
187 typedef struct GUIDTuple {
188  const GUID guid;
189  int flags;
190 } GUIDTuple;
191 
192 #define PRESET_ALIAS(alias, name, ...) \
193  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
194 
195 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
196 
198 {
199  GUIDTuple presets[] = {
200 #ifdef NVENC_HAVE_NEW_PRESETS
201  PRESET(P1),
202  PRESET(P2),
203  PRESET(P3),
204  PRESET(P4),
205  PRESET(P5),
206  PRESET(P6),
207  PRESET(P7),
208  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
209  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
211  // Compat aliases
216  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
219  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
221 #else
222  PRESET(DEFAULT),
223  PRESET(HP),
224  PRESET(HQ),
225  PRESET(BD),
226  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
227  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
229  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
230  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
231  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
232  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
233  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
234 #endif
235  };
236 
237  GUIDTuple *t = &presets[ctx->preset];
238 
239  ctx->init_encode_params.presetGUID = t->guid;
240  ctx->flags = t->flags;
241 
242 #ifdef NVENC_HAVE_NEW_PRESETS
243  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
245 #endif
246 }
247 
248 #undef PRESET
249 #undef PRESET_ALIAS
250 
252 {
253 #if NVENCAPI_CHECK_VERSION(12, 1)
254  const char *minver = "(unknown)";
255 #elif NVENCAPI_CHECK_VERSION(12, 0)
256 # if defined(_WIN32) || defined(__CYGWIN__)
257  const char *minver = "522.25";
258 # else
259  const char *minver = "520.56.06";
260 # endif
261 #elif NVENCAPI_CHECK_VERSION(11, 1)
262 # if defined(_WIN32) || defined(__CYGWIN__)
263  const char *minver = "471.41";
264 # else
265  const char *minver = "470.57.02";
266 # endif
267 #elif NVENCAPI_CHECK_VERSION(11, 0)
268 # if defined(_WIN32) || defined(__CYGWIN__)
269  const char *minver = "456.71";
270 # else
271  const char *minver = "455.28";
272 # endif
273 #elif NVENCAPI_CHECK_VERSION(10, 0)
274 # if defined(_WIN32) || defined(__CYGWIN__)
275  const char *minver = "450.51";
276 # else
277  const char *minver = "445.87";
278 # endif
279 #elif NVENCAPI_CHECK_VERSION(9, 1)
280 # if defined(_WIN32) || defined(__CYGWIN__)
281  const char *minver = "436.15";
282 # else
283  const char *minver = "435.21";
284 # endif
285 #elif NVENCAPI_CHECK_VERSION(9, 0)
286 # if defined(_WIN32) || defined(__CYGWIN__)
287  const char *minver = "418.81";
288 # else
289  const char *minver = "418.30";
290 # endif
291 #elif NVENCAPI_CHECK_VERSION(8, 2)
292 # if defined(_WIN32) || defined(__CYGWIN__)
293  const char *minver = "397.93";
294 # else
295  const char *minver = "396.24";
296 #endif
297 #elif NVENCAPI_CHECK_VERSION(8, 1)
298 # if defined(_WIN32) || defined(__CYGWIN__)
299  const char *minver = "390.77";
300 # else
301  const char *minver = "390.25";
302 # endif
303 #else
304 # if defined(_WIN32) || defined(__CYGWIN__)
305  const char *minver = "378.66";
306 # else
307  const char *minver = "378.13";
308 # endif
309 #endif
310  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
311 }
312 
314 {
315  NvencContext *ctx = avctx->priv_data;
316  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
317  NVENCSTATUS err;
318  uint32_t nvenc_max_ver;
319  int ret;
320 
321  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
322  if (ret < 0)
323  return ret;
324 
325  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
326  if (ret < 0) {
328  return ret;
329  }
330 
331  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
332  if (err != NV_ENC_SUCCESS)
333  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
334 
335  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
336 
337  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
338  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
339  "Required: %d.%d Found: %d.%d\n",
340  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
341  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
343  return AVERROR(ENOSYS);
344  }
345 
346  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
347 
348  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
349  if (err != NV_ENC_SUCCESS)
350  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
351 
352  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
353 
354  return 0;
355 }
356 
358 {
359  NvencContext *ctx = avctx->priv_data;
360  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
361 
362  if (ctx->d3d11_device)
363  return 0;
364 
365  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
366 }
367 
369 {
370  NvencContext *ctx = avctx->priv_data;
371  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
372  CUcontext dummy;
373 
374  if (ctx->d3d11_device)
375  return 0;
376 
377  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
378 }
379 
381 {
382  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
383  NvencContext *ctx = avctx->priv_data;
384  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
385  NVENCSTATUS ret;
386 
387  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
388  params.apiVersion = NVENCAPI_VERSION;
389  if (ctx->d3d11_device) {
390  params.device = ctx->d3d11_device;
391  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
392  } else {
393  params.device = ctx->cu_context;
394  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
395  }
396 
397  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
398  if (ret != NV_ENC_SUCCESS) {
399  ctx->nvencoder = NULL;
400  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
401  }
402 
403  return 0;
404 }
405 
407 {
408  NvencContext *ctx = avctx->priv_data;
409  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
410  int i, ret, count = 0;
411  GUID *guids = NULL;
412 
413  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
414 
415  if (ret != NV_ENC_SUCCESS || !count)
416  return AVERROR(ENOSYS);
417 
418  guids = av_malloc(count * sizeof(GUID));
419  if (!guids)
420  return AVERROR(ENOMEM);
421 
422  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
423  if (ret != NV_ENC_SUCCESS) {
424  ret = AVERROR(ENOSYS);
425  goto fail;
426  }
427 
428  ret = AVERROR(ENOSYS);
429  for (i = 0; i < count; i++) {
430  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
431  ret = 0;
432  break;
433  }
434  }
435 
436 fail:
437  av_free(guids);
438 
439  return ret;
440 }
441 
442 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
443 {
444  NvencContext *ctx = avctx->priv_data;
445  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
446  NV_ENC_CAPS_PARAM params = { 0 };
447  int ret, val = 0;
448 
449  params.version = NV_ENC_CAPS_PARAM_VER;
450  params.capsToQuery = cap;
451 
452  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
453 
454  if (ret == NV_ENC_SUCCESS)
455  return val;
456  return 0;
457 }
458 
460 {
461  NvencContext *ctx = avctx->priv_data;
462  int tmp, ret;
463 
465  if (ret < 0) {
466  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
467  return ret;
468  }
469 
470  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
471  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
472  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
473  return AVERROR(ENOSYS);
474  }
475 
476  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
477  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
478  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
479  return AVERROR(ENOSYS);
480  }
481 
482  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
483  if (ret < avctx->width) {
484  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
485  avctx->width, ret);
486  return AVERROR(ENOSYS);
487  }
488 
489  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
490  if (ret < avctx->height) {
491  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
492  avctx->height, ret);
493  return AVERROR(ENOSYS);
494  }
495 
496  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
497  if (ret < avctx->max_b_frames) {
498  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
499  avctx->max_b_frames, ret);
500 
501  return AVERROR(ENOSYS);
502  }
503 
504  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
505  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
506  av_log(avctx, AV_LOG_WARNING,
507  "Interlaced encoding is not supported. Supported level: %d\n",
508  ret);
509  return AVERROR(ENOSYS);
510  }
511 
512  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
513  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
514  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
515  return AVERROR(ENOSYS);
516  }
517 
518  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
519  if (ctx->rc_lookahead > 0 && ret <= 0) {
520  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
521  return AVERROR(ENOSYS);
522  }
523 
524  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
525  if (ctx->temporal_aq > 0 && ret <= 0) {
526  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
527  return AVERROR(ENOSYS);
528  }
529 
530  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
531  if (ctx->weighted_pred > 0 && ret <= 0) {
532  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
533  return AVERROR(ENOSYS);
534  }
535 
536  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
537  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
538  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
539  return AVERROR(ENOSYS);
540  }
541 
542 #ifdef NVENC_HAVE_BFRAME_REF_MODE
543  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
544  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
545  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
546  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
547  return AVERROR(ENOSYS);
548  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
549  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
550  return AVERROR(ENOSYS);
551  }
552 #else
553  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
554  if (tmp > 0) {
555  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
556  return AVERROR(ENOSYS);
557  }
558 #endif
559 
560 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
561  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
562  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
563  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
564  return AVERROR(ENOSYS);
565  }
566 #else
567  if(avctx->refs != 0) {
568  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
569  return AVERROR(ENOSYS);
570  }
571 #endif
572 
573 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
574  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
575  if(ctx->single_slice_intra_refresh && ret <= 0) {
576  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
577  return AVERROR(ENOSYS);
578  }
579 #else
580  if(ctx->single_slice_intra_refresh) {
581  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
582  return AVERROR(ENOSYS);
583  }
584 #endif
585 
586  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
587  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
588  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
589  return AVERROR(ENOSYS);
590  }
591 
592 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
593  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
594  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
595  return AVERROR(ENOSYS);
596  }
597 #endif
598 
599  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
600  if(ctx->constrained_encoding && ret <= 0) {
601  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
602  return AVERROR(ENOSYS);
603  }
604 
605  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
606 
607  return 0;
608 }
609 
610 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
611 {
612  NvencContext *ctx = avctx->priv_data;
613  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
614  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
615  char name[128] = { 0};
616  int major, minor, ret;
617  CUdevice cu_device;
618  int loglevel = AV_LOG_VERBOSE;
619 
620  if (ctx->device == LIST_DEVICES)
621  loglevel = AV_LOG_INFO;
622 
623  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
624  if (ret < 0)
625  return ret;
626 
627  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
628  if (ret < 0)
629  return ret;
630 
631  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
632  if (ret < 0)
633  return ret;
634 
635  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
636  if (((major << 4) | minor) < NVENC_CAP) {
637  av_log(avctx, loglevel, "does not support NVENC\n");
638  goto fail;
639  }
640 
641  if (ctx->device != idx && ctx->device != ANY_DEVICE)
642  return -1;
643 
644  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
645  if (ret < 0)
646  goto fail;
647 
648  ctx->cu_context = ctx->cu_context_internal;
649  ctx->cu_stream = NULL;
650 
651  if ((ret = nvenc_pop_context(avctx)) < 0)
652  goto fail2;
653 
654  if ((ret = nvenc_open_session(avctx)) < 0)
655  goto fail2;
656 
657  if ((ret = nvenc_check_capabilities(avctx)) < 0)
658  goto fail3;
659 
660  av_log(avctx, loglevel, "supports NVENC\n");
661 
662  dl_fn->nvenc_device_count++;
663 
664  if (ctx->device == idx || ctx->device == ANY_DEVICE)
665  return 0;
666 
667 fail3:
668  if ((ret = nvenc_push_context(avctx)) < 0)
669  return ret;
670 
671  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
672  ctx->nvencoder = NULL;
673 
674  if ((ret = nvenc_pop_context(avctx)) < 0)
675  return ret;
676 
677 fail2:
678  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
679  ctx->cu_context_internal = NULL;
680 
681 fail:
682  return AVERROR(ENOSYS);
683 }
684 
686 {
687  NvencContext *ctx = avctx->priv_data;
688  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
689 
690  switch (avctx->codec->id) {
691  case AV_CODEC_ID_H264:
692  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
693  break;
694  case AV_CODEC_ID_HEVC:
695  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
696  break;
697 #if CONFIG_AV1_NVENC_ENCODER
698  case AV_CODEC_ID_AV1:
699  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
700  break;
701 #endif
702  default:
703  return AVERROR_BUG;
704  }
705 
707 
709  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
710 
711  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
712  AVHWFramesContext *frames_ctx;
713  AVHWDeviceContext *hwdev_ctx;
714  AVCUDADeviceContext *cuda_device_hwctx = NULL;
715 #if CONFIG_D3D11VA
716  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
717 #endif
718  int ret;
719 
720  if (avctx->hw_frames_ctx) {
721  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
722  if (frames_ctx->format == AV_PIX_FMT_CUDA)
723  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
724 #if CONFIG_D3D11VA
725  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
726  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
727 #endif
728  else
729  return AVERROR(EINVAL);
730  } else if (avctx->hw_device_ctx) {
731  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
732  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
733  cuda_device_hwctx = hwdev_ctx->hwctx;
734 #if CONFIG_D3D11VA
735  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
736  d3d11_device_hwctx = hwdev_ctx->hwctx;
737 #endif
738  else
739  return AVERROR(EINVAL);
740  } else {
741  return AVERROR(EINVAL);
742  }
743 
744  if (cuda_device_hwctx) {
745  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
746  ctx->cu_stream = cuda_device_hwctx->stream;
747  }
748 #if CONFIG_D3D11VA
749  else if (d3d11_device_hwctx) {
750  ctx->d3d11_device = d3d11_device_hwctx->device;
751  ID3D11Device_AddRef(ctx->d3d11_device);
752  }
753 #endif
754 
755  ret = nvenc_open_session(avctx);
756  if (ret < 0)
757  return ret;
758 
759  ret = nvenc_check_capabilities(avctx);
760  if (ret < 0) {
761  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
762  return ret;
763  }
764  } else {
765  int i, nb_devices = 0;
766 
767  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
768  return AVERROR_UNKNOWN;
769 
770  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
771  return AVERROR_UNKNOWN;
772 
773  if (!nb_devices) {
774  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
775  return AVERROR_EXTERNAL;
776  }
777 
778  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
779 
780  dl_fn->nvenc_device_count = 0;
781  for (i = 0; i < nb_devices; ++i) {
782  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
783  return 0;
784  }
785 
786  if (ctx->device == LIST_DEVICES)
787  return AVERROR_EXIT;
788 
789  if (!dl_fn->nvenc_device_count) {
790  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
791  return AVERROR_EXTERNAL;
792  }
793 
794  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
795  return AVERROR(EINVAL);
796  }
797 
798  return 0;
799 }
800 
801 static av_cold void set_constqp(AVCodecContext *avctx)
802 {
803  NvencContext *ctx = avctx->priv_data;
804  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
805 #if CONFIG_AV1_NVENC_ENCODER
806  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
807 #else
808  int qmax = 51;
809 #endif
810 
811  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
812 
813  if (ctx->init_qp_p >= 0) {
814  rc->constQP.qpInterP = ctx->init_qp_p;
815  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
816  rc->constQP.qpIntra = ctx->init_qp_i;
817  rc->constQP.qpInterB = ctx->init_qp_b;
818  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
819  rc->constQP.qpIntra = av_clip(
820  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
821  rc->constQP.qpInterB = av_clip(
822  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
823  } else {
824  rc->constQP.qpIntra = rc->constQP.qpInterP;
825  rc->constQP.qpInterB = rc->constQP.qpInterP;
826  }
827  } else if (ctx->cqp >= 0) {
828  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
829  if (avctx->b_quant_factor != 0.0)
830  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
831  if (avctx->i_quant_factor != 0.0)
832  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
833  }
834 
835  avctx->qmin = -1;
836  avctx->qmax = -1;
837 }
838 
839 static av_cold void set_vbr(AVCodecContext *avctx)
840 {
841  NvencContext *ctx = avctx->priv_data;
842  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
843  int qp_inter_p;
844 #if CONFIG_AV1_NVENC_ENCODER
845  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
846 #else
847  int qmax = 51;
848 #endif
849 
850  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
851  rc->enableMinQP = 1;
852  rc->enableMaxQP = 1;
853 
854  rc->minQP.qpInterB = avctx->qmin;
855  rc->minQP.qpInterP = avctx->qmin;
856  rc->minQP.qpIntra = avctx->qmin;
857 
858  rc->maxQP.qpInterB = avctx->qmax;
859  rc->maxQP.qpInterP = avctx->qmax;
860  rc->maxQP.qpIntra = avctx->qmax;
861 
862  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
863  } else if (avctx->qmin >= 0) {
864  rc->enableMinQP = 1;
865 
866  rc->minQP.qpInterB = avctx->qmin;
867  rc->minQP.qpInterP = avctx->qmin;
868  rc->minQP.qpIntra = avctx->qmin;
869 
870  qp_inter_p = avctx->qmin;
871  } else {
872  qp_inter_p = 26; // default to 26
873  }
874 
875  rc->enableInitialRCQP = 1;
876 
877  if (ctx->init_qp_p < 0) {
878  rc->initialRCQP.qpInterP = qp_inter_p;
879  } else {
880  rc->initialRCQP.qpInterP = ctx->init_qp_p;
881  }
882 
883  if (ctx->init_qp_i < 0) {
884  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
885  rc->initialRCQP.qpIntra = av_clip(
886  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
887  } else {
888  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
889  }
890  } else {
891  rc->initialRCQP.qpIntra = ctx->init_qp_i;
892  }
893 
894  if (ctx->init_qp_b < 0) {
895  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
896  rc->initialRCQP.qpInterB = av_clip(
897  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
898  } else {
899  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
900  }
901  } else {
902  rc->initialRCQP.qpInterB = ctx->init_qp_b;
903  }
904 }
905 
907 {
908  NvencContext *ctx = avctx->priv_data;
909  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
910 
911  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
912  rc->constQP.qpInterB = 0;
913  rc->constQP.qpInterP = 0;
914  rc->constQP.qpIntra = 0;
915 
916  avctx->qmin = -1;
917  avctx->qmax = -1;
918 }
919 
921 {
922  NvencContext *ctx = avctx->priv_data;
923  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
924 
925  switch (ctx->rc) {
926  case NV_ENC_PARAMS_RC_CONSTQP:
927  set_constqp(avctx);
928  return;
929  case NV_ENC_PARAMS_RC_VBR_MINQP:
930  if (avctx->qmin < 0) {
931  av_log(avctx, AV_LOG_WARNING,
932  "The variable bitrate rate-control requires "
933  "the 'qmin' option set.\n");
934  set_vbr(avctx);
935  return;
936  }
937  /* fall through */
938  case NV_ENC_PARAMS_RC_VBR_HQ:
939  case NV_ENC_PARAMS_RC_VBR:
940  set_vbr(avctx);
941  break;
942  case NV_ENC_PARAMS_RC_CBR:
943  case NV_ENC_PARAMS_RC_CBR_HQ:
944  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
945  break;
946  }
947 
948  rc->rateControlMode = ctx->rc;
949 }
950 
952 {
953  NvencContext *ctx = avctx->priv_data;
954  // default minimum of 4 surfaces
955  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
956  // another multiply by 2 to avoid blocking next PBB group
957  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
958 
959  // lookahead enabled
960  if (ctx->rc_lookahead > 0) {
961  // +1 is to account for lkd_bound calculation later
962  // +4 is to allow sufficient pipelining with lookahead
963  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
964  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
965  {
966  av_log(avctx, AV_LOG_WARNING,
967  "Defined rc_lookahead requires more surfaces, "
968  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
969  }
970  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
971  } else {
972  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
973  {
974  av_log(avctx, AV_LOG_WARNING,
975  "Defined b-frame requires more surfaces, "
976  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
977  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
978  }
979  else if (ctx->nb_surfaces <= 0)
980  ctx->nb_surfaces = nb_surfaces;
981  // otherwise use user specified value
982  }
983 
984  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
985  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
986 
987  return 0;
988 }
989 
991 {
992  NvencContext *ctx = avctx->priv_data;
993 
994  if (avctx->global_quality > 0)
995  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
996 
997  if (ctx->cqp < 0 && avctx->global_quality > 0)
998  ctx->cqp = avctx->global_quality;
999 
1000  if (avctx->bit_rate > 0) {
1001  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1002  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1003  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1004  }
1005 
1006  if (avctx->rc_max_rate > 0)
1007  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1008 
1009 #ifdef NVENC_HAVE_MULTIPASS
1010  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1011 
1012  if (ctx->flags & NVENC_ONE_PASS)
1013  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1014  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1015  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1016 
1017  if (ctx->rc < 0) {
1018  if (ctx->cbr) {
1019  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1020  } else if (ctx->cqp >= 0) {
1021  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1022  } else if (ctx->quality >= 0.0f) {
1023  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1024  }
1025  }
1026 #else
1027  if (ctx->rc < 0) {
1028  if (ctx->flags & NVENC_ONE_PASS)
1029  ctx->twopass = 0;
1030  if (ctx->flags & NVENC_TWO_PASSES)
1031  ctx->twopass = 1;
1032 
1033  if (ctx->twopass < 0)
1034  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1035 
1036  if (ctx->cbr) {
1037  if (ctx->twopass) {
1038  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1039  } else {
1040  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1041  }
1042  } else if (ctx->cqp >= 0) {
1043  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1044  } else if (ctx->twopass) {
1045  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1046  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
1047  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1048  }
1049  }
1050 #endif
1051 
1052  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1053  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1054  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1055 
1056  ctx->rc &= ~RC_MODE_DEPRECATED;
1057  }
1058 
1059 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1060  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1061  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1062 #else
1063  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1064  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1065 #endif
1066 
1067 #ifdef NVENC_HAVE_LDKFS
1068  if (ctx->ldkfs)
1069  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1070 #endif
1071 
1072  if (ctx->flags & NVENC_LOSSLESS) {
1073  set_lossless(avctx);
1074  } else if (ctx->rc >= 0) {
1076  } else {
1077  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1078  set_vbr(avctx);
1079  }
1080 
1081  if (avctx->rc_buffer_size > 0) {
1082  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1083  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1084  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1085  }
1086 
1087  if (ctx->aq) {
1088  ctx->encode_config.rcParams.enableAQ = 1;
1089  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1090  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1091  }
1092 
1093  if (ctx->temporal_aq) {
1094  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1095  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1096  }
1097 
1098  if (ctx->rc_lookahead > 0) {
1099  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1100  ctx->encode_config.frameIntervalP - 4;
1101 
1102  if (lkd_bound < 0) {
1103  ctx->encode_config.rcParams.enableLookahead = 0;
1104  av_log(avctx, AV_LOG_WARNING,
1105  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1106  } else {
1107  ctx->encode_config.rcParams.enableLookahead = 1;
1108  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1109  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1110  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1111  av_log(avctx, AV_LOG_VERBOSE,
1112  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1113  ctx->encode_config.rcParams.lookaheadDepth,
1114  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1115  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1116  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1117  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1118  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1119  }
1120  }
1121 
1122  if (ctx->strict_gop) {
1123  ctx->encode_config.rcParams.strictGOPTarget = 1;
1124  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1125  }
1126 
1127  if (ctx->nonref_p)
1128  ctx->encode_config.rcParams.enableNonRefP = 1;
1129 
1130  if (ctx->zerolatency)
1131  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1132 
1133  if (ctx->quality) {
1134  //convert from float to fixed point 8.8
1135  int tmp_quality = (int)(ctx->quality * 256.0f);
1136  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1137  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1138 
1139  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1140 
1141  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1142  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1143  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1144  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1145  }
1146 }
1147 
1149 {
1150  NvencContext *ctx = avctx->priv_data;
1151  NV_ENC_CONFIG *cc = &ctx->encode_config;
1152  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1153  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1154 
1155  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1156 
1157  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1158  vui->colourMatrix = AVCOL_SPC_BT470BG;
1159  vui->colourPrimaries = avctx->color_primaries;
1160  vui->transferCharacteristics = avctx->color_trc;
1161  vui->videoFullRangeFlag = 0;
1162  } else {
1163  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1164  vui->colourPrimaries = avctx->color_primaries;
1165  vui->transferCharacteristics = avctx->color_trc;
1166  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1167  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1168  }
1169 
1170  vui->colourDescriptionPresentFlag =
1171  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1172 
1173  vui->videoSignalTypePresentFlag =
1174  (vui->colourDescriptionPresentFlag
1175  || vui->videoFormat != 5
1176  || vui->videoFullRangeFlag != 0);
1177 
1178  h264->sliceMode = 3;
1179  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1180 
1181  if (ctx->intra_refresh) {
1182  h264->enableIntraRefresh = 1;
1183  h264->intraRefreshPeriod = avctx->gop_size;
1184  h264->intraRefreshCnt = avctx->gop_size - 1;
1185 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1186  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1187 #endif
1188  }
1189 
1190  if (ctx->constrained_encoding)
1191  h264->enableConstrainedEncoding = 1;
1192 
1193  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1194  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1195  h264->outputAUD = ctx->aud;
1196 
1197  if (ctx->dpb_size >= 0) {
1198  /* 0 means "let the hardware decide" */
1199  h264->maxNumRefFrames = ctx->dpb_size;
1200  }
1201 
1202  if (ctx->intra_refresh) {
1203  h264->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1204  } else if (avctx->gop_size >= 0) {
1205  h264->idrPeriod = avctx->gop_size;
1206  }
1207 
1208  if (IS_CBR(cc->rcParams.rateControlMode)) {
1209  h264->outputBufferingPeriodSEI = 1;
1210  }
1211 
1212  h264->outputPictureTimingSEI = 1;
1213 
1214  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1215  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1216  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1217  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1218  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1219  }
1220 
1221  if (ctx->flags & NVENC_LOSSLESS) {
1222  h264->qpPrimeYZeroTransformBypassFlag = 1;
1223  } else {
1224  switch(ctx->profile) {
1226  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1228  break;
1230  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1231  avctx->profile = FF_PROFILE_H264_MAIN;
1232  break;
1234  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1235  avctx->profile = FF_PROFILE_H264_HIGH;
1236  break;
1238  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1240  break;
1241  }
1242  }
1243 
1244  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1245  if (IS_YUV444(ctx->data_pix_fmt)) {
1246  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1248  }
1249 
1250  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1251 
1252  h264->level = ctx->level;
1253 
1254  if (ctx->coder >= 0)
1255  h264->entropyCodingMode = ctx->coder;
1256 
1257 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1258  if (ctx->b_ref_mode >= 0)
1259  h264->useBFramesAsRef = ctx->b_ref_mode;
1260 #endif
1261 
1262 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1263  h264->numRefL0 = avctx->refs;
1264  h264->numRefL1 = avctx->refs;
1265 #endif
1266 
1267  return 0;
1268 }
1269 
1271 {
1272  NvencContext *ctx = avctx->priv_data;
1273  NV_ENC_CONFIG *cc = &ctx->encode_config;
1274  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1275  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1276 
1277  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1278 
1279  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1280  vui->colourMatrix = AVCOL_SPC_BT470BG;
1281  vui->colourPrimaries = avctx->color_primaries;
1282  vui->transferCharacteristics = avctx->color_trc;
1283  vui->videoFullRangeFlag = 0;
1284  } else {
1285  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1286  vui->colourPrimaries = avctx->color_primaries;
1287  vui->transferCharacteristics = avctx->color_trc;
1288  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1289  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1290  }
1291 
1292  vui->colourDescriptionPresentFlag =
1293  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1294 
1295  vui->videoSignalTypePresentFlag =
1296  (vui->colourDescriptionPresentFlag
1297  || vui->videoFormat != 5
1298  || vui->videoFullRangeFlag != 0);
1299 
1300  hevc->sliceMode = 3;
1301  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1302 
1303  if (ctx->intra_refresh) {
1304  hevc->enableIntraRefresh = 1;
1305  hevc->intraRefreshPeriod = avctx->gop_size;
1306  hevc->intraRefreshCnt = avctx->gop_size - 1;
1307 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1308  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1309 #endif
1310  }
1311 
1312 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1313  if (ctx->constrained_encoding)
1314  hevc->enableConstrainedEncoding = 1;
1315 #endif
1316 
1317  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1318  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1319  hevc->outputAUD = ctx->aud;
1320 
1321  if (ctx->dpb_size >= 0) {
1322  /* 0 means "let the hardware decide" */
1323  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1324  }
1325 
1326  if (ctx->intra_refresh) {
1327  hevc->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1328  } else if (avctx->gop_size >= 0) {
1329  hevc->idrPeriod = avctx->gop_size;
1330  }
1331 
1332  if (IS_CBR(cc->rcParams.rateControlMode)) {
1333  hevc->outputBufferingPeriodSEI = 1;
1334  }
1335 
1336  hevc->outputPictureTimingSEI = 1;
1337 
1338  switch (ctx->profile) {
1340  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1341  avctx->profile = FF_PROFILE_HEVC_MAIN;
1342  break;
1344  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1346  break;
1348  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1349  avctx->profile = FF_PROFILE_HEVC_REXT;
1350  break;
1351  }
1352 
1353  // force setting profile as main10 if input is 10 bit
1354  if (IS_10BIT(ctx->data_pix_fmt)) {
1355  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1357  }
1358 
1359  // force setting profile as rext if input is yuv444
1360  if (IS_YUV444(ctx->data_pix_fmt)) {
1361  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1362  avctx->profile = FF_PROFILE_HEVC_REXT;
1363  }
1364 
1365  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1366 
1367  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1368 
1369  hevc->level = ctx->level;
1370 
1371  hevc->tier = ctx->tier;
1372 
1373 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1374  if (ctx->b_ref_mode >= 0)
1375  hevc->useBFramesAsRef = ctx->b_ref_mode;
1376 #endif
1377 
1378 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1379  hevc->numRefL0 = avctx->refs;
1380  hevc->numRefL1 = avctx->refs;
1381 #endif
1382 
1383  return 0;
1384 }
1385 
1386 #if CONFIG_AV1_NVENC_ENCODER
1387 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1388 {
1389  NvencContext *ctx = avctx->priv_data;
1390  NV_ENC_CONFIG *cc = &ctx->encode_config;
1391  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1392 
1393  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1394 
1395  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1396  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1397  av1->colorPrimaries = avctx->color_primaries;
1398  av1->transferCharacteristics = avctx->color_trc;
1399  av1->colorRange = 0;
1400  } else {
1401  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1402  av1->colorPrimaries = avctx->color_primaries;
1403  av1->transferCharacteristics = avctx->color_trc;
1404  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1405  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1406  }
1407 
1408  if (IS_YUV444(ctx->data_pix_fmt)) {
1409  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1410  return AVERROR(ENOTSUP);
1411  } else {
1412  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1413  avctx->profile = FF_PROFILE_AV1_MAIN;
1414  }
1415 
1416  if (ctx->dpb_size >= 0) {
1417  /* 0 means "let the hardware decide" */
1418  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1419  }
1420 
1421  if (ctx->intra_refresh) {
1422  av1->enableIntraRefresh = 1;
1423  av1->intraRefreshPeriod = avctx->gop_size;
1424  av1->intraRefreshCnt = avctx->gop_size - 1;
1425 
1426  av1->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1427  } else if (avctx->gop_size >= 0) {
1428  av1->idrPeriod = avctx->gop_size;
1429  }
1430 
1431  if (IS_CBR(cc->rcParams.rateControlMode)) {
1432  av1->enableBitstreamPadding = 1;
1433  }
1434 
1435  if (ctx->tile_cols >= 0)
1436  av1->numTileColumns = ctx->tile_cols;
1437  if (ctx->tile_rows >= 0)
1438  av1->numTileRows = ctx->tile_rows;
1439 
1440  av1->outputAnnexBFormat = 0;
1441 
1442  av1->level = ctx->level;
1443  av1->tier = ctx->tier;
1444 
1445  av1->enableTimingInfo = ctx->timing_info;
1446 
1447  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1448  av1->disableSeqHdr = 0;
1449  av1->repeatSeqHdr = 1;
1450 
1451  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1452 
1453  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1454  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1455 
1456  if (ctx->b_ref_mode >= 0)
1457  av1->useBFramesAsRef = ctx->b_ref_mode;
1458 
1459  av1->numFwdRefs = avctx->refs;
1460  av1->numBwdRefs = avctx->refs;
1461 
1462  return 0;
1463 }
1464 #endif
1465 
1467 {
1468  switch (avctx->codec->id) {
1469  case AV_CODEC_ID_H264:
1470  return nvenc_setup_h264_config(avctx);
1471  case AV_CODEC_ID_HEVC:
1472  return nvenc_setup_hevc_config(avctx);
1473 #if CONFIG_AV1_NVENC_ENCODER
1474  case AV_CODEC_ID_AV1:
1475  return nvenc_setup_av1_config(avctx);
1476 #endif
1477  /* Earlier switch/case will return if unknown codec is passed. */
1478  }
1479 
1480  return 0;
1481 }
1482 
1483 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1484  int sw, sh;
1485 
1486  sw = avctx->width;
1487  sh = avctx->height;
1488 
1489 #if CONFIG_AV1_NVENC_ENCODER
1490  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1491  /* For AV1 we actually need to calculate the render width/height, not the dar */
1492  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1493  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1494  {
1495  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1496  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1497  } else {
1498  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1499  }
1500  }
1501 
1502  *dw = sw;
1503  *dh = sh;
1504  return;
1505  }
1506 #endif
1507 
1508  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1509  sw *= avctx->sample_aspect_ratio.num;
1510  sh *= avctx->sample_aspect_ratio.den;
1511  }
1512 
1513  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1514 }
1515 
1517 {
1518  NvencContext *ctx = avctx->priv_data;
1519  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1520  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1521 
1522  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1523  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1524  AVCPBProperties *cpb_props;
1525  int res = 0;
1526  int dw, dh;
1527 
1528  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1529  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1530 
1531  ctx->init_encode_params.encodeHeight = avctx->height;
1532  ctx->init_encode_params.encodeWidth = avctx->width;
1533 
1534  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1535 
1536  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1537  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1538 
1539 #ifdef NVENC_HAVE_NEW_PRESETS
1540  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1541 
1542  if (ctx->flags & NVENC_LOSSLESS)
1543  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1544  else if (ctx->flags & NVENC_LOWLATENCY)
1545  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1546 
1547  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1548  ctx->init_encode_params.encodeGUID,
1549  ctx->init_encode_params.presetGUID,
1550  ctx->init_encode_params.tuningInfo,
1551  &preset_config);
1552 #else
1553  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1554  ctx->init_encode_params.encodeGUID,
1555  ctx->init_encode_params.presetGUID,
1556  &preset_config);
1557 #endif
1558  if (nv_status != NV_ENC_SUCCESS)
1559  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1560 
1561  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1562 
1563  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1564 
1565  compute_dar(avctx, &dw, &dh);
1566  ctx->init_encode_params.darHeight = dh;
1567  ctx->init_encode_params.darWidth = dw;
1568 
1569  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1570  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1571  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1572  } else {
1573  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1574  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1575  }
1576 
1577  ctx->init_encode_params.enableEncodeAsync = 0;
1578  ctx->init_encode_params.enablePTD = 1;
1579 
1580 #ifdef NVENC_HAVE_NEW_PRESETS
1581  /* If lookahead isn't set from CLI, use value from preset.
1582  * P6 & P7 presets may enable lookahead for better quality.
1583  * */
1584  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1585  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1586 #endif
1587 
1588  if (ctx->weighted_pred == 1)
1589  ctx->init_encode_params.enableWeightedPrediction = 1;
1590 
1591  if (ctx->bluray_compat) {
1592  ctx->aud = 1;
1593  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1594  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1595  switch (avctx->codec->id) {
1596  case AV_CODEC_ID_H264:
1597  /* maximum level depends on used resolution */
1598  break;
1599  case AV_CODEC_ID_HEVC:
1600  ctx->level = NV_ENC_LEVEL_HEVC_51;
1601  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1602  break;
1603  }
1604  }
1605 
1606  if (avctx->gop_size > 0) {
1607  if (avctx->max_b_frames >= 0) {
1608  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1609  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1610  }
1611 
1612  ctx->encode_config.gopLength = avctx->gop_size;
1613  } else if (avctx->gop_size == 0) {
1614  ctx->encode_config.frameIntervalP = 0;
1615  ctx->encode_config.gopLength = 1;
1616  }
1617 
1618  /* force to enable intra refresh */
1619  if(ctx->single_slice_intra_refresh)
1620  ctx->intra_refresh = 1;
1621 
1622  if (ctx->intra_refresh)
1623  ctx->encode_config.gopLength = NVENC_INFINITE_GOPLENGTH;
1624 
1625  nvenc_recalc_surfaces(avctx);
1626 
1627  nvenc_setup_rate_control(avctx);
1628 
1629  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1630  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1631  } else {
1632  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1633  }
1634 
1635  res = nvenc_setup_codec_config(avctx);
1636  if (res)
1637  return res;
1638 
1639  res = nvenc_push_context(avctx);
1640  if (res < 0)
1641  return res;
1642 
1643  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1644  if (nv_status != NV_ENC_SUCCESS) {
1645  nvenc_pop_context(avctx);
1646  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1647  }
1648 
1649 #ifdef NVENC_HAVE_CUSTREAM_PTR
1650  if (ctx->cu_context) {
1651  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1652  if (nv_status != NV_ENC_SUCCESS) {
1653  nvenc_pop_context(avctx);
1654  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1655  }
1656  }
1657 #endif
1658 
1659  res = nvenc_pop_context(avctx);
1660  if (res < 0)
1661  return res;
1662 
1663  if (ctx->encode_config.frameIntervalP > 1)
1664  avctx->has_b_frames = 2;
1665 
1666  if (ctx->encode_config.rcParams.averageBitRate > 0)
1667  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1668 
1669  cpb_props = ff_add_cpb_side_data(avctx);
1670  if (!cpb_props)
1671  return AVERROR(ENOMEM);
1672  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1673  cpb_props->avg_bitrate = avctx->bit_rate;
1674  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1675 
1676  return 0;
1677 }
1678 
1679 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1680 {
1681  switch (pix_fmt) {
1682  case AV_PIX_FMT_YUV420P:
1683  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1684  case AV_PIX_FMT_NV12:
1685  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1686  case AV_PIX_FMT_P010:
1687  case AV_PIX_FMT_P016:
1688  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1689  case AV_PIX_FMT_GBRP:
1690  case AV_PIX_FMT_YUV444P:
1691  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1692  case AV_PIX_FMT_GBRP16:
1693  case AV_PIX_FMT_YUV444P16:
1694  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1695  case AV_PIX_FMT_0RGB32:
1696  case AV_PIX_FMT_RGB32:
1697  return NV_ENC_BUFFER_FORMAT_ARGB;
1698  case AV_PIX_FMT_0BGR32:
1699  case AV_PIX_FMT_BGR32:
1700  return NV_ENC_BUFFER_FORMAT_ABGR;
1701  case AV_PIX_FMT_X2RGB10:
1702  return NV_ENC_BUFFER_FORMAT_ARGB10;
1703  case AV_PIX_FMT_X2BGR10:
1704  return NV_ENC_BUFFER_FORMAT_ABGR10;
1705  default:
1706  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1707  }
1708 }
1709 
1710 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1711 {
1712  NvencContext *ctx = avctx->priv_data;
1713  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1714  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1715  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1716 
1717  NVENCSTATUS nv_status;
1718  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1719  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1720 
1721  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1722  ctx->surfaces[idx].in_ref = av_frame_alloc();
1723  if (!ctx->surfaces[idx].in_ref)
1724  return AVERROR(ENOMEM);
1725  } else {
1726  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1727 
1728  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1729  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1730  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1731  av_get_pix_fmt_name(ctx->data_pix_fmt));
1732  return AVERROR(EINVAL);
1733  }
1734 
1735  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1736  allocSurf.width = avctx->width;
1737  allocSurf.height = avctx->height;
1738  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1739 
1740  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1741  if (nv_status != NV_ENC_SUCCESS) {
1742  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1743  }
1744 
1745  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1746  ctx->surfaces[idx].width = allocSurf.width;
1747  ctx->surfaces[idx].height = allocSurf.height;
1748  }
1749 
1750  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1751  if (nv_status != NV_ENC_SUCCESS) {
1752  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1753  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1754  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1755  av_frame_free(&ctx->surfaces[idx].in_ref);
1756  return err;
1757  }
1758 
1759  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1760 
1761  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1762 
1763  return 0;
1764 }
1765 
1767 {
1768  NvencContext *ctx = avctx->priv_data;
1769  int i, res = 0, res2;
1770 
1771  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1772  if (!ctx->surfaces)
1773  return AVERROR(ENOMEM);
1774 
1775  ctx->reorder_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(FrameData), 0);
1776  if (!ctx->reorder_queue)
1777  return AVERROR(ENOMEM);
1778 
1779  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1780  if (!ctx->unused_surface_queue)
1781  return AVERROR(ENOMEM);
1782 
1783  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1784  if (!ctx->output_surface_queue)
1785  return AVERROR(ENOMEM);
1786  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1787  if (!ctx->output_surface_ready_queue)
1788  return AVERROR(ENOMEM);
1789 
1790  res = nvenc_push_context(avctx);
1791  if (res < 0)
1792  return res;
1793 
1794  for (i = 0; i < ctx->nb_surfaces; i++) {
1795  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1796  goto fail;
1797  }
1798 
1799 fail:
1800  res2 = nvenc_pop_context(avctx);
1801  if (res2 < 0)
1802  return res2;
1803 
1804  return res;
1805 }
1806 
1808 {
1809  NvencContext *ctx = avctx->priv_data;
1810  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1811  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1812 
1813  NVENCSTATUS nv_status;
1814  uint32_t outSize = 0;
1815  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
1816 
1817  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1818  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1819 
1820  payload.spsppsBuffer = tmpHeader;
1821  payload.inBufferSize = sizeof(tmpHeader);
1822  payload.outSPSPPSPayloadSize = &outSize;
1823 
1824  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1825  if (nv_status != NV_ENC_SUCCESS) {
1826  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1827  }
1828 
1829  avctx->extradata_size = outSize;
1831 
1832  if (!avctx->extradata) {
1833  return AVERROR(ENOMEM);
1834  }
1835 
1836  memcpy(avctx->extradata, tmpHeader, outSize);
1837 
1838  return 0;
1839 }
1840 
1842 {
1843  NvencContext *ctx = avctx->priv_data;
1844  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1845  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1846  int i, res;
1847 
1848  /* the encoder has to be flushed before it can be closed */
1849  if (ctx->nvencoder) {
1850  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1851  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1852 
1853  res = nvenc_push_context(avctx);
1854  if (res < 0)
1855  return res;
1856 
1857  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1858  }
1859 
1860  if (ctx->reorder_queue) {
1861  reorder_queue_flush(ctx->reorder_queue);
1862  av_fifo_freep2(&ctx->reorder_queue);
1863  }
1864 
1865  av_fifo_freep2(&ctx->output_surface_ready_queue);
1866  av_fifo_freep2(&ctx->output_surface_queue);
1867  av_fifo_freep2(&ctx->unused_surface_queue);
1868 
1869  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1870  for (i = 0; i < ctx->nb_registered_frames; i++) {
1871  if (ctx->registered_frames[i].mapped)
1872  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1873  if (ctx->registered_frames[i].regptr)
1874  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1875  }
1876  ctx->nb_registered_frames = 0;
1877  }
1878 
1879  if (ctx->surfaces) {
1880  for (i = 0; i < ctx->nb_surfaces; ++i) {
1881  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1882  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1883  av_frame_free(&ctx->surfaces[i].in_ref);
1884  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1885  }
1886  }
1887  av_freep(&ctx->surfaces);
1888  ctx->nb_surfaces = 0;
1889 
1890  av_frame_free(&ctx->frame);
1891 
1892  av_freep(&ctx->sei_data);
1893 
1894  if (ctx->nvencoder) {
1895  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1896 
1897  res = nvenc_pop_context(avctx);
1898  if (res < 0)
1899  return res;
1900  }
1901  ctx->nvencoder = NULL;
1902 
1903  if (ctx->cu_context_internal)
1904  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1905  ctx->cu_context = ctx->cu_context_internal = NULL;
1906 
1907 #if CONFIG_D3D11VA
1908  if (ctx->d3d11_device) {
1909  ID3D11Device_Release(ctx->d3d11_device);
1910  ctx->d3d11_device = NULL;
1911  }
1912 #endif
1913 
1914  nvenc_free_functions(&dl_fn->nvenc_dl);
1915  cuda_free_functions(&dl_fn->cuda_dl);
1916 
1917  dl_fn->nvenc_device_count = 0;
1918 
1919  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1920 
1921  return 0;
1922 }
1923 
1925 {
1926  NvencContext *ctx = avctx->priv_data;
1927  int ret;
1928 
1929  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1930  AVHWFramesContext *frames_ctx;
1931  if (!avctx->hw_frames_ctx) {
1932  av_log(avctx, AV_LOG_ERROR,
1933  "hw_frames_ctx must be set when using GPU frames as input\n");
1934  return AVERROR(EINVAL);
1935  }
1936  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1937  if (frames_ctx->format != avctx->pix_fmt) {
1938  av_log(avctx, AV_LOG_ERROR,
1939  "hw_frames_ctx must match the GPU frame type\n");
1940  return AVERROR(EINVAL);
1941  }
1942  ctx->data_pix_fmt = frames_ctx->sw_format;
1943  } else {
1944  ctx->data_pix_fmt = avctx->pix_fmt;
1945  }
1946 
1947  ctx->frame = av_frame_alloc();
1948  if (!ctx->frame)
1949  return AVERROR(ENOMEM);
1950 
1951  if ((ret = nvenc_load_libraries(avctx)) < 0)
1952  return ret;
1953 
1954  if ((ret = nvenc_setup_device(avctx)) < 0)
1955  return ret;
1956 
1957  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1958  return ret;
1959 
1960  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1961  return ret;
1962 
1963  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1964  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1965  return ret;
1966  }
1967 
1968  return 0;
1969 }
1970 
1972 {
1973  NvencSurface *tmp_surf;
1974 
1975  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
1976  // queue empty
1977  return NULL;
1978 
1979  return tmp_surf;
1980 }
1981 
1982 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1983  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1984 {
1985  int dst_linesize[4] = {
1986  lock_buffer_params->pitch,
1987  lock_buffer_params->pitch,
1988  lock_buffer_params->pitch,
1989  lock_buffer_params->pitch
1990  };
1991  uint8_t *dst_data[4];
1992  int ret;
1993 
1994  if (frame->format == AV_PIX_FMT_YUV420P)
1995  dst_linesize[1] = dst_linesize[2] >>= 1;
1996 
1997  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1998  lock_buffer_params->bufferDataPtr, dst_linesize);
1999  if (ret < 0)
2000  return ret;
2001 
2002  if (frame->format == AV_PIX_FMT_YUV420P)
2003  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2004 
2005  av_image_copy(dst_data, dst_linesize,
2006  (const uint8_t**)frame->data, frame->linesize, frame->format,
2007  avctx->width, avctx->height);
2008 
2009  return 0;
2010 }
2011 
2013 {
2014  NvencContext *ctx = avctx->priv_data;
2015  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2016  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2017  NVENCSTATUS nv_status;
2018 
2019  int i, first_round;
2020 
2021  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2022  for (first_round = 1; first_round >= 0; first_round--) {
2023  for (i = 0; i < ctx->nb_registered_frames; i++) {
2024  if (!ctx->registered_frames[i].mapped) {
2025  if (ctx->registered_frames[i].regptr) {
2026  if (first_round)
2027  continue;
2028  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2029  if (nv_status != NV_ENC_SUCCESS)
2030  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2031  ctx->registered_frames[i].ptr = NULL;
2032  ctx->registered_frames[i].regptr = NULL;
2033  }
2034  return i;
2035  }
2036  }
2037  }
2038  } else {
2039  return ctx->nb_registered_frames++;
2040  }
2041 
2042  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2043  return AVERROR(ENOMEM);
2044 }
2045 
2047 {
2048  NvencContext *ctx = avctx->priv_data;
2049  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2050  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2051 
2052  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2053  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2054  int i, idx, ret;
2055 
2056  for (i = 0; i < ctx->nb_registered_frames; i++) {
2057  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2058  return i;
2059  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2060  return i;
2061  }
2062 
2063  idx = nvenc_find_free_reg_resource(avctx);
2064  if (idx < 0)
2065  return idx;
2066 
2067  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2068  reg.width = frames_ctx->width;
2069  reg.height = frames_ctx->height;
2070  reg.pitch = frame->linesize[0];
2071  reg.resourceToRegister = frame->data[0];
2072 
2073  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2074  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2075  }
2076  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2077  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2078  reg.subResourceIndex = (intptr_t)frame->data[1];
2079  }
2080 
2081  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2082  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2083  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2084  av_get_pix_fmt_name(frames_ctx->sw_format));
2085  return AVERROR(EINVAL);
2086  }
2087 
2088  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2089  if (ret != NV_ENC_SUCCESS) {
2090  nvenc_print_error(avctx, ret, "Error registering an input resource");
2091  return AVERROR_UNKNOWN;
2092  }
2093 
2094  ctx->registered_frames[idx].ptr = frame->data[0];
2095  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2096  ctx->registered_frames[idx].regptr = reg.registeredResource;
2097  return idx;
2098 }
2099 
2101  NvencSurface *nvenc_frame)
2102 {
2103  NvencContext *ctx = avctx->priv_data;
2104  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2105  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2106 
2107  int res;
2108  NVENCSTATUS nv_status;
2109 
2110  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2111  int reg_idx = nvenc_register_frame(avctx, frame);
2112  if (reg_idx < 0) {
2113  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2114  return reg_idx;
2115  }
2116 
2117  res = av_frame_ref(nvenc_frame->in_ref, frame);
2118  if (res < 0)
2119  return res;
2120 
2121  if (!ctx->registered_frames[reg_idx].mapped) {
2122  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2123  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2124  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2125  if (nv_status != NV_ENC_SUCCESS) {
2126  av_frame_unref(nvenc_frame->in_ref);
2127  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2128  }
2129  }
2130 
2131  ctx->registered_frames[reg_idx].mapped += 1;
2132 
2133  nvenc_frame->reg_idx = reg_idx;
2134  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2135  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2136  nvenc_frame->pitch = frame->linesize[0];
2137 
2138  return 0;
2139  } else {
2140  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2141 
2142  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2143  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2144 
2145  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2146  if (nv_status != NV_ENC_SUCCESS) {
2147  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2148  }
2149 
2150  nvenc_frame->pitch = lockBufferParams.pitch;
2151  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2152 
2153  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2154  if (nv_status != NV_ENC_SUCCESS) {
2155  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2156  }
2157 
2158  return res;
2159  }
2160 }
2161 
2163  NV_ENC_PIC_PARAMS *params,
2164  NV_ENC_SEI_PAYLOAD *sei_data,
2165  int sei_count)
2166 {
2167  NvencContext *ctx = avctx->priv_data;
2168 
2169  switch (avctx->codec->id) {
2170  case AV_CODEC_ID_H264:
2171  params->codecPicParams.h264PicParams.sliceMode =
2172  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2173  params->codecPicParams.h264PicParams.sliceModeData =
2174  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2175  if (sei_count > 0) {
2176  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2177  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2178  }
2179 
2180  break;
2181  case AV_CODEC_ID_HEVC:
2182  params->codecPicParams.hevcPicParams.sliceMode =
2183  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2184  params->codecPicParams.hevcPicParams.sliceModeData =
2185  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2186  if (sei_count > 0) {
2187  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2188  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2189  }
2190 
2191  break;
2192 #if CONFIG_AV1_NVENC_ENCODER
2193  case AV_CODEC_ID_AV1:
2194  params->codecPicParams.av1PicParams.numTileColumns =
2195  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2196  params->codecPicParams.av1PicParams.numTileRows =
2197  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2198  if (sei_count > 0) {
2199  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2200  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2201  }
2202 
2203  break;
2204 #endif
2205  }
2206 }
2207 
2208 static void reorder_queue_enqueue(AVFifo *queue, const AVCodecContext *avctx,
2209  const AVFrame *frame, AVBufferRef **opaque_ref)
2210 {
2211  FrameData fd;
2212 
2213  fd.pts = frame->pts;
2214  fd.duration = frame->duration;
2215 #if FF_API_REORDERED_OPAQUE
2217  fd.reordered_opaque = frame->reordered_opaque;
2219 #endif
2220  fd.frame_opaque = frame->opaque;
2221  fd.frame_opaque_ref = *opaque_ref;
2222 
2223  *opaque_ref = NULL;
2224 
2225  av_fifo_write(queue, &fd, 1);
2226 }
2227 
2228 static int64_t reorder_queue_dequeue(AVFifo *queue, AVCodecContext *avctx,
2229  AVPacket *pkt)
2230 {
2231  FrameData fd;
2232 
2233  // The following call might fail if the queue is empty.
2234  if (av_fifo_read(queue, &fd, 1) < 0)
2235  return AV_NOPTS_VALUE;
2236 
2237  if (pkt) {
2238 #if FF_API_REORDERED_OPAQUE
2240  avctx->reordered_opaque = fd.reordered_opaque;
2242 #endif
2243  pkt->duration = fd.duration;
2244 
2245  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2246  pkt->opaque = fd.frame_opaque;
2248  fd.frame_opaque_ref = NULL;
2249  }
2250  }
2251 
2253 
2254  return fd.pts;
2255 }
2256 
2258  NV_ENC_LOCK_BITSTREAM *params,
2259  AVPacket *pkt)
2260 {
2261  NvencContext *ctx = avctx->priv_data;
2262  int64_t dts;
2263 
2264  pkt->pts = params->outputTimeStamp;
2265 
2266  dts = reorder_queue_dequeue(ctx->reorder_queue, avctx, pkt);
2267 
2269  pkt->dts = dts - FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
2270  } else {
2271  pkt->dts = pkt->pts;
2272  }
2273 
2274  return 0;
2275 }
2276 
2278 {
2279  NvencContext *ctx = avctx->priv_data;
2280  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2281  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2282 
2283  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2284  NVENCSTATUS nv_status;
2285  int res = 0;
2286 
2287  enum AVPictureType pict_type;
2288 
2289  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2290 
2291  lock_params.doNotWait = 0;
2292  lock_params.outputBitstream = tmpoutsurf->output_surface;
2293 
2294  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2295  if (nv_status != NV_ENC_SUCCESS) {
2296  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2297  goto error;
2298  }
2299 
2300  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2301 
2302  if (res < 0) {
2303  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2304  goto error;
2305  }
2306 
2307  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2308 
2309  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2310  if (nv_status != NV_ENC_SUCCESS) {
2311  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2312  goto error;
2313  }
2314 
2315 
2316  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2317  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2318  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2319  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2320  if (nv_status != NV_ENC_SUCCESS) {
2321  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2322  goto error;
2323  }
2324  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2325  res = AVERROR_BUG;
2326  goto error;
2327  }
2328 
2329  av_frame_unref(tmpoutsurf->in_ref);
2330 
2331  tmpoutsurf->input_surface = NULL;
2332  }
2333 
2334  switch (lock_params.pictureType) {
2335  case NV_ENC_PIC_TYPE_IDR:
2337  case NV_ENC_PIC_TYPE_I:
2338  pict_type = AV_PICTURE_TYPE_I;
2339  break;
2340  case NV_ENC_PIC_TYPE_P:
2341  pict_type = AV_PICTURE_TYPE_P;
2342  break;
2343  case NV_ENC_PIC_TYPE_B:
2344  pict_type = AV_PICTURE_TYPE_B;
2345  break;
2346  case NV_ENC_PIC_TYPE_BI:
2347  pict_type = AV_PICTURE_TYPE_BI;
2348  break;
2349  default:
2350  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2351  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2352  res = AVERROR_EXTERNAL;
2353  goto error;
2354  }
2355 
2357  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2358 
2359  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2360  if (res < 0)
2361  goto error2;
2362 
2363  return 0;
2364 
2365 error:
2366  reorder_queue_dequeue(ctx->reorder_queue, avctx, NULL);
2367 
2368 error2:
2369  return res;
2370 }
2371 
2372 static int output_ready(AVCodecContext *avctx, int flush)
2373 {
2374  NvencContext *ctx = avctx->priv_data;
2375  int nb_ready, nb_pending;
2376 
2377  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2378  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2379  if (flush)
2380  return nb_ready > 0;
2381  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2382 }
2383 
2385 {
2386  NvencContext *ctx = avctx->priv_data;
2387  int sei_count = 0;
2388  int i, res;
2389 
2391  void *a53_data = NULL;
2392  size_t a53_size = 0;
2393 
2394  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2395  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2396  }
2397 
2398  if (a53_data) {
2399  void *tmp = av_fast_realloc(ctx->sei_data,
2400  &ctx->sei_data_size,
2401  (sei_count + 1) * sizeof(*ctx->sei_data));
2402  if (!tmp) {
2403  av_free(a53_data);
2404  res = AVERROR(ENOMEM);
2405  goto error;
2406  } else {
2407  ctx->sei_data = tmp;
2408  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2409  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2410 
2411 #if CONFIG_AV1_NVENC_ENCODER
2412  if (avctx->codec->id == AV_CODEC_ID_AV1)
2413  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2414  else
2415 #endif
2416  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2417 
2418  sei_count++;
2419  }
2420  }
2421  }
2422 
2424  void *tc_data = NULL;
2425  size_t tc_size = 0;
2426 
2427  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2428  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2429  }
2430 
2431  if (tc_data) {
2432  void *tmp = av_fast_realloc(ctx->sei_data,
2433  &ctx->sei_data_size,
2434  (sei_count + 1) * sizeof(*ctx->sei_data));
2435  if (!tmp) {
2436  av_free(tc_data);
2437  res = AVERROR(ENOMEM);
2438  goto error;
2439  } else {
2440  ctx->sei_data = tmp;
2441  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2442  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2443 
2444 #if CONFIG_AV1_NVENC_ENCODER
2445  if (avctx->codec->id == AV_CODEC_ID_AV1)
2446  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2447  else
2448 #endif
2449  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2450 
2451  sei_count++;
2452  }
2453  }
2454  }
2455 
2456  if (!ctx->udu_sei)
2457  return sei_count;
2458 
2459  for (i = 0; i < frame->nb_side_data; i++) {
2460  AVFrameSideData *side_data = frame->side_data[i];
2461  void *tmp;
2462 
2463  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2464  continue;
2465 
2466  tmp = av_fast_realloc(ctx->sei_data,
2467  &ctx->sei_data_size,
2468  (sei_count + 1) * sizeof(*ctx->sei_data));
2469  if (!tmp) {
2470  res = AVERROR(ENOMEM);
2471  goto error;
2472  } else {
2473  ctx->sei_data = tmp;
2474  ctx->sei_data[sei_count].payloadSize = side_data->size;
2475  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2476  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2477 
2478  if (!ctx->sei_data[sei_count].payload) {
2479  res = AVERROR(ENOMEM);
2480  goto error;
2481  }
2482 
2483  sei_count++;
2484  }
2485  }
2486 
2487  return sei_count;
2488 
2489 error:
2490  for (i = 0; i < sei_count; i++)
2491  av_freep(&(ctx->sei_data[i].payload));
2492 
2493  return res;
2494 }
2495 
2496 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2497 {
2498  NvencContext *ctx = avctx->priv_data;
2499  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2500  NVENCSTATUS ret;
2501 
2502  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2503  int needs_reconfig = 0;
2504  int needs_encode_config = 0;
2505  int reconfig_bitrate = 0, reconfig_dar = 0;
2506  int dw, dh;
2507 
2508  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2509  params.reInitEncodeParams = ctx->init_encode_params;
2510 
2511  compute_dar(avctx, &dw, &dh);
2512  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2513  av_log(avctx, AV_LOG_VERBOSE,
2514  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2515  ctx->init_encode_params.darWidth,
2516  ctx->init_encode_params.darHeight, dw, dh);
2517 
2518  params.reInitEncodeParams.darHeight = dh;
2519  params.reInitEncodeParams.darWidth = dw;
2520 
2521  needs_reconfig = 1;
2522  reconfig_dar = 1;
2523  }
2524 
2525  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2526  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2527  av_log(avctx, AV_LOG_VERBOSE,
2528  "avg bitrate change: %d -> %d\n",
2529  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2530  (uint32_t)avctx->bit_rate);
2531 
2532  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2533  reconfig_bitrate = 1;
2534  }
2535 
2536  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2537  av_log(avctx, AV_LOG_VERBOSE,
2538  "max bitrate change: %d -> %d\n",
2539  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2540  (uint32_t)avctx->rc_max_rate);
2541 
2542  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2543  reconfig_bitrate = 1;
2544  }
2545 
2546  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2547  av_log(avctx, AV_LOG_VERBOSE,
2548  "vbv buffer size change: %d -> %d\n",
2549  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2550  avctx->rc_buffer_size);
2551 
2552  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2553  reconfig_bitrate = 1;
2554  }
2555 
2556  if (reconfig_bitrate) {
2557  params.resetEncoder = 1;
2558  params.forceIDR = 1;
2559 
2560  needs_encode_config = 1;
2561  needs_reconfig = 1;
2562  }
2563  }
2564 
2565  if (!needs_encode_config)
2566  params.reInitEncodeParams.encodeConfig = NULL;
2567 
2568  if (needs_reconfig) {
2569  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2570  if (ret != NV_ENC_SUCCESS) {
2571  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2572  } else {
2573  if (reconfig_dar) {
2574  ctx->init_encode_params.darHeight = dh;
2575  ctx->init_encode_params.darWidth = dw;
2576  }
2577 
2578  if (reconfig_bitrate) {
2579  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2580  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2581  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2582  }
2583 
2584  }
2585  }
2586 }
2587 
2588 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2589 {
2590  NVENCSTATUS nv_status;
2591  NvencSurface *tmp_out_surf, *in_surf;
2592  int res, res2;
2593  int sei_count = 0;
2594  int i;
2595 
2596  AVBufferRef *opaque_ref = NULL;
2597 
2598  NvencContext *ctx = avctx->priv_data;
2599  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2600  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2601 
2602  NV_ENC_PIC_PARAMS pic_params = { 0 };
2603  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2604 
2605  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2606  return AVERROR(EINVAL);
2607 
2608  if (frame && frame->buf[0]) {
2609  in_surf = get_free_frame(ctx);
2610  if (!in_surf)
2611  return AVERROR(EAGAIN);
2612 
2613  res = nvenc_push_context(avctx);
2614  if (res < 0)
2615  return res;
2616 
2617  reconfig_encoder(avctx, frame);
2618 
2619  res = nvenc_upload_frame(avctx, frame, in_surf);
2620 
2621  res2 = nvenc_pop_context(avctx);
2622  if (res2 < 0)
2623  return res2;
2624 
2625  if (res)
2626  return res;
2627 
2628  pic_params.inputBuffer = in_surf->input_surface;
2629  pic_params.bufferFmt = in_surf->format;
2630  pic_params.inputWidth = in_surf->width;
2631  pic_params.inputHeight = in_surf->height;
2632  pic_params.inputPitch = in_surf->pitch;
2633  pic_params.outputBitstream = in_surf->output_surface;
2634 
2635  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2636  if (frame->top_field_first)
2637  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2638  else
2639  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2640  } else {
2641  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2642  }
2643 
2644  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2645  pic_params.encodePicFlags =
2646  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2647  } else {
2648  pic_params.encodePicFlags = 0;
2649  }
2650 
2651  pic_params.inputTimeStamp = frame->pts;
2652 
2653  if (ctx->extra_sei) {
2654  res = prepare_sei_data_array(avctx, frame);
2655  if (res < 0)
2656  return res;
2657  sei_count = res;
2658  }
2659 
2660  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2661  } else {
2662  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2663  }
2664 
2665  // make a reference for enqueing in the reorder queue here,
2666  // so that reorder_queue_enqueue() cannot fail
2667  if (frame && frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2668  opaque_ref = av_buffer_ref(frame->opaque_ref);
2669  if (!opaque_ref)
2670  return AVERROR(ENOMEM);
2671  }
2672 
2673  res = nvenc_push_context(avctx);
2674  if (res < 0)
2675  goto opaque_ref_fail;
2676 
2677  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2678 
2679  for (i = 0; i < sei_count; i++)
2680  av_freep(&(ctx->sei_data[i].payload));
2681 
2682  res = nvenc_pop_context(avctx);
2683  if (res < 0)
2684  goto opaque_ref_fail;
2685 
2686  if (nv_status != NV_ENC_SUCCESS &&
2687  nv_status != NV_ENC_ERR_NEED_MORE_INPUT) {
2688  res = nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2689  goto opaque_ref_fail;
2690  }
2691 
2692  if (frame && frame->buf[0]) {
2693  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
2694  reorder_queue_enqueue(ctx->reorder_queue, avctx, frame, &opaque_ref);
2695  }
2696 
2697  /* all the pending buffers are now ready for output */
2698  if (nv_status == NV_ENC_SUCCESS) {
2699  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
2700  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2701  }
2702 
2703  return 0;
2704 
2705 opaque_ref_fail:
2706  av_buffer_unref(&opaque_ref);
2707  return res;
2708 }
2709 
2711 {
2712  NvencSurface *tmp_out_surf;
2713  int res, res2;
2714 
2715  NvencContext *ctx = avctx->priv_data;
2716 
2717  AVFrame *frame = ctx->frame;
2718 
2719  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2720  return AVERROR(EINVAL);
2721 
2722  if (!frame->buf[0]) {
2723  res = ff_encode_get_frame(avctx, frame);
2724  if (res < 0 && res != AVERROR_EOF)
2725  return res;
2726  }
2727 
2728  res = nvenc_send_frame(avctx, frame);
2729  if (res < 0) {
2730  if (res != AVERROR(EAGAIN))
2731  return res;
2732  } else
2734 
2735  if (output_ready(avctx, avctx->internal->draining)) {
2736  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2737 
2738  res = nvenc_push_context(avctx);
2739  if (res < 0)
2740  return res;
2741 
2742  res = process_output_surface(avctx, pkt, tmp_out_surf);
2743 
2744  res2 = nvenc_pop_context(avctx);
2745  if (res2 < 0)
2746  return res2;
2747 
2748  if (res)
2749  return res;
2750 
2751  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
2752  } else if (avctx->internal->draining) {
2753  return AVERROR_EOF;
2754  } else {
2755  return AVERROR(EAGAIN);
2756  }
2757 
2758  return 0;
2759 }
2760 
2762 {
2763  NvencContext *ctx = avctx->priv_data;
2764 
2765  nvenc_send_frame(avctx, NULL);
2766  reorder_queue_flush(ctx->reorder_queue);
2767 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:31
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
reorder_queue_enqueue
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Definition: nvenc.c:2208
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1667
FF_ENABLE_DEPRECATION_WARNINGS
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:82
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
AV_LOG_WARNING
#define AV_LOG_WARNING
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Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:192
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:253
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
name
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const GUID guid
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#define av_clip
Definition: common.h:95
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:1006
P3
#define P3
Definition: hevcdsp_template.c:1497
FrameData
Definition: ffmpeg.c:117
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:690
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:434
GUIDTuple
Definition: nvenc.c:187
NONE
@ NONE
Definition: af_afade.c:61
GUIDTuple::flags
int flags
Definition: nvenc.c:189
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:2888
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:602
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1615
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:140
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:357
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2372
NvencContext
Definition: nvenc.h:153
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:83
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:103
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:330
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:999
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2257
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:661
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:374
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:713
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1627
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2496
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:588
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:51
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:801
NvencSurface
Definition: nvenc.h:80
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:392
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:146
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1028
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1229
nverr
NVENCSTATUS nverr
Definition: nvenc.c:99
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:906
PRESET
#define PRESET(name,...)
Definition: nvenc.c:195
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:429
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2761
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:30
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:317
nvenc.h
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:302
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1483
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:1762
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:593
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2100
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:99
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:278
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:730
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:839
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:142
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:131
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:435
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:410
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:442
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:186
fail
#define fail()
Definition: checkasm.h:134
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:141
dummy
int dummy
Definition: motion.c:65
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:90
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:978
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:197
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:506
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1619
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1982
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:95
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:251
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:309
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:459
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:91
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:149
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:992
pkt
AVPacket * pkt
Definition: movenc.c:59
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:239
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1664
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:528
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:721
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1924
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:495
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:492
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:472
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1222
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:437
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:557
NvencDynLoadFunctions
Definition: nvenc.h:93
av_assert0
#define av_assert0(cond)
assert() equivalent, that is always enabled.
Definition: avassert.h:37
ctx
AVFormatContext * ctx
Definition: movenc.c:48
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1807
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:134
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1258
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:399
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:96
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:126
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:87
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:82
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1243
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:46
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:478
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:83
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:990
reorder_queue_flush
static void reorder_queue_flush(AVFifo *queue)
Definition: nvenc.c:177
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:84
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:1013
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:283
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:461
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:476
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1841
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:145
FrameData::duration
int64_t duration
Definition: librav1e.c:59
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1665
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:64
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:95
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1148
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
convert_header.major
int major
Definition: convert_header.py:23
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:548
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:517
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:101
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:368
FF_PROFILE_AV1_MAIN
#define FF_PROFILE_AV1_MAIN
Definition: avcodec.h:1673
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:94
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:620
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:352
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:143
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:406
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:150
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:73
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:1068
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1710
reorder_queue_dequeue
static int64_t reorder_queue_dequeue(AVFifo *queue, AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2228
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:238
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:610
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:136
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2046
AVCodecHWConfigInternal
Definition: hwconfig.h:29
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2710
buffer.h
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:373
height
#define height
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:432
FrameData::pts
int64_t pts
Definition: ffmpeg.c:119
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:920
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
nvenc_errors
static const struct @116 nvenc_errors[]
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:380
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:333
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:65
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:141
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1971
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:706
AVCodec::id
enum AVCodecID id
Definition: codec.h:198
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:380
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:97
convert_header.minor
int minor
Definition: convert_header.py:26
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:269
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:367
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:527
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2277
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:313
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:951
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:131
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:226
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2384
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:486
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:516
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:254
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1940
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:90
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:47
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:598
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:635
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:44
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1679
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:262
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:510
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1899
NvencSurface::width
int width
Definition: nvenc.h:85
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1516
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:100
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:436
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:147
cuda_check.h
atsc_a53.h
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2162
AVCodecContext
main external API structure.
Definition: avcodec.h:426
AVCodecContext::codec_descriptor
const AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1783
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:79
NvencSurface::height
int height
Definition: nvenc.h:86
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1222
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1569
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1766
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:737
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:237
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:89
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2012
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1617
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:508
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:142
FF_DISABLE_DEPRECATION_WARNINGS
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:81
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:158
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:98
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts_bsf.c:367
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:697
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:183
AVBufferRef
A reference to a data buffer.
Definition: buffer.h:82
packet_internal.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:236
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
av_free
#define av_free(p)
Definition: tableprint_vlc.h:33
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1029
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: packet.h:351
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:453
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:34
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:685
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:598
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:130
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1466
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int
int
Definition: ffmpeg_filter.c:156
hevc_sei.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:799
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1270
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2588
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2808