56 static void int32_to_float_fmul_scalar_mips(
float *dst,
const int *
src,
62 float temp1, temp3, temp5, temp7, temp9, temp11, temp13, temp15;
64 int rpom1, rpom2, rpom11, rpom21, rpom12, rpom22, rpom13, rpom23;
65 const int *src_end = src +
len;
71 "lw %[rpom11], 0(%[src]) \n\t" 72 "lw %[rpom21], 4(%[src]) \n\t" 73 "lw %[rpom1], 8(%[src]) \n\t" 74 "lw %[rpom2], 12(%[src]) \n\t" 75 "mtc1 %[rpom11], %[temp1] \n\t" 76 "mtc1 %[rpom21], %[temp3] \n\t" 77 "mtc1 %[rpom1], %[temp5] \n\t" 78 "mtc1 %[rpom2], %[temp7] \n\t" 80 "lw %[rpom13], 16(%[src]) \n\t" 81 "lw %[rpom23], 20(%[src]) \n\t" 82 "lw %[rpom12], 24(%[src]) \n\t" 83 "lw %[rpom22], 28(%[src]) \n\t" 84 "mtc1 %[rpom13], %[temp9] \n\t" 85 "mtc1 %[rpom23], %[temp11] \n\t" 86 "mtc1 %[rpom12], %[temp13] \n\t" 87 "mtc1 %[rpom22], %[temp15] \n\t" 90 "cvt.s.w %[temp1], %[temp1] \n\t" 91 "cvt.s.w %[temp3], %[temp3] \n\t" 92 "cvt.s.w %[temp5], %[temp5] \n\t" 93 "cvt.s.w %[temp7], %[temp7] \n\t" 95 "cvt.s.w %[temp9], %[temp9] \n\t" 96 "cvt.s.w %[temp11], %[temp11] \n\t" 97 "cvt.s.w %[temp13], %[temp13] \n\t" 98 "cvt.s.w %[temp15], %[temp15] \n\t" 100 "mul.s %[temp1], %[temp1], %[mul] \n\t" 101 "mul.s %[temp3], %[temp3], %[mul] \n\t" 102 "mul.s %[temp5], %[temp5], %[mul] \n\t" 103 "mul.s %[temp7], %[temp7], %[mul] \n\t" 105 "mul.s %[temp9], %[temp9], %[mul] \n\t" 106 "mul.s %[temp11], %[temp11], %[mul] \n\t" 107 "mul.s %[temp13], %[temp13], %[mul] \n\t" 108 "mul.s %[temp15], %[temp15], %[mul] \n\t" 110 "swc1 %[temp1], 0(%[dst]) \n\t" 111 "swc1 %[temp3], 4(%[dst]) \n\t" 112 "swc1 %[temp5], 8(%[dst]) \n\t" 113 "swc1 %[temp7], 12(%[dst]) \n\t" 115 "swc1 %[temp9], 16(%[dst]) \n\t" 116 "swc1 %[temp11], 20(%[dst]) \n\t" 117 "swc1 %[temp13], 24(%[dst]) \n\t" 118 "swc1 %[temp15], 28(%[dst]) \n\t" 120 "bne %[src], %[src_end], i32tf_lp%= \n\t" 121 : [temp1]
"=&f"(temp1), [temp11]
"=&f"(temp11),
122 [temp13]
"=&f"(temp13), [temp15]
"=&f"(temp15),
123 [temp3]
"=&f"(temp3), [temp5]
"=&f"(temp5),
124 [temp7]
"=&f"(temp7), [temp9]
"=&f"(temp9),
125 [rpom1]
"=&r"(rpom1), [rpom2]
"=&r"(rpom2),
126 [rpom11]
"=&r"(rpom11), [rpom21]
"=&r"(rpom21),
127 [rpom12]
"=&r"(rpom12), [rpom22]
"=&r"(rpom22),
128 [rpom13]
"=&r"(rpom13), [rpom23]
"=&r"(rpom23),
129 [dst]
"+r"(dst), [src]
"+r"(src)
130 : [
mul]
"f"(
mul), [src_end]
"r"(src_end)
MIPS assembly defines from sys/asm.h but rewritten for use with C inline assembly (rather than from w...
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
av_cold void ff_fmt_convert_init_mips(FmtConvertContext *c)
static float mul(float src0, float src1)
void(* int32_to_float_fmul_scalar)(float *dst, const int32_t *src, float mul, int len)
Convert an array of int32_t to float and multiply by a float value.
Libavcodec external API header.
__asm__(".macro parse_r var r\n\t""\\var = -1\n\t"_IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)".iflt \\var\n\t"".error \"Unable to parse register name \\r\"\n\t"".endif\n\t"".endm")