Go to the documentation of this file.
25 #ifndef AVCODEC_MIPS_CABAC_H
26 #define AVCODEC_MIPS_CABAC_H
33 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
34 #define get_cabac_inline get_cabac_inline_mips
36 uint8_t *
const state){
40 "lbu %[bit], 0(%[state]) \n\t"
41 "and %[tmp0], %[c_range], 0xC0 \n\t"
42 PTR_SLL "%[tmp0], %[tmp0], 0x01 \n\t"
43 PTR_ADDU "%[tmp0], %[tmp0], %[tables] \n\t"
44 PTR_ADDU "%[tmp0], %[tmp0], %[bit] \n\t"
46 "lbu %[tmp1], %[lps_off](%[tmp0]) \n\t"
48 PTR_SUBU "%[c_range], %[c_range], %[tmp1] \n\t"
49 PTR_SLL "%[tmp0], %[c_range], 0x11 \n\t"
50 "slt %[tmp2], %[tmp0], %[c_low] \n\t"
51 "beqz %[tmp2], 1f \n\t"
52 "move %[c_range], %[tmp1] \n\t"
53 "not %[bit], %[bit] \n\t"
54 PTR_SUBU "%[c_low], %[c_low], %[tmp0] \n\t"
58 PTR_ADDU "%[tmp0], %[tables], %[bit] \n\t"
59 "lbu %[tmp1], %[mlps_off](%[tmp0]) \n\t"
61 PTR_ADDU "%[tmp0], %[tables], %[c_range] \n\t"
62 "lbu %[tmp2], %[norm_off](%[tmp0]) \n\t"
64 "sb %[tmp1], 0(%[state]) \n\t"
65 "and %[bit], %[bit], 0x01 \n\t"
66 PTR_SLL "%[c_range], %[c_range], %[tmp2] \n\t"
67 PTR_SLL "%[c_low], %[c_low], %[tmp2] \n\t"
69 "and %[tmp1], %[c_low], %[cabac_mask] \n\t"
70 "bnez %[tmp1], 1f \n\t"
72 "xor %[tmp0], %[c_low], %[tmp0] \n\t"
73 PTR_SRA "%[tmp0], %[tmp0], 0x0f \n\t"
74 PTR_ADDU "%[tmp0], %[tmp0], %[tables] \n\t"
76 "lbu %[tmp2], %[norm_off](%[tmp0]) \n\t"
78 "lhu %[tmp0], 0(%[c_bytestream]) \n\t"
80 "lhu %[tmp0], 0(%[c_bytestream]) \n\t"
81 #if HAVE_MIPS32R2 || HAVE_MIPS64R2
82 "wsbh %[tmp0], %[tmp0] \n\t"
84 "and %[tmp1], %[tmp0], 0xff00ff00 \n\t"
85 "srl %[tmp1], %[tmp1], 8 \n\t"
86 "and %[tmp0], %[tmp0], 0x00ff00ff \n\t"
87 "sll %[tmp0], %[tmp0], 8 \n\t"
88 "or %[tmp0], %[tmp0], %[tmp1] \n\t"
91 PTR_SLL "%[tmp0], %[tmp0], 0x01 \n\t"
92 PTR_SUBU "%[tmp0], %[tmp0], %[cabac_mask] \n\t"
94 "li %[tmp1], 0x07 \n\t"
95 PTR_SUBU "%[tmp1], %[tmp1], %[tmp2] \n\t"
96 PTR_SLL "%[tmp0], %[tmp0], %[tmp1] \n\t"
97 PTR_ADDU "%[c_low], %[c_low], %[tmp0] \n\t"
99 #if UNCHECKED_BITSTREAM_READER
100 PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t"
102 "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t"
103 PTR_ADDIU "%[tmp2], %[c_bytestream], 0x02 \n\t"
104 "movn %[c_bytestream], %[tmp2], %[tmp0] \n\t"
107 : [
bit]
"=&r"(
bit), [tmp0]
"=&r"(tmp0), [tmp1]
"=&r"(tmp1), [tmp2]
"=&r"(tmp2),
108 [c_range]
"+&r"(
c->range), [c_low]
"+&r"(
c->low),
109 [c_bytestream]
"+&r"(
c->bytestream)
112 [c_bytestream_end]
"r"(
c->bytestream_end),
124 #define get_cabac_bypass get_cabac_bypass_mips
130 PTR_SLL "%[c_low], %[c_low], 0x01 \n\t"
131 "and %[tmp0], %[c_low], %[cabac_mask] \n\t"
132 "bnez %[tmp0], 1f \n\t"
134 "lhu %[tmp1], 0(%[c_bytestream]) \n\t"
136 "lhu %[tmp1], 0(%[c_bytestream]) \n\t"
137 #if HAVE_MIPS32R2 || HAVE_MIPS64R2
138 "wsbh %[tmp1], %[tmp1] \n\t"
140 "and %[tmp0], %[tmp1], 0xff00ff00 \n\t"
141 "srl %[tmp0], %[tmp0], 8 \n\t"
142 "and %[tmp1], %[tmp1], 0x00ff00ff \n\t"
143 "sll %[tmp1], %[tmp1], 8 \n\t"
144 "or %[tmp1], %[tmp1], %[tmp0] \n\t"
147 PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t"
148 PTR_SUBU "%[tmp1], %[tmp1], %[cabac_mask] \n\t"
149 PTR_ADDU "%[c_low], %[c_low], %[tmp1] \n\t"
150 #if UNCHECKED_BITSTREAM_READER
151 PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t"
153 "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t"
154 PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t"
155 "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t"
158 PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t"
159 "slt %[tmp0], %[c_low], %[tmp1] \n\t"
160 PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t"
161 "movz %[res], %[one], %[tmp0] \n\t"
162 "movz %[c_low], %[tmp1], %[tmp0] \n\t"
163 : [tmp0]
"=&r"(tmp0), [tmp1]
"=&r"(tmp1), [res]
"+&r"(res),
164 [c_range]
"+&r"(
c->range), [c_low]
"+&r"(
c->low),
165 [c_bytestream]
"+&r"(
c->bytestream)
168 [c_bytestream_end]
"r"(
c->bytestream_end),
176 #define get_cabac_bypass_sign get_cabac_bypass_sign_mips
182 PTR_SLL "%[c_low], %[c_low], 0x01 \n\t"
183 "and %[tmp0], %[c_low], %[cabac_mask] \n\t"
184 "bnez %[tmp0], 1f \n\t"
186 "lhu %[tmp1], 0(%[c_bytestream]) \n\t"
188 "lhu %[tmp1], 0(%[c_bytestream]) \n\t"
189 #if HAVE_MIPS32R2 || HAVE_MIPS64R2
190 "wsbh %[tmp1], %[tmp1] \n\t"
192 "and %[tmp0], %[tmp1], 0xff00ff00 \n\t"
193 "srl %[tmp0], %[tmp0], 8 \n\t"
194 "and %[tmp1], %[tmp1], 0x00ff00ff \n\t"
195 "sll %[tmp1], %[tmp1], 8 \n\t"
196 "or %[tmp1], %[tmp1], %[tmp0] \n\t"
199 PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t"
200 PTR_SUBU "%[tmp1], %[tmp1], %[cabac_mask] \n\t"
201 PTR_ADDU "%[c_low], %[c_low], %[tmp1] \n\t"
202 #if UNCHECKED_BITSTREAM_READER
203 PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t"
205 "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t"
206 PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t"
207 "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t"
210 PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t"
211 "slt %[tmp0], %[c_low], %[tmp1] \n\t"
212 PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t"
213 "movz %[c_low], %[tmp1], %[tmp0] \n\t"
214 PTR_SUBU "%[tmp1], %[zero], %[res] \n\t"
215 "movn %[res], %[tmp1], %[tmp0] \n\t"
216 : [tmp0]
"=&r"(tmp0), [tmp1]
"=&r"(tmp1), [res]
"+&r"(res),
217 [c_range]
"+&r"(
c->range), [c_low]
"+&r"(
c->low),
218 [c_bytestream]
"+&r"(
c->bytestream)
221 [c_bytestream_end]
"r"(
c->bytestream_end),
static av_always_inline int get_cabac_bypass_sign_mips(CABACContext *c, int val)
#define bit(string, value)
Writing a table generator This documentation is preliminary Parts of the API are not good and should be changed Basic concepts A table generator consists of two *_tablegen c and *_tablegen h The h file will provide the variable declarations and initialization code for the tables
static double val(void *priv, double ch)
const uint8_t ff_h264_cabac_tables[512+4 *2 *64+4 *64+63]
static av_always_inline int get_cabac_bypass_mips(CABACContext *c)
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
#define H264_LPS_RANGE_OFFSET
static int zero(InterplayACMContext *s, unsigned ind, unsigned col)
#define UNCHECKED_BITSTREAM_READER
#define H264_NORM_SHIFT_OFFSET
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
static av_always_inline int get_cabac_inline_mips(CABACContext *c, uint8_t *const state)
#define H264_MLPS_STATE_OFFSET