FFmpeg
nvenc.c
Go to the documentation of this file.
1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 #include "hevc_sei.h"
26 
28 #include "libavutil/hwcontext.h"
29 #include "libavutil/cuda_check.h"
30 #include "libavutil/imgutils.h"
31 #include "libavutil/avassert.h"
32 #include "libavutil/mem.h"
33 #include "libavutil/pixdesc.h"
34 #include "atsc_a53.h"
35 #include "encode.h"
36 #include "internal.h"
37 #include "packet_internal.h"
38 
39 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
40 
41 #define NVENC_CAP 0x30
42 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
43  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
44  rc == NV_ENC_PARAMS_RC_CBR_HQ)
45 
46 #ifdef NVENC_HAVE_NEW_PRESETS
47 #define IS_SDK10_PRESET(p) ((p) >= PRESET_P1 && (p) <= PRESET_P7)
48 #else
49 #define IS_SDK10_PRESET(p) 0
50 #endif
51 
57  AV_PIX_FMT_P016, // Truncated to 10bits
58  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
62 #if CONFIG_D3D11VA
64 #endif
66 };
67 
69  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
71 #if CONFIG_D3D11VA
72  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
74 #endif
75  NULL,
76 };
77 
78 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
79  pix_fmt == AV_PIX_FMT_P016 || \
80  pix_fmt == AV_PIX_FMT_YUV444P16)
81 
82 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
83  pix_fmt == AV_PIX_FMT_YUV444P16)
84 
85 static const struct {
86  NVENCSTATUS nverr;
87  int averr;
88  const char *desc;
89 } nvenc_errors[] = {
90  { NV_ENC_SUCCESS, 0, "success" },
91  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
92  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
93  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
94  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
95  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
96  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
97  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
98  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
99  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
100  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
101  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
102  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
103  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
104  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
105  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
106  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
107  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
108  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
109  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
110  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
111  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
112  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
113  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
114  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
115  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
116 };
117 
118 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
119 {
120  int i;
121  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
122  if (nvenc_errors[i].nverr == err) {
123  if (desc)
124  *desc = nvenc_errors[i].desc;
125  return nvenc_errors[i].averr;
126  }
127  }
128  if (desc)
129  *desc = "unknown error";
130  return AVERROR_UNKNOWN;
131 }
132 
133 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
134  const char *error_string)
135 {
136  const char *desc;
137  const char *details = "(no details)";
138  int ret = nvenc_map_error(err, &desc);
139 
140 #ifdef NVENC_HAVE_GETLASTERRORSTRING
141  NvencContext *ctx = avctx->priv_data;
142  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
143 
144  if (p_nvenc && ctx->nvencoder)
145  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
146 #endif
147 
148  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
149 
150  return ret;
151 }
152 
154 {
155 #if NVENCAPI_CHECK_VERSION(11, 1)
156  const char *minver = "(unknown)";
157 #elif NVENCAPI_CHECK_VERSION(11, 0)
158 # if defined(_WIN32) || defined(__CYGWIN__)
159  const char *minver = "456.71";
160 # else
161  const char *minver = "455.28";
162 # endif
163 #elif NVENCAPI_CHECK_VERSION(10, 0)
164 # if defined(_WIN32) || defined(__CYGWIN__)
165  const char *minver = "450.51";
166 # else
167  const char *minver = "445.87";
168 # endif
169 #elif NVENCAPI_CHECK_VERSION(9, 1)
170 # if defined(_WIN32) || defined(__CYGWIN__)
171  const char *minver = "436.15";
172 # else
173  const char *minver = "435.21";
174 # endif
175 #elif NVENCAPI_CHECK_VERSION(9, 0)
176 # if defined(_WIN32) || defined(__CYGWIN__)
177  const char *minver = "418.81";
178 # else
179  const char *minver = "418.30";
180 # endif
181 #elif NVENCAPI_CHECK_VERSION(8, 2)
182 # if defined(_WIN32) || defined(__CYGWIN__)
183  const char *minver = "397.93";
184 # else
185  const char *minver = "396.24";
186 #endif
187 #elif NVENCAPI_CHECK_VERSION(8, 1)
188 # if defined(_WIN32) || defined(__CYGWIN__)
189  const char *minver = "390.77";
190 # else
191  const char *minver = "390.25";
192 # endif
193 #else
194 # if defined(_WIN32) || defined(__CYGWIN__)
195  const char *minver = "378.66";
196 # else
197  const char *minver = "378.13";
198 # endif
199 #endif
200  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
201 }
202 
204 {
205  NvencContext *ctx = avctx->priv_data;
207  NVENCSTATUS err;
208  uint32_t nvenc_max_ver;
209  int ret;
210 
211  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
212  if (ret < 0)
213  return ret;
214 
215  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
216  if (ret < 0) {
218  return ret;
219  }
220 
221  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
222  if (err != NV_ENC_SUCCESS)
223  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
224 
225  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
226 
227  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
228  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
229  "Required: %d.%d Found: %d.%d\n",
230  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
231  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
233  return AVERROR(ENOSYS);
234  }
235 
236  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
237 
238  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
239  if (err != NV_ENC_SUCCESS)
240  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
241 
242  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
243 
244  return 0;
245 }
246 
248 {
249  NvencContext *ctx = avctx->priv_data;
251 
252  if (ctx->d3d11_device)
253  return 0;
254 
255  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
256 }
257 
259 {
260  NvencContext *ctx = avctx->priv_data;
262  CUcontext dummy;
263 
264  if (ctx->d3d11_device)
265  return 0;
266 
267  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
268 }
269 
271 {
272  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
273  NvencContext *ctx = avctx->priv_data;
274  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
275  NVENCSTATUS ret;
276 
277  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
278  params.apiVersion = NVENCAPI_VERSION;
279  if (ctx->d3d11_device) {
280  params.device = ctx->d3d11_device;
281  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
282  } else {
283  params.device = ctx->cu_context;
284  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
285  }
286 
287  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
288  if (ret != NV_ENC_SUCCESS) {
289  ctx->nvencoder = NULL;
290  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
291  }
292 
293  return 0;
294 }
295 
297 {
298  NvencContext *ctx = avctx->priv_data;
299  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
300  int i, ret, count = 0;
301  GUID *guids = NULL;
302 
303  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
304 
305  if (ret != NV_ENC_SUCCESS || !count)
306  return AVERROR(ENOSYS);
307 
308  guids = av_malloc(count * sizeof(GUID));
309  if (!guids)
310  return AVERROR(ENOMEM);
311 
312  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
313  if (ret != NV_ENC_SUCCESS) {
314  ret = AVERROR(ENOSYS);
315  goto fail;
316  }
317 
318  ret = AVERROR(ENOSYS);
319  for (i = 0; i < count; i++) {
320  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
321  ret = 0;
322  break;
323  }
324  }
325 
326 fail:
327  av_free(guids);
328 
329  return ret;
330 }
331 
332 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
333 {
334  NvencContext *ctx = avctx->priv_data;
335  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
336  NV_ENC_CAPS_PARAM params = { 0 };
337  int ret, val = 0;
338 
339  params.version = NV_ENC_CAPS_PARAM_VER;
340  params.capsToQuery = cap;
341 
342  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
343 
344  if (ret == NV_ENC_SUCCESS)
345  return val;
346  return 0;
347 }
348 
350 {
351  NvencContext *ctx = avctx->priv_data;
352  int ret;
353 
354  ret = nvenc_check_codec_support(avctx);
355  if (ret < 0) {
356  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
357  return ret;
358  }
359 
360  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
361  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
362  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
363  return AVERROR(ENOSYS);
364  }
365 
366  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
367  if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
368  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
369  return AVERROR(ENOSYS);
370  }
371 
372  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
373  if (ret < avctx->width) {
374  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
375  avctx->width, ret);
376  return AVERROR(ENOSYS);
377  }
378 
379  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
380  if (ret < avctx->height) {
381  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
382  avctx->height, ret);
383  return AVERROR(ENOSYS);
384  }
385 
386  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
387  if (ret < avctx->max_b_frames) {
388  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
389  avctx->max_b_frames, ret);
390 
391  return AVERROR(ENOSYS);
392  }
393 
394  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
395  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
396  av_log(avctx, AV_LOG_WARNING,
397  "Interlaced encoding is not supported. Supported level: %d\n",
398  ret);
399  return AVERROR(ENOSYS);
400  }
401 
402  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
403  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
404  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
405  return AVERROR(ENOSYS);
406  }
407 
408  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
409  if (ctx->rc_lookahead > 0 && ret <= 0) {
410  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
411  return AVERROR(ENOSYS);
412  }
413 
414  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
415  if (ctx->temporal_aq > 0 && ret <= 0) {
416  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
417  return AVERROR(ENOSYS);
418  }
419 
420  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
421  if (ctx->weighted_pred > 0 && ret <= 0) {
422  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
423  return AVERROR(ENOSYS);
424  }
425 
426  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
427  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
428  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
429  return AVERROR(ENOSYS);
430  }
431 
432 #ifdef NVENC_HAVE_BFRAME_REF_MODE
433  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
434  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
435  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
436  return AVERROR(ENOSYS);
437  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
438  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
439  return AVERROR(ENOSYS);
440  }
441 #else
442  if (ctx->b_ref_mode != 0) {
443  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
444  return AVERROR(ENOSYS);
445  }
446 #endif
447 
448 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
449  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
450  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
451  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
452  return AVERROR(ENOSYS);
453  }
454 #else
455  if(avctx->refs != 0) {
456  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
457  return AVERROR(ENOSYS);
458  }
459 #endif
460 
461  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
462 
463  return 0;
464 }
465 
466 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
467 {
468  NvencContext *ctx = avctx->priv_data;
470  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
471  char name[128] = { 0};
472  int major, minor, ret;
473  CUdevice cu_device;
474  int loglevel = AV_LOG_VERBOSE;
475 
476  if (ctx->device == LIST_DEVICES)
477  loglevel = AV_LOG_INFO;
478 
479  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
480  if (ret < 0)
481  return ret;
482 
483  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
484  if (ret < 0)
485  return ret;
486 
487  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
488  if (ret < 0)
489  return ret;
490 
491  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
492  if (((major << 4) | minor) < NVENC_CAP) {
493  av_log(avctx, loglevel, "does not support NVENC\n");
494  goto fail;
495  }
496 
497  if (ctx->device != idx && ctx->device != ANY_DEVICE)
498  return -1;
499 
500  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
501  if (ret < 0)
502  goto fail;
503 
504  ctx->cu_context = ctx->cu_context_internal;
505  ctx->cu_stream = NULL;
506 
507  if ((ret = nvenc_pop_context(avctx)) < 0)
508  goto fail2;
509 
510  if ((ret = nvenc_open_session(avctx)) < 0)
511  goto fail2;
512 
513  if ((ret = nvenc_check_capabilities(avctx)) < 0)
514  goto fail3;
515 
516  av_log(avctx, loglevel, "supports NVENC\n");
517 
518  dl_fn->nvenc_device_count++;
519 
520  if (ctx->device == idx || ctx->device == ANY_DEVICE)
521  return 0;
522 
523 fail3:
524  if ((ret = nvenc_push_context(avctx)) < 0)
525  return ret;
526 
527  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
528  ctx->nvencoder = NULL;
529 
530  if ((ret = nvenc_pop_context(avctx)) < 0)
531  return ret;
532 
533 fail2:
534  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
535  ctx->cu_context_internal = NULL;
536 
537 fail:
538  return AVERROR(ENOSYS);
539 }
540 
542 {
543  NvencContext *ctx = avctx->priv_data;
545 
546  switch (avctx->codec->id) {
547  case AV_CODEC_ID_H264:
548  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
549  break;
550  case AV_CODEC_ID_HEVC:
551  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
552  break;
553  default:
554  return AVERROR_BUG;
555  }
556 
557  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
558  AVHWFramesContext *frames_ctx;
559  AVHWDeviceContext *hwdev_ctx;
560  AVCUDADeviceContext *cuda_device_hwctx = NULL;
561 #if CONFIG_D3D11VA
562  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
563 #endif
564  int ret;
565 
566  if (avctx->hw_frames_ctx) {
567  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
568  if (frames_ctx->format == AV_PIX_FMT_CUDA)
569  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
570 #if CONFIG_D3D11VA
571  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
572  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
573 #endif
574  else
575  return AVERROR(EINVAL);
576  } else if (avctx->hw_device_ctx) {
577  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
578  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
579  cuda_device_hwctx = hwdev_ctx->hwctx;
580 #if CONFIG_D3D11VA
581  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
582  d3d11_device_hwctx = hwdev_ctx->hwctx;
583 #endif
584  else
585  return AVERROR(EINVAL);
586  } else {
587  return AVERROR(EINVAL);
588  }
589 
590  if (cuda_device_hwctx) {
591  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
592  ctx->cu_stream = cuda_device_hwctx->stream;
593  }
594 #if CONFIG_D3D11VA
595  else if (d3d11_device_hwctx) {
596  ctx->d3d11_device = d3d11_device_hwctx->device;
597  ID3D11Device_AddRef(ctx->d3d11_device);
598  }
599 #endif
600 
601  ret = nvenc_open_session(avctx);
602  if (ret < 0)
603  return ret;
604 
605  ret = nvenc_check_capabilities(avctx);
606  if (ret < 0) {
607  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
608  return ret;
609  }
610  } else {
611  int i, nb_devices = 0;
612 
613  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
614  return AVERROR_UNKNOWN;
615 
616  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
617  return AVERROR_UNKNOWN;
618 
619  if (!nb_devices) {
620  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
621  return AVERROR_EXTERNAL;
622  }
623 
624  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
625 
626  dl_fn->nvenc_device_count = 0;
627  for (i = 0; i < nb_devices; ++i) {
628  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
629  return 0;
630  }
631 
632  if (ctx->device == LIST_DEVICES)
633  return AVERROR_EXIT;
634 
635  if (!dl_fn->nvenc_device_count) {
636  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
637  return AVERROR_EXTERNAL;
638  }
639 
640  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
641  return AVERROR(EINVAL);
642  }
643 
644  return 0;
645 }
646 
647 typedef struct GUIDTuple {
648  const GUID guid;
649  int flags;
650 } GUIDTuple;
651 
652 #define PRESET_ALIAS(alias, name, ...) \
653  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
654 
655 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
656 
658 {
659  GUIDTuple presets[] = {
660  PRESET(DEFAULT),
661  PRESET(HP),
662  PRESET(HQ),
663  PRESET(BD),
664  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
665  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
666  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
667  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
668  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
669  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
670  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
671  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
672 #ifdef NVENC_HAVE_NEW_PRESETS
673  PRESET(P1),
674  PRESET(P2),
675  PRESET(P3),
676  PRESET(P4),
677  PRESET(P5),
678  PRESET(P6),
679  PRESET(P7),
680 #endif
681  };
682 
683  GUIDTuple *t = &presets[ctx->preset];
684 
685  ctx->init_encode_params.presetGUID = t->guid;
686  ctx->flags = t->flags;
687 }
688 
689 #undef PRESET
690 #undef PRESET_ALIAS
691 
692 static av_cold void set_constqp(AVCodecContext *avctx)
693 {
694  NvencContext *ctx = avctx->priv_data;
695  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
696 
697  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
698 
699  if (ctx->init_qp_p >= 0) {
700  rc->constQP.qpInterP = ctx->init_qp_p;
701  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
702  rc->constQP.qpIntra = ctx->init_qp_i;
703  rc->constQP.qpInterB = ctx->init_qp_b;
704  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
705  rc->constQP.qpIntra = av_clip(
706  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
707  rc->constQP.qpInterB = av_clip(
708  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
709  } else {
710  rc->constQP.qpIntra = rc->constQP.qpInterP;
711  rc->constQP.qpInterB = rc->constQP.qpInterP;
712  }
713  } else if (ctx->cqp >= 0) {
714  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
715  if (avctx->b_quant_factor != 0.0)
716  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
717  if (avctx->i_quant_factor != 0.0)
718  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
719  }
720 
721  avctx->qmin = -1;
722  avctx->qmax = -1;
723 }
724 
725 static av_cold void set_vbr(AVCodecContext *avctx)
726 {
727  NvencContext *ctx = avctx->priv_data;
728  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
729  int qp_inter_p;
730 
731  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
732  rc->enableMinQP = 1;
733  rc->enableMaxQP = 1;
734 
735  rc->minQP.qpInterB = avctx->qmin;
736  rc->minQP.qpInterP = avctx->qmin;
737  rc->minQP.qpIntra = avctx->qmin;
738 
739  rc->maxQP.qpInterB = avctx->qmax;
740  rc->maxQP.qpInterP = avctx->qmax;
741  rc->maxQP.qpIntra = avctx->qmax;
742 
743  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
744  } else if (avctx->qmin >= 0) {
745  rc->enableMinQP = 1;
746 
747  rc->minQP.qpInterB = avctx->qmin;
748  rc->minQP.qpInterP = avctx->qmin;
749  rc->minQP.qpIntra = avctx->qmin;
750 
751  qp_inter_p = avctx->qmin;
752  } else {
753  qp_inter_p = 26; // default to 26
754  }
755 
756  rc->enableInitialRCQP = 1;
757 
758  if (ctx->init_qp_p < 0) {
759  rc->initialRCQP.qpInterP = qp_inter_p;
760  } else {
761  rc->initialRCQP.qpInterP = ctx->init_qp_p;
762  }
763 
764  if (ctx->init_qp_i < 0) {
765  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
766  rc->initialRCQP.qpIntra = av_clip(
767  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
768  } else {
769  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
770  }
771  } else {
772  rc->initialRCQP.qpIntra = ctx->init_qp_i;
773  }
774 
775  if (ctx->init_qp_b < 0) {
776  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
777  rc->initialRCQP.qpInterB = av_clip(
778  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
779  } else {
780  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
781  }
782  } else {
783  rc->initialRCQP.qpInterB = ctx->init_qp_b;
784  }
785 }
786 
788 {
789  NvencContext *ctx = avctx->priv_data;
790  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
791 
792  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
793  rc->constQP.qpInterB = 0;
794  rc->constQP.qpInterP = 0;
795  rc->constQP.qpIntra = 0;
796 
797  avctx->qmin = -1;
798  avctx->qmax = -1;
799 }
800 
802 {
803  NvencContext *ctx = avctx->priv_data;
804  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
805 
806  switch (ctx->rc) {
807  case NV_ENC_PARAMS_RC_CONSTQP:
808  set_constqp(avctx);
809  return;
810  case NV_ENC_PARAMS_RC_VBR_MINQP:
811  if (avctx->qmin < 0) {
812  av_log(avctx, AV_LOG_WARNING,
813  "The variable bitrate rate-control requires "
814  "the 'qmin' option set.\n");
815  set_vbr(avctx);
816  return;
817  }
818  /* fall through */
819  case NV_ENC_PARAMS_RC_VBR_HQ:
820  case NV_ENC_PARAMS_RC_VBR:
821  set_vbr(avctx);
822  break;
823  case NV_ENC_PARAMS_RC_CBR:
824  case NV_ENC_PARAMS_RC_CBR_HQ:
825  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
826  break;
827  }
828 
829  rc->rateControlMode = ctx->rc;
830 }
831 
833 {
834  NvencContext *ctx = avctx->priv_data;
835  // default minimum of 4 surfaces
836  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
837  // another multiply by 2 to avoid blocking next PBB group
838  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
839 
840  // lookahead enabled
841  if (ctx->rc_lookahead > 0) {
842  // +1 is to account for lkd_bound calculation later
843  // +4 is to allow sufficient pipelining with lookahead
844  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
845  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
846  {
847  av_log(avctx, AV_LOG_WARNING,
848  "Defined rc_lookahead requires more surfaces, "
849  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
850  }
851  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
852  } else {
853  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
854  {
855  av_log(avctx, AV_LOG_WARNING,
856  "Defined b-frame requires more surfaces, "
857  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
858  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
859  }
860  else if (ctx->nb_surfaces <= 0)
861  ctx->nb_surfaces = nb_surfaces;
862  // otherwise use user specified value
863  }
864 
866  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
867 
868  return 0;
869 }
870 
872 {
873  NvencContext *ctx = avctx->priv_data;
874 
875  if (avctx->global_quality > 0)
876  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
877 
878  if (ctx->cqp < 0 && avctx->global_quality > 0)
879  ctx->cqp = avctx->global_quality;
880 
881  if (avctx->bit_rate > 0) {
882  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
883  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
884  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
885  }
886 
887  if (avctx->rc_max_rate > 0)
888  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
889 
890 #ifdef NVENC_HAVE_MULTIPASS
891  ctx->encode_config.rcParams.multiPass = ctx->multipass;
892  if (ctx->encode_config.rcParams.multiPass != NV_ENC_MULTI_PASS_DISABLED)
893  ctx->flags |= NVENC_TWO_PASSES;
894 #endif
895 
896  if (ctx->rc < 0) {
897  if (ctx->flags & NVENC_ONE_PASS)
898  ctx->twopass = 0;
899  if (ctx->flags & NVENC_TWO_PASSES)
900  ctx->twopass = 1;
901 
902  if (ctx->twopass < 0)
903  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
904 
905  if (ctx->cbr) {
906  if (ctx->twopass) {
907  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
908  } else {
909  ctx->rc = NV_ENC_PARAMS_RC_CBR;
910  }
911  } else if (ctx->cqp >= 0) {
912  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
913  } else if (ctx->twopass) {
914  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
915  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
916  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
917  }
918  }
919 
920  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
921  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
922  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_quality -> cbr_ld_hq\n");
923  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_size -> cbr_hq\n");
924  av_log(avctx, AV_LOG_WARNING, "\tvbr_2pass -> vbr_hq\n");
925  av_log(avctx, AV_LOG_WARNING, "\tvbr_minqp -> (no replacement)\n");
926 
927  ctx->rc &= ~RC_MODE_DEPRECATED;
928  }
929 
930 #ifdef NVENC_HAVE_LDKFS
931  if (ctx->ldkfs)
932  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
933 #endif
934 
935  if (ctx->flags & NVENC_LOSSLESS) {
936  set_lossless(avctx);
937  } else if (ctx->rc >= 0) {
939  } else {
940  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
941  set_vbr(avctx);
942  }
943 
944  if (avctx->rc_buffer_size > 0) {
945  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
946  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
947  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
948  }
949 
950  if (ctx->aq) {
951  ctx->encode_config.rcParams.enableAQ = 1;
952  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
953  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
954  }
955 
956  if (ctx->temporal_aq) {
957  ctx->encode_config.rcParams.enableTemporalAQ = 1;
958  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
959  }
960 
961  if (ctx->rc_lookahead > 0) {
962  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
963  ctx->encode_config.frameIntervalP - 4;
964 
965  if (lkd_bound < 0) {
966  av_log(avctx, AV_LOG_WARNING,
967  "Lookahead not enabled. Increase buffer delay (-delay).\n");
968  } else {
969  ctx->encode_config.rcParams.enableLookahead = 1;
970  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
971  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
972  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
973  av_log(avctx, AV_LOG_VERBOSE,
974  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
975  ctx->encode_config.rcParams.lookaheadDepth,
976  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
977  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
978  }
979  }
980 
981  if (ctx->strict_gop) {
982  ctx->encode_config.rcParams.strictGOPTarget = 1;
983  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
984  }
985 
986  if (ctx->nonref_p)
987  ctx->encode_config.rcParams.enableNonRefP = 1;
988 
989  if (ctx->zerolatency)
990  ctx->encode_config.rcParams.zeroReorderDelay = 1;
991 
992  if (ctx->quality) {
993  //convert from float to fixed point 8.8
994  int tmp_quality = (int)(ctx->quality * 256.0f);
995  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
996  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
997 
998  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
999 
1000  //CQ mode shall discard avg bitrate & honor max bitrate;
1001  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1002  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1003  }
1004 }
1005 
1007 {
1008  NvencContext *ctx = avctx->priv_data;
1009  NV_ENC_CONFIG *cc = &ctx->encode_config;
1010  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1011  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1012 
1013  vui->colourMatrix = avctx->colorspace;
1014  vui->colourPrimaries = avctx->color_primaries;
1015  vui->transferCharacteristics = avctx->color_trc;
1016  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1018 
1019  vui->colourDescriptionPresentFlag =
1020  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1021 
1022  vui->videoSignalTypePresentFlag =
1023  (vui->colourDescriptionPresentFlag
1024  || vui->videoFormat != 5
1025  || vui->videoFullRangeFlag != 0);
1026 
1027  h264->sliceMode = 3;
1028  h264->sliceModeData = 1;
1029 
1030  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1031  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1032  h264->outputAUD = ctx->aud;
1033 
1034  if (ctx->dpb_size >= 0) {
1035  /* 0 means "let the hardware decide" */
1036  h264->maxNumRefFrames = ctx->dpb_size;
1037  }
1038  if (avctx->gop_size >= 0) {
1039  h264->idrPeriod = cc->gopLength;
1040  }
1041 
1042  if (IS_CBR(cc->rcParams.rateControlMode)) {
1043  h264->outputBufferingPeriodSEI = 1;
1044  }
1045 
1046  h264->outputPictureTimingSEI = 1;
1047 
1048  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1049  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1050  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1051  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1052  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1053  }
1054 
1055  if (ctx->flags & NVENC_LOSSLESS) {
1056  h264->qpPrimeYZeroTransformBypassFlag = 1;
1057  } else {
1058  switch(ctx->profile) {
1060  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1062  break;
1064  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1065  avctx->profile = FF_PROFILE_H264_MAIN;
1066  break;
1068  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1069  avctx->profile = FF_PROFILE_H264_HIGH;
1070  break;
1072  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1074  break;
1075  }
1076  }
1077 
1078  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1079  if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
1080  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1082  }
1083 
1084  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1085 
1086  h264->level = ctx->level;
1087 
1088  if (ctx->coder >= 0)
1089  h264->entropyCodingMode = ctx->coder;
1090 
1091 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1092  h264->useBFramesAsRef = ctx->b_ref_mode;
1093 #endif
1094 
1095 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1096  h264->numRefL0 = avctx->refs;
1097  h264->numRefL1 = avctx->refs;
1098 #endif
1099 
1100  return 0;
1101 }
1102 
1104 {
1105  NvencContext *ctx = avctx->priv_data;
1106  NV_ENC_CONFIG *cc = &ctx->encode_config;
1107  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1108  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1109 
1110  vui->colourMatrix = avctx->colorspace;
1111  vui->colourPrimaries = avctx->color_primaries;
1112  vui->transferCharacteristics = avctx->color_trc;
1113  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1115 
1116  vui->colourDescriptionPresentFlag =
1117  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1118 
1119  vui->videoSignalTypePresentFlag =
1120  (vui->colourDescriptionPresentFlag
1121  || vui->videoFormat != 5
1122  || vui->videoFullRangeFlag != 0);
1123 
1124  hevc->sliceMode = 3;
1125  hevc->sliceModeData = 1;
1126 
1127  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1128  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1129  hevc->outputAUD = ctx->aud;
1130 
1131  if (ctx->dpb_size >= 0) {
1132  /* 0 means "let the hardware decide" */
1133  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1134  }
1135  if (avctx->gop_size >= 0) {
1136  hevc->idrPeriod = cc->gopLength;
1137  }
1138 
1139  if (IS_CBR(cc->rcParams.rateControlMode)) {
1140  hevc->outputBufferingPeriodSEI = 1;
1141  }
1142 
1143  hevc->outputPictureTimingSEI = 1;
1144 
1145  switch (ctx->profile) {
1147  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1148  avctx->profile = FF_PROFILE_HEVC_MAIN;
1149  break;
1151  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1153  break;
1155  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1156  avctx->profile = FF_PROFILE_HEVC_REXT;
1157  break;
1158  }
1159 
1160  // force setting profile as main10 if input is 10 bit
1161  if (IS_10BIT(ctx->data_pix_fmt)) {
1162  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1164  }
1165 
1166  // force setting profile as rext if input is yuv444
1167  if (IS_YUV444(ctx->data_pix_fmt)) {
1168  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1169  avctx->profile = FF_PROFILE_HEVC_REXT;
1170  }
1171 
1172  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1173 
1174  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1175 
1176  hevc->level = ctx->level;
1177 
1178  hevc->tier = ctx->tier;
1179 
1180 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1181  hevc->useBFramesAsRef = ctx->b_ref_mode;
1182 #endif
1183 
1184 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1185  hevc->numRefL0 = avctx->refs;
1186  hevc->numRefL1 = avctx->refs;
1187 #endif
1188 
1189  return 0;
1190 }
1191 
1193 {
1194  switch (avctx->codec->id) {
1195  case AV_CODEC_ID_H264:
1196  return nvenc_setup_h264_config(avctx);
1197  case AV_CODEC_ID_HEVC:
1198  return nvenc_setup_hevc_config(avctx);
1199  /* Earlier switch/case will return if unknown codec is passed. */
1200  }
1201 
1202  return 0;
1203 }
1204 
1205 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1206  int sw, sh;
1207 
1208  sw = avctx->width;
1209  sh = avctx->height;
1210 
1211  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1212  sw *= avctx->sample_aspect_ratio.num;
1213  sh *= avctx->sample_aspect_ratio.den;
1214  }
1215 
1216  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1217 }
1218 
1220 {
1221  NvencContext *ctx = avctx->priv_data;
1223  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1224 
1225  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1226  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1227  AVCPBProperties *cpb_props;
1228  int res = 0;
1229  int dw, dh;
1230 
1231  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1232  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1233 
1234  ctx->init_encode_params.encodeHeight = avctx->height;
1235  ctx->init_encode_params.encodeWidth = avctx->width;
1236 
1237  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1238 
1239  nvenc_map_preset(ctx);
1240 
1241  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1242  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1243 
1244  if (IS_SDK10_PRESET(ctx->preset)) {
1245 #ifdef NVENC_HAVE_NEW_PRESETS
1246  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1247 
1248  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1249  ctx->init_encode_params.encodeGUID,
1250  ctx->init_encode_params.presetGUID,
1251  ctx->init_encode_params.tuningInfo,
1252  &preset_config);
1253 #endif
1254  } else {
1255 #ifdef NVENC_HAVE_NEW_PRESETS
1256  // Turn off tuning info parameter if older presets are on
1257  ctx->init_encode_params.tuningInfo = 0;
1258 #endif
1259 
1260  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1261  ctx->init_encode_params.encodeGUID,
1262  ctx->init_encode_params.presetGUID,
1263  &preset_config);
1264  }
1265  if (nv_status != NV_ENC_SUCCESS)
1266  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1267 
1268  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1269 
1270  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1271 
1272  compute_dar(avctx, &dw, &dh);
1273  ctx->init_encode_params.darHeight = dh;
1274  ctx->init_encode_params.darWidth = dw;
1275 
1276  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1277  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1278  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1279  } else {
1280  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1281  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1282  }
1283 
1284  ctx->init_encode_params.enableEncodeAsync = 0;
1285  ctx->init_encode_params.enablePTD = 1;
1286 
1287 #ifdef NVENC_HAVE_NEW_PRESETS
1288  /* If lookahead isn't set from CLI, use value from preset.
1289  * P6 & P7 presets may enable lookahead for better quality.
1290  * */
1291  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1292  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1293 
1294  if (ctx->init_encode_params.tuningInfo == NV_ENC_TUNING_INFO_LOSSLESS)
1295  ctx->flags |= NVENC_LOSSLESS;
1296 #endif
1297 
1298  if (ctx->weighted_pred == 1)
1299  ctx->init_encode_params.enableWeightedPrediction = 1;
1300 
1301  if (ctx->bluray_compat) {
1302  ctx->aud = 1;
1303  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1304  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1305  switch (avctx->codec->id) {
1306  case AV_CODEC_ID_H264:
1307  /* maximum level depends on used resolution */
1308  break;
1309  case AV_CODEC_ID_HEVC:
1310  ctx->level = NV_ENC_LEVEL_HEVC_51;
1311  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1312  break;
1313  }
1314  }
1315 
1316  if (avctx->gop_size > 0) {
1317  if (avctx->max_b_frames >= 0) {
1318  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1319  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1320  }
1321 
1322  ctx->encode_config.gopLength = avctx->gop_size;
1323  } else if (avctx->gop_size == 0) {
1324  ctx->encode_config.frameIntervalP = 0;
1325  ctx->encode_config.gopLength = 1;
1326  }
1327 
1328  nvenc_recalc_surfaces(avctx);
1329 
1330  nvenc_setup_rate_control(avctx);
1331 
1332  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1333  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1334  } else {
1335  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1336  }
1337 
1338  res = nvenc_setup_codec_config(avctx);
1339  if (res)
1340  return res;
1341 
1342  res = nvenc_push_context(avctx);
1343  if (res < 0)
1344  return res;
1345 
1346  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1347  if (nv_status != NV_ENC_SUCCESS) {
1348  nvenc_pop_context(avctx);
1349  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1350  }
1351 
1352 #ifdef NVENC_HAVE_CUSTREAM_PTR
1353  if (ctx->cu_context) {
1354  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1355  if (nv_status != NV_ENC_SUCCESS) {
1356  nvenc_pop_context(avctx);
1357  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1358  }
1359  }
1360 #endif
1361 
1362  res = nvenc_pop_context(avctx);
1363  if (res < 0)
1364  return res;
1365 
1366  if (ctx->encode_config.frameIntervalP > 1)
1367  avctx->has_b_frames = 2;
1368 
1369  if (ctx->encode_config.rcParams.averageBitRate > 0)
1370  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1371 
1372  cpb_props = ff_add_cpb_side_data(avctx);
1373  if (!cpb_props)
1374  return AVERROR(ENOMEM);
1375  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1376  cpb_props->avg_bitrate = avctx->bit_rate;
1377  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1378 
1379  return 0;
1380 }
1381 
1382 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1383 {
1384  switch (pix_fmt) {
1385  case AV_PIX_FMT_YUV420P:
1386  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1387  case AV_PIX_FMT_NV12:
1388  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1389  case AV_PIX_FMT_P010:
1390  case AV_PIX_FMT_P016:
1391  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1392  case AV_PIX_FMT_YUV444P:
1393  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1394  case AV_PIX_FMT_YUV444P16:
1395  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1396  case AV_PIX_FMT_0RGB32:
1397  return NV_ENC_BUFFER_FORMAT_ARGB;
1398  case AV_PIX_FMT_0BGR32:
1399  return NV_ENC_BUFFER_FORMAT_ABGR;
1400  default:
1401  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1402  }
1403 }
1404 
1405 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1406 {
1407  NvencContext *ctx = avctx->priv_data;
1409  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1410  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1411 
1412  NVENCSTATUS nv_status;
1413  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1414  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1415 
1416  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1417  ctx->surfaces[idx].in_ref = av_frame_alloc();
1418  if (!ctx->surfaces[idx].in_ref)
1419  return AVERROR(ENOMEM);
1420  } else {
1421  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1422 
1424  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1425  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1427  return AVERROR(EINVAL);
1428  }
1429 
1430  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1431  allocSurf.width = avctx->width;
1432  allocSurf.height = avctx->height;
1433  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1434 
1435  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1436  if (nv_status != NV_ENC_SUCCESS) {
1437  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1438  }
1439 
1440  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1441  ctx->surfaces[idx].width = allocSurf.width;
1442  ctx->surfaces[idx].height = allocSurf.height;
1443  }
1444 
1445  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1446  if (nv_status != NV_ENC_SUCCESS) {
1447  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1448  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1449  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1450  av_frame_free(&ctx->surfaces[idx].in_ref);
1451  return err;
1452  }
1453 
1454  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1455  ctx->surfaces[idx].size = allocOut.size;
1456 
1457  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1458 
1459  return 0;
1460 }
1461 
1463 {
1464  NvencContext *ctx = avctx->priv_data;
1465  int i, res = 0, res2;
1466 
1467  ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1468  if (!ctx->surfaces)
1469  return AVERROR(ENOMEM);
1470 
1471  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1472  if (!ctx->timestamp_list)
1473  return AVERROR(ENOMEM);
1474 
1476  if (!ctx->unused_surface_queue)
1477  return AVERROR(ENOMEM);
1478 
1480  if (!ctx->output_surface_queue)
1481  return AVERROR(ENOMEM);
1483  if (!ctx->output_surface_ready_queue)
1484  return AVERROR(ENOMEM);
1485 
1486  res = nvenc_push_context(avctx);
1487  if (res < 0)
1488  return res;
1489 
1490  for (i = 0; i < ctx->nb_surfaces; i++) {
1491  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1492  goto fail;
1493  }
1494 
1495 fail:
1496  res2 = nvenc_pop_context(avctx);
1497  if (res2 < 0)
1498  return res2;
1499 
1500  return res;
1501 }
1502 
1504 {
1505  NvencContext *ctx = avctx->priv_data;
1507  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1508 
1509  NVENCSTATUS nv_status;
1510  uint32_t outSize = 0;
1511  char tmpHeader[256];
1512  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1513  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1514 
1515  payload.spsppsBuffer = tmpHeader;
1516  payload.inBufferSize = sizeof(tmpHeader);
1517  payload.outSPSPPSPayloadSize = &outSize;
1518 
1519  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1520  if (nv_status != NV_ENC_SUCCESS) {
1521  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1522  }
1523 
1524  avctx->extradata_size = outSize;
1526 
1527  if (!avctx->extradata) {
1528  return AVERROR(ENOMEM);
1529  }
1530 
1531  memcpy(avctx->extradata, tmpHeader, outSize);
1532 
1533  return 0;
1534 }
1535 
1537 {
1538  NvencContext *ctx = avctx->priv_data;
1540  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1541  int i, res;
1542 
1543  /* the encoder has to be flushed before it can be closed */
1544  if (ctx->nvencoder) {
1545  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1546  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1547 
1548  res = nvenc_push_context(avctx);
1549  if (res < 0)
1550  return res;
1551 
1552  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1553  }
1554 
1559 
1560  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1561  for (i = 0; i < ctx->nb_registered_frames; i++) {
1562  if (ctx->registered_frames[i].mapped)
1563  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1564  if (ctx->registered_frames[i].regptr)
1565  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1566  }
1567  ctx->nb_registered_frames = 0;
1568  }
1569 
1570  if (ctx->surfaces) {
1571  for (i = 0; i < ctx->nb_surfaces; ++i) {
1572  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1573  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1574  av_frame_free(&ctx->surfaces[i].in_ref);
1575  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1576  }
1577  }
1578  av_freep(&ctx->surfaces);
1579  ctx->nb_surfaces = 0;
1580 
1581  av_frame_free(&ctx->frame);
1582 
1583  if (ctx->nvencoder) {
1584  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1585 
1586  res = nvenc_pop_context(avctx);
1587  if (res < 0)
1588  return res;
1589  }
1590  ctx->nvencoder = NULL;
1591 
1592  if (ctx->cu_context_internal)
1593  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1594  ctx->cu_context = ctx->cu_context_internal = NULL;
1595 
1596 #if CONFIG_D3D11VA
1597  if (ctx->d3d11_device) {
1598  ID3D11Device_Release(ctx->d3d11_device);
1599  ctx->d3d11_device = NULL;
1600  }
1601 #endif
1602 
1603  nvenc_free_functions(&dl_fn->nvenc_dl);
1604  cuda_free_functions(&dl_fn->cuda_dl);
1605 
1606  dl_fn->nvenc_device_count = 0;
1607 
1608  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1609 
1610  return 0;
1611 }
1612 
1614 {
1615  NvencContext *ctx = avctx->priv_data;
1616  int ret;
1617 
1618  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1619  AVHWFramesContext *frames_ctx;
1620  if (!avctx->hw_frames_ctx) {
1621  av_log(avctx, AV_LOG_ERROR,
1622  "hw_frames_ctx must be set when using GPU frames as input\n");
1623  return AVERROR(EINVAL);
1624  }
1625  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1626  if (frames_ctx->format != avctx->pix_fmt) {
1627  av_log(avctx, AV_LOG_ERROR,
1628  "hw_frames_ctx must match the GPU frame type\n");
1629  return AVERROR(EINVAL);
1630  }
1631  ctx->data_pix_fmt = frames_ctx->sw_format;
1632  } else {
1633  ctx->data_pix_fmt = avctx->pix_fmt;
1634  }
1635 
1636  ctx->frame = av_frame_alloc();
1637  if (!ctx->frame)
1638  return AVERROR(ENOMEM);
1639 
1640  if ((ret = nvenc_load_libraries(avctx)) < 0)
1641  return ret;
1642 
1643  if ((ret = nvenc_setup_device(avctx)) < 0)
1644  return ret;
1645 
1646  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1647  return ret;
1648 
1649  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1650  return ret;
1651 
1652  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1653  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1654  return ret;
1655  }
1656 
1657  return 0;
1658 }
1659 
1661 {
1662  NvencSurface *tmp_surf;
1663 
1664  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1665  // queue empty
1666  return NULL;
1667 
1668  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1669  return tmp_surf;
1670 }
1671 
1672 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1673  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1674 {
1675  int dst_linesize[4] = {
1676  lock_buffer_params->pitch,
1677  lock_buffer_params->pitch,
1678  lock_buffer_params->pitch,
1679  lock_buffer_params->pitch
1680  };
1681  uint8_t *dst_data[4];
1682  int ret;
1683 
1684  if (frame->format == AV_PIX_FMT_YUV420P)
1685  dst_linesize[1] = dst_linesize[2] >>= 1;
1686 
1687  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1688  lock_buffer_params->bufferDataPtr, dst_linesize);
1689  if (ret < 0)
1690  return ret;
1691 
1692  if (frame->format == AV_PIX_FMT_YUV420P)
1693  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1694 
1695  av_image_copy(dst_data, dst_linesize,
1696  (const uint8_t**)frame->data, frame->linesize, frame->format,
1697  avctx->width, avctx->height);
1698 
1699  return 0;
1700 }
1701 
1703 {
1704  NvencContext *ctx = avctx->priv_data;
1706  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1707  NVENCSTATUS nv_status;
1708 
1709  int i, first_round;
1710 
1712  for (first_round = 1; first_round >= 0; first_round--) {
1713  for (i = 0; i < ctx->nb_registered_frames; i++) {
1714  if (!ctx->registered_frames[i].mapped) {
1715  if (ctx->registered_frames[i].regptr) {
1716  if (first_round)
1717  continue;
1718  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1719  if (nv_status != NV_ENC_SUCCESS)
1720  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1721  ctx->registered_frames[i].ptr = NULL;
1722  ctx->registered_frames[i].regptr = NULL;
1723  }
1724  return i;
1725  }
1726  }
1727  }
1728  } else {
1729  return ctx->nb_registered_frames++;
1730  }
1731 
1732  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1733  return AVERROR(ENOMEM);
1734 }
1735 
1737 {
1738  NvencContext *ctx = avctx->priv_data;
1740  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1741 
1742  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1743  NV_ENC_REGISTER_RESOURCE reg;
1744  int i, idx, ret;
1745 
1746  for (i = 0; i < ctx->nb_registered_frames; i++) {
1747  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1748  return i;
1749  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1750  return i;
1751  }
1752 
1753  idx = nvenc_find_free_reg_resource(avctx);
1754  if (idx < 0)
1755  return idx;
1756 
1757  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1758  reg.width = frames_ctx->width;
1759  reg.height = frames_ctx->height;
1760  reg.pitch = frame->linesize[0];
1761  reg.resourceToRegister = frame->data[0];
1762 
1763  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1764  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1765  }
1766  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1767  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1768  reg.subResourceIndex = (intptr_t)frame->data[1];
1769  }
1770 
1771  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1772  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1773  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1774  av_get_pix_fmt_name(frames_ctx->sw_format));
1775  return AVERROR(EINVAL);
1776  }
1777 
1778  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1779  if (ret != NV_ENC_SUCCESS) {
1780  nvenc_print_error(avctx, ret, "Error registering an input resource");
1781  return AVERROR_UNKNOWN;
1782  }
1783 
1784  ctx->registered_frames[idx].ptr = frame->data[0];
1785  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1786  ctx->registered_frames[idx].regptr = reg.registeredResource;
1787  return idx;
1788 }
1789 
1791  NvencSurface *nvenc_frame)
1792 {
1793  NvencContext *ctx = avctx->priv_data;
1795  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1796 
1797  int res;
1798  NVENCSTATUS nv_status;
1799 
1800  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1801  int reg_idx = nvenc_register_frame(avctx, frame);
1802  if (reg_idx < 0) {
1803  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1804  return reg_idx;
1805  }
1806 
1807  res = av_frame_ref(nvenc_frame->in_ref, frame);
1808  if (res < 0)
1809  return res;
1810 
1811  if (!ctx->registered_frames[reg_idx].mapped) {
1812  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1813  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1814  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1815  if (nv_status != NV_ENC_SUCCESS) {
1816  av_frame_unref(nvenc_frame->in_ref);
1817  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1818  }
1819  }
1820 
1821  ctx->registered_frames[reg_idx].mapped += 1;
1822 
1823  nvenc_frame->reg_idx = reg_idx;
1824  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1825  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1826  nvenc_frame->pitch = frame->linesize[0];
1827 
1828  return 0;
1829  } else {
1830  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1831 
1832  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1833  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1834 
1835  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1836  if (nv_status != NV_ENC_SUCCESS) {
1837  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1838  }
1839 
1840  nvenc_frame->pitch = lockBufferParams.pitch;
1841  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1842 
1843  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1844  if (nv_status != NV_ENC_SUCCESS) {
1845  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1846  }
1847 
1848  return res;
1849  }
1850 }
1851 
1853  NV_ENC_PIC_PARAMS *params,
1854  NV_ENC_SEI_PAYLOAD *sei_data,
1855  int sei_count)
1856 {
1857  NvencContext *ctx = avctx->priv_data;
1858 
1859  switch (avctx->codec->id) {
1860  case AV_CODEC_ID_H264:
1861  params->codecPicParams.h264PicParams.sliceMode =
1862  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1863  params->codecPicParams.h264PicParams.sliceModeData =
1864  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1865  if (sei_count > 0) {
1866  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1867  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
1868  }
1869 
1870  break;
1871  case AV_CODEC_ID_HEVC:
1872  params->codecPicParams.hevcPicParams.sliceMode =
1873  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1874  params->codecPicParams.hevcPicParams.sliceModeData =
1875  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1876  if (sei_count > 0) {
1877  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1878  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
1879  }
1880 
1881  break;
1882  }
1883 }
1884 
1885 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1886 {
1887  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
1888 }
1889 
1890 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1891 {
1892  int64_t timestamp = AV_NOPTS_VALUE;
1893  if (av_fifo_size(queue) > 0)
1894  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
1895 
1896  return timestamp;
1897 }
1898 
1900  NV_ENC_LOCK_BITSTREAM *params,
1901  AVPacket *pkt)
1902 {
1903  NvencContext *ctx = avctx->priv_data;
1904 
1905  pkt->pts = params->outputTimeStamp;
1907 
1908  pkt->dts -= FFMAX(avctx->max_b_frames, 0) * FFMIN(avctx->ticks_per_frame, 1);
1909 
1910  return 0;
1911 }
1912 
1914 {
1915  NvencContext *ctx = avctx->priv_data;
1917  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1918 
1919  uint32_t slice_mode_data;
1920  uint32_t *slice_offsets = NULL;
1921  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1922  NVENCSTATUS nv_status;
1923  int res = 0;
1924 
1925  enum AVPictureType pict_type;
1926 
1927  switch (avctx->codec->id) {
1928  case AV_CODEC_ID_H264:
1929  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1930  break;
1931  case AV_CODEC_ID_H265:
1932  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1933  break;
1934  default:
1935  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1936  res = AVERROR(EINVAL);
1937  goto error;
1938  }
1939  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1940 
1941  if (!slice_offsets) {
1942  res = AVERROR(ENOMEM);
1943  goto error;
1944  }
1945 
1946  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1947 
1948  lock_params.doNotWait = 0;
1949  lock_params.outputBitstream = tmpoutsurf->output_surface;
1950  lock_params.sliceOffsets = slice_offsets;
1951 
1952  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1953  if (nv_status != NV_ENC_SUCCESS) {
1954  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1955  goto error;
1956  }
1957 
1958  res = av_new_packet(pkt, lock_params.bitstreamSizeInBytes);
1959 
1960  if (res < 0) {
1961  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1962  goto error;
1963  }
1964 
1965  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1966 
1967  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1968  if (nv_status != NV_ENC_SUCCESS) {
1969  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1970  goto error;
1971  }
1972 
1973 
1974  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1975  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
1976  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
1977  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
1978  if (nv_status != NV_ENC_SUCCESS) {
1979  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
1980  goto error;
1981  }
1982  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
1983  res = AVERROR_BUG;
1984  goto error;
1985  }
1986 
1987  av_frame_unref(tmpoutsurf->in_ref);
1988 
1989  tmpoutsurf->input_surface = NULL;
1990  }
1991 
1992  switch (lock_params.pictureType) {
1993  case NV_ENC_PIC_TYPE_IDR:
1994  pkt->flags |= AV_PKT_FLAG_KEY;
1995  case NV_ENC_PIC_TYPE_I:
1996  pict_type = AV_PICTURE_TYPE_I;
1997  break;
1998  case NV_ENC_PIC_TYPE_P:
1999  pict_type = AV_PICTURE_TYPE_P;
2000  break;
2001  case NV_ENC_PIC_TYPE_B:
2002  pict_type = AV_PICTURE_TYPE_B;
2003  break;
2004  case NV_ENC_PIC_TYPE_BI:
2005  pict_type = AV_PICTURE_TYPE_BI;
2006  break;
2007  default:
2008  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2009  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2010  res = AVERROR_EXTERNAL;
2011  goto error;
2012  }
2013 
2014 #if FF_API_CODED_FRAME
2016  avctx->coded_frame->pict_type = pict_type;
2018 #endif
2019 
2021  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2022 
2023  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2024  if (res < 0)
2025  goto error2;
2026 
2027  av_free(slice_offsets);
2028 
2029  return 0;
2030 
2031 error:
2033 
2034 error2:
2035  av_free(slice_offsets);
2036 
2037  return res;
2038 }
2039 
2040 static int output_ready(AVCodecContext *avctx, int flush)
2041 {
2042  NvencContext *ctx = avctx->priv_data;
2043  int nb_ready, nb_pending;
2044 
2045  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
2046  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
2047  if (flush)
2048  return nb_ready > 0;
2049  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2050 }
2051 
2052 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2053 {
2054  NvencContext *ctx = avctx->priv_data;
2055  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2056  NVENCSTATUS ret;
2057 
2058  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2059  int needs_reconfig = 0;
2060  int needs_encode_config = 0;
2061  int reconfig_bitrate = 0, reconfig_dar = 0;
2062  int dw, dh;
2063 
2064  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2065  params.reInitEncodeParams = ctx->init_encode_params;
2066 
2067  compute_dar(avctx, &dw, &dh);
2068  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2069  av_log(avctx, AV_LOG_VERBOSE,
2070  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2071  ctx->init_encode_params.darWidth,
2072  ctx->init_encode_params.darHeight, dw, dh);
2073 
2074  params.reInitEncodeParams.darHeight = dh;
2075  params.reInitEncodeParams.darWidth = dw;
2076 
2077  needs_reconfig = 1;
2078  reconfig_dar = 1;
2079  }
2080 
2081  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2082  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2083  av_log(avctx, AV_LOG_VERBOSE,
2084  "avg bitrate change: %d -> %d\n",
2085  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2086  (uint32_t)avctx->bit_rate);
2087 
2088  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2089  reconfig_bitrate = 1;
2090  }
2091 
2092  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2093  av_log(avctx, AV_LOG_VERBOSE,
2094  "max bitrate change: %d -> %d\n",
2095  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2096  (uint32_t)avctx->rc_max_rate);
2097 
2098  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2099  reconfig_bitrate = 1;
2100  }
2101 
2102  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2103  av_log(avctx, AV_LOG_VERBOSE,
2104  "vbv buffer size change: %d -> %d\n",
2105  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2106  avctx->rc_buffer_size);
2107 
2108  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2109  reconfig_bitrate = 1;
2110  }
2111 
2112  if (reconfig_bitrate) {
2113  params.resetEncoder = 1;
2114  params.forceIDR = 1;
2115 
2116  needs_encode_config = 1;
2117  needs_reconfig = 1;
2118  }
2119  }
2120 
2121  if (!needs_encode_config)
2122  params.reInitEncodeParams.encodeConfig = NULL;
2123 
2124  if (needs_reconfig) {
2125  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2126  if (ret != NV_ENC_SUCCESS) {
2127  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2128  } else {
2129  if (reconfig_dar) {
2130  ctx->init_encode_params.darHeight = dh;
2131  ctx->init_encode_params.darWidth = dw;
2132  }
2133 
2134  if (reconfig_bitrate) {
2135  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2136  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2137  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2138  }
2139 
2140  }
2141  }
2142 }
2143 
2144 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2145 {
2146  NVENCSTATUS nv_status;
2147  NvencSurface *tmp_out_surf, *in_surf;
2148  int res, res2;
2149  NV_ENC_SEI_PAYLOAD sei_data[8];
2150  int sei_count = 0;
2151  int i;
2152 
2153  NvencContext *ctx = avctx->priv_data;
2155  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2156 
2157  NV_ENC_PIC_PARAMS pic_params = { 0 };
2158  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2159 
2160  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2161  return AVERROR(EINVAL);
2162 
2163  if (frame && frame->buf[0]) {
2164  in_surf = get_free_frame(ctx);
2165  if (!in_surf)
2166  return AVERROR(EAGAIN);
2167 
2168  res = nvenc_push_context(avctx);
2169  if (res < 0)
2170  return res;
2171 
2172  reconfig_encoder(avctx, frame);
2173 
2174  res = nvenc_upload_frame(avctx, frame, in_surf);
2175 
2176  res2 = nvenc_pop_context(avctx);
2177  if (res2 < 0)
2178  return res2;
2179 
2180  if (res)
2181  return res;
2182 
2183  pic_params.inputBuffer = in_surf->input_surface;
2184  pic_params.bufferFmt = in_surf->format;
2185  pic_params.inputWidth = in_surf->width;
2186  pic_params.inputHeight = in_surf->height;
2187  pic_params.inputPitch = in_surf->pitch;
2188  pic_params.outputBitstream = in_surf->output_surface;
2189 
2190  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2191  if (frame->top_field_first)
2192  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2193  else
2194  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2195  } else {
2196  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2197  }
2198 
2199  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2200  pic_params.encodePicFlags =
2201  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2202  } else {
2203  pic_params.encodePicFlags = 0;
2204  }
2205 
2206  pic_params.inputTimeStamp = frame->pts;
2207 
2208  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2209  void *a53_data = NULL;
2210  size_t a53_size = 0;
2211 
2212  if (ff_alloc_a53_sei(frame, 0, (void**)&a53_data, &a53_size) < 0) {
2213  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2214  }
2215 
2216  if (a53_data) {
2217  sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2218  sei_data[sei_count].payloadType = 4;
2219  sei_data[sei_count].payload = (uint8_t*)a53_data;
2220  sei_count ++;
2221  }
2222  }
2223 
2225  void *tc_data = NULL;
2226  size_t tc_size = 0;
2227 
2228  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, (void**)&tc_data, &tc_size) < 0) {
2229  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2230  }
2231 
2232  if (tc_data) {
2233  sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2234  sei_data[sei_count].payloadType = HEVC_SEI_TYPE_TIME_CODE;
2235  sei_data[sei_count].payload = (uint8_t*)tc_data;
2236  sei_count ++;
2237  }
2238  }
2239 
2240  nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data, sei_count);
2241  } else {
2242  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2243  }
2244 
2245  res = nvenc_push_context(avctx);
2246  if (res < 0)
2247  return res;
2248 
2249  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2250 
2251  for ( i = 0; i < sei_count; i++)
2252  av_freep(&sei_data[i].payload);
2253 
2254  res = nvenc_pop_context(avctx);
2255  if (res < 0)
2256  return res;
2257 
2258  if (nv_status != NV_ENC_SUCCESS &&
2259  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2260  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2261 
2262  if (frame && frame->buf[0]) {
2263  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2265  }
2266 
2267  /* all the pending buffers are now ready for output */
2268  if (nv_status == NV_ENC_SUCCESS) {
2269  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2270  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2271  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2272  }
2273  }
2274 
2275  return 0;
2276 }
2277 
2279 {
2280  NvencSurface *tmp_out_surf;
2281  int res, res2;
2282 
2283  NvencContext *ctx = avctx->priv_data;
2284 
2285  AVFrame *frame = ctx->frame;
2286 
2287  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2288  return AVERROR(EINVAL);
2289 
2290  if (!frame->buf[0]) {
2291  res = ff_encode_get_frame(avctx, frame);
2292  if (res < 0 && res != AVERROR_EOF)
2293  return res;
2294  }
2295 
2296  res = nvenc_send_frame(avctx, frame);
2297  if (res < 0) {
2298  if (res != AVERROR(EAGAIN))
2299  return res;
2300  } else
2301  av_frame_unref(frame);
2302 
2303  if (output_ready(avctx, avctx->internal->draining)) {
2304  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2305 
2306  res = nvenc_push_context(avctx);
2307  if (res < 0)
2308  return res;
2309 
2310  res = process_output_surface(avctx, pkt, tmp_out_surf);
2311 
2312  res2 = nvenc_pop_context(avctx);
2313  if (res2 < 0)
2314  return res2;
2315 
2316  if (res)
2317  return res;
2318 
2319  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2320  } else if (avctx->internal->draining) {
2321  return AVERROR_EOF;
2322  } else {
2323  return AVERROR(EAGAIN);
2324  }
2325 
2326  return 0;
2327 }
2328 
2330 {
2331  NvencContext *ctx = avctx->priv_data;
2332 
2333  nvenc_send_frame(avctx, NULL);
2335 }
const GUID guid
Definition: nvenc.c:648
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1900
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
int no_scenecut
Definition: nvenc.h:197
#define NULL
Definition: coverity.c:32
const struct AVCodec * codec
Definition: avcodec.h:535
AVRational framerate
Definition: avcodec.h:2069
BI type.
Definition: avutil.h:280
void * nvencoder
Definition: nvenc.h:183
int support_dyn_bitrate
Definition: nvenc.h:181
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1536
int twopass
Definition: nvenc.h:191
#define CHECK_CU(x)
Definition: nvenc.c:39
static enum AVPixelFormat pix_fmt
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:83
int height
Definition: nvenc.h:79
This structure describes decoded (raw) audio or video data.
Definition: frame.h:308
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1192
AVFifoBuffer * timestamp_list
Definition: nvenc.h:166
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:796
static void flush(AVCodecContext *avctx)
NvencFunctions * nvenc_dl
Definition: nvenc.h:90
int mapped
Definition: nvenc.h:172
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:321
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:725
AVFrame * in_ref
Definition: nvenc.h:76
#define P1
Definition: cavsdsp.c:39
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
misc image utilities
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:200
int64_t bit_rate
the average bitrate
Definition: avcodec.h:576
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
Memory handling functions.
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:541
AVBufferRef * buf[AV_NUM_DATA_POINTERS]
AVBuffer references backing the data for this frame.
Definition: frame.h:499
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2144
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:99
const char * desc
Definition: nvenc.c:88
int max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: avcodec.h:454
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:786
int forced_idr
Definition: nvenc.h:198
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:1161
int num
Numerator.
Definition: rational.h:59
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:168
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:652
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1462
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:92
NvencDynLoadFunctions nvenc_dload_funcs
Definition: nvenc.h:149
ID3D11Device * d3d11_device
Definition: nvenc.h:156
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel...
Definition: avcodec.h:905
int width
The allocated dimensions of the frames in this pool.
Definition: hwcontext.h:229
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:736
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2278
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:237
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:832
static AVPacket pkt
int init_qp_b
Definition: nvenc.h:209
static void error(const char *err)
#define PRESET(name,...)
Definition: nvenc.c:655
int profile
profile
Definition: avcodec.h:1859
int preset
Definition: nvenc.h:185
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:838
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:801
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1660
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:871
int pitch
Definition: nvenc.h:80
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:122
int nvenc_device_count
Definition: nvenc.h:93
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1910
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:75
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented...
Definition: avcodec.h:649
NVENCSTATUS nverr
Definition: nvenc.c:86
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:751
AVBufferRef * hw_frames_ctx
For hwaccel-format frames, this should be a reference to the AVHWFramesContext describing the frame...
Definition: frame.h:647
int aq
Definition: nvenc.h:196
#define AV_PIX_FMT_P016
Definition: pixfmt.h:449
int b_ref_mode
Definition: nvenc.h:214
#define AV_PIX_FMT_P010
Definition: pixfmt.h:448
CUcontext cu_context
Definition: nvenc.h:153
struct NvencContext::@116 registered_frames[MAX_REGISTERED_FRAMES]
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1898
#define DEFAULT
Definition: avdct.c:28
uint8_t
AVFifoBuffer * unused_surface_queue
Definition: nvenc.h:163
#define av_cold
Definition: attributes.h:88
#define av_malloc(s)
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:190
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:52
static const struct @110 nvenc_errors[]
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:795
int init_qp_p
Definition: nvenc.h:208
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:258
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1947
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:456
int64_t pts
Presentation timestamp in time_base units (time when frame should be shown to user).
Definition: frame.h:401
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:627
float quality
Definition: nvenc.h:205
NV_ENC_INITIALIZE_PARAMS init_encode_params
Definition: nvenc.h:151
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1405
#define height
ID3D11Device * device
Device used for texture creation and access.
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
uint8_t * data
Definition: packet.h:363
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1503
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
#define AVERROR_EOF
End of file.
Definition: error.h:55
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:210
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:349
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:412
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1736
#define IS_SDK10_PRESET(p)
Definition: nvenc.c:49
int buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: avcodec.h:481
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:96
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1948
AVFifoBuffer * output_surface_ready_queue
Definition: nvenc.h:165
#define av_log(a,...)
CUcontext cu_context_internal
Definition: nvenc.h:154
An API-specific header for AV_HWDEVICE_TYPE_CUDA.
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:401
int ptr_index
Definition: nvenc.h:170
#define P3
int async_depth
Definition: nvenc.h:194
int av_new_packet(AVPacket *pkt, int size)
Allocate the payload of a packet and initialize its fields with default values.
Definition: avpacket.c:88
enum AVCodecID id
Definition: codec.h:204
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:270
void * ptr
Definition: nvenc.h:169
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:194
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:816
int coder
Definition: nvenc.h:213
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:1885
int rc
Definition: nvenc.h:189
int nb_registered_frames
Definition: nvenc.h:175
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:203
int qmax
maximum quantizer
Definition: avcodec.h:1375
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:118
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:213
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1902
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:606
GLenum GLint * params
Definition: opengl_enc.c:113
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
simple assert() macros that are a bit more flexible than ISO C assert().
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:377
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:831
const AVCodecHWConfigInternal * ff_nvenc_hw_configs[]
Definition: nvenc.c:68
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1103
GLsizei count
Definition: opengl_enc.c:108
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1382
#define FFMAX(a, b)
Definition: common.h:94
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:692
#define fail()
Definition: checkasm.h:123
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
int level
Definition: nvenc.h:187
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:369
int bluray_compat
Definition: nvenc.h:207
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1389
int aq_strength
Definition: nvenc.h:204
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:296
int refs
number of reference frames
Definition: avcodec.h:1114
int flags
Definition: nvenc.h:193
enum AVPictureType pict_type
Picture type of the frame.
Definition: frame.h:391
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1790
NV_ENC_REGISTERED_PTR regptr
Definition: nvenc.h:171
#define FFMIN(a, b)
Definition: common.h:96
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1219
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:51
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1613
#define width
Definition: af_afade.c:54
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:1913
int width
picture width / height.
Definition: avcodec.h:699
int dpb_size
Definition: nvenc.h:217
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames...
Definition: avcodec.h:2226
#define NVENC_CAP
Definition: nvenc.c:41
AVFormatContext * ctx
Definition: movenc.c:48
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:1140
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1672
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:82
int dummy
Definition: motion.c:64
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:658
int profile
Definition: nvenc.h:186
AVFifoBuffer * output_surface_queue
Definition: nvenc.h:164
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:153
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:56
HW acceleration through CUDA.
Definition: pixfmt.h:235
#define AV_CODEC_ID_H265
Definition: codec_id.h:224
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1006
int tuning_info
Definition: nvenc.h:218
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:174
#define FF_ARRAY_ELEMS(a)
Full range content.
Definition: pixfmt.h:586
if(ret)
CudaFunctions * cuda_dl
Definition: nvenc.h:89
enum AVPixelFormat data_pix_fmt
Definition: nvenc.h:179
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:78
int format
format of the frame, -1 if unknown or unset Values correspond to enum AVPixelFormat for video frames...
Definition: frame.h:381
This structure describes the bitrate properties of an encoded bitstream.
Definition: avcodec.h:448
#define AV_LOG_INFO
Standard information.
Definition: log.h:205
NV_ENC_CONFIG encode_config
Definition: nvenc.h:152
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:247
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:146
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:77
int linesize[AV_NUM_DATA_POINTERS]
For video, size in bytes of each picture line.
Definition: frame.h:339
int strict_gop
Definition: nvenc.h:203
int temporal_aq
Definition: nvenc.h:200
main external API structure.
Definition: avcodec.h:526
uint8_t * data
The data buffer.
Definition: buffer.h:89
int qmin
minimum quantizer
Definition: avcodec.h:1368
#define BD
int init_qp_i
Definition: nvenc.h:210
int extradata_size
Definition: avcodec.h:628
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:50
This struct is allocated as AVHWDeviceContext.hwctx.
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:332
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:1154
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:1147
int width
Definition: nvenc.h:78
int multipass
Definition: nvenc.h:219
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
#define IS_CBR(rc)
Definition: nvenc.c:42
AVPictureType
Definition: avutil.h:272
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2329
int flags
Definition: nvenc.c:649
int nonref_p
Definition: nvenc.h:202
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:808
int cbr
Definition: nvenc.h:190
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1702
int averr
Definition: nvenc.c:87
int s12m_tc
Definition: nvenc.h:216
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:566
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:592
#define flags(name, subs,...)
Definition: cbs_av1.c:560
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1205
uint8_t * data[AV_NUM_DATA_POINTERS]
pointer to the picture/channel planes.
Definition: frame.h:322
int reg_idx
Definition: nvenc.h:77
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:1852
uint8_t level
Definition: svq3.c:205
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:329
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:313
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:721
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info...
Definition: utils.c:2232
int
int b_adapt
Definition: nvenc.h:199
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:1890
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:84
common internal api header.
int weighted_pred
Definition: nvenc.h:212
int rc_lookahead
Definition: nvenc.h:195
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2040
Bi-dir predicted.
Definition: avutil.h:276
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
attribute_deprecated AVFrame * coded_frame
the picture in the bitstream
Definition: avcodec.h:1776
int size
Definition: nvenc.h:84
NvencSurface * surfaces
Definition: nvenc.h:161
int den
Denominator.
Definition: rational.h:60
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:71
NV_ENC_MAP_INPUT_RESOURCE in_map
Definition: nvenc.h:173
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:2019
#define AV_INPUT_BUFFER_PADDING_SIZE
Required number of additionally allocated bytes at the end of the input bitstream for decoding...
Definition: avcodec.h:215
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2052
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1950
void * priv_data
Definition: avcodec.h:553
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:1899
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:663
#define av_free(p)
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:85
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:43
int top_field_first
If the content is interlaced, is top field displayed first.
Definition: frame.h:460
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:203
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:466
int avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: avcodec.h:472
CUstream cu_stream
Definition: nvenc.h:155
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:561
#define P2
Definition: cavsdsp.c:38
int device
Definition: nvenc.h:192
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed...
Definition: packet.h:362
This struct is allocated as AVHWDeviceContext.hwctx.
int nb_surfaces
Definition: nvenc.h:160
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:133
int aud
Definition: nvenc.h:206
int cqp
Definition: nvenc.h:211
#define av_freep(p)
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:787
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:63
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:188
#define FFSWAP(type, a, b)
Definition: common.h:99
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2489
int tier
Definition: nvenc.h:188
int ldkfs
Definition: nvenc.h:220
int a53_cc
Definition: nvenc.h:215
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied...
Definition: fifo.c:71
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later.That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another.Frame references ownership and permissions
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:2278
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
AVFrame * frame
Definition: nvenc.h:158
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:57
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
static double val(void *priv, double ch)
Definition: aeval.c:76
This structure stores compressed data.
Definition: packet.h:340
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:82
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:356
for(j=16;j >0;--j)
int i
Definition: input.c:407
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
Predicted.
Definition: avutil.h:275
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:657
int zerolatency
Definition: nvenc.h:201
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:376
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1404
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:107
void * av_mallocz_array(size_t nmemb, size_t size)
Definition: mem.c:190
const char * name
Definition: opengl_enc.c:102