FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
31 #include "libavutil/hwcontext_cuda.h"
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
37 #include "libavutil/timecode_internal.h"
38 #include "libavutil/mathematics.h"
39 #include "libavutil/mastering_display_metadata.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 
47 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48 
49 #define NVENC_CAP 0x30
50 
51 #ifndef NVENC_NO_DEPRECATED_RC
52 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
53  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
54  rc == NV_ENC_PARAMS_RC_CBR_HQ)
55 #else
56 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
57 #endif
58 
59 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
60  AV_PIX_FMT_YUV420P,
61  AV_PIX_FMT_NV12,
62  AV_PIX_FMT_P010,
63  AV_PIX_FMT_YUV444P,
64  AV_PIX_FMT_P016, // Truncated to 10bits
65 #ifdef NVENC_HAVE_422_SUPPORT
66  AV_PIX_FMT_NV16,
67  AV_PIX_FMT_P210,
68  AV_PIX_FMT_P216,
69 #endif
70  AV_PIX_FMT_YUV444P10MSB,
71  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
72  AV_PIX_FMT_0RGB32,
73  AV_PIX_FMT_RGB32,
74  AV_PIX_FMT_0BGR32,
75  AV_PIX_FMT_BGR32,
76  AV_PIX_FMT_X2RGB10,
77  AV_PIX_FMT_X2BGR10,
78  AV_PIX_FMT_GBRP,
79  AV_PIX_FMT_GBRP10MSB,
80  AV_PIX_FMT_GBRP16, // Truncated to 10bits
81  AV_PIX_FMT_CUDA,
82 #if CONFIG_D3D11VA
83  AV_PIX_FMT_D3D11,
84 #endif
85  AV_PIX_FMT_NONE
86 };
87 
88 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
89  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
90  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
91 #if CONFIG_D3D11VA
92  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
93  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
94 #endif
95  NULL,
96 };
97 
98 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
99  pix_fmt == AV_PIX_FMT_P016 || \
100  pix_fmt == AV_PIX_FMT_P210 || \
101  pix_fmt == AV_PIX_FMT_P216 || \
102  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_X2RGB10 || \
105  pix_fmt == AV_PIX_FMT_X2BGR10 || \
106  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
107  pix_fmt == AV_PIX_FMT_GBRP16)
108 
109 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
110  pix_fmt == AV_PIX_FMT_RGB32 || \
111  pix_fmt == AV_PIX_FMT_0BGR32 || \
112  pix_fmt == AV_PIX_FMT_BGR32 || \
113  pix_fmt == AV_PIX_FMT_X2RGB10 || \
114  pix_fmt == AV_PIX_FMT_X2BGR10)
115 
116 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
117  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
118  pix_fmt == AV_PIX_FMT_YUV444P16 || \
119  pix_fmt == AV_PIX_FMT_GBRP || \
120  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
121  pix_fmt == AV_PIX_FMT_GBRP16 || \
122  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
123 
124 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
125  pix_fmt == AV_PIX_FMT_P210 || \
126  pix_fmt == AV_PIX_FMT_P216)
127 
128 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
129  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
130  pix_fmt == AV_PIX_FMT_GBRP16)
131 
132 static const struct {
133  NVENCSTATUS nverr;
134  int averr;
135  const char *desc;
136 } nvenc_errors[] = {
137  { NV_ENC_SUCCESS, 0, "success" },
138  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
139  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
140  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
141  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
142  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
143  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
144  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
145  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
146  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
147  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
148  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
149  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
150  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
151  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
152  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
153  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
154  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
155  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
156  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
157  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
158  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
159  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
160  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
161  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
162  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
163 };
164 
165 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
166 {
167  int i;
168  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
169  if (nvenc_errors[i].nverr == err) {
170  if (desc)
171  *desc = nvenc_errors[i].desc;
172  return nvenc_errors[i].averr;
173  }
174  }
175  if (desc)
176  *desc = "unknown error";
177  return AVERROR_UNKNOWN;
178 }
179 
180 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
181  const char *error_string)
182 {
183  const char *desc;
184  const char *details = "(no details)";
185  int ret = nvenc_map_error(err, &desc);
186 
187 #ifdef NVENC_HAVE_GETLASTERRORSTRING
188  NvencContext *ctx = avctx->priv_data;
189  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
190 
191  if (p_nvenc && ctx->nvencoder)
192  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
193 #endif
194 
195  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
196 
197  return ret;
198 }
199 
200 typedef struct GUIDTuple {
201  const GUID guid;
202  int flags;
203 } GUIDTuple;
204 
205 #define PRESET_ALIAS(alias, name, ...) \
206  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
207 
208 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
209 
210 static void nvenc_map_preset(NvencContext *ctx)
211 {
212  GUIDTuple presets[] = {
213 #ifdef NVENC_HAVE_NEW_PRESETS
214  PRESET(P1),
215  PRESET(P2),
216  PRESET(P3),
217  PRESET(P4),
218  PRESET(P5),
219  PRESET(P6),
220  PRESET(P7),
221  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
222  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
223  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
224  // Compat aliases
225  PRESET_ALIAS(DEFAULT, P4, NVENC_DEPRECATED_PRESET),
226  PRESET_ALIAS(HP, P1, NVENC_DEPRECATED_PRESET),
227  PRESET_ALIAS(HQ, P7, NVENC_DEPRECATED_PRESET),
228  PRESET_ALIAS(BD, P5, NVENC_DEPRECATED_PRESET),
229  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
230  PRESET_ALIAS(LOW_LATENCY_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
231  PRESET_ALIAS(LOW_LATENCY_HQ, P7, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
232  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
233  PRESET_ALIAS(LOSSLESS_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
234 #else
235  PRESET(DEFAULT),
236  PRESET(HP),
237  PRESET(HQ),
238  PRESET(BD),
239  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
240  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
241  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
242  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
243  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
244  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
245  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
246  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
247 #endif
248  };
249 
250  GUIDTuple *t = &presets[ctx->preset];
251 
252  ctx->init_encode_params.presetGUID = t->guid;
253  ctx->flags = t->flags;
254 
255 #ifdef NVENC_HAVE_NEW_PRESETS
256  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
257  ctx->flags |= NVENC_LOSSLESS;
258 #endif
259 }
260 
261 #undef PRESET
262 #undef PRESET_ALIAS
263 
264 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
265 {
266 #if NVENCAPI_CHECK_VERSION(13, 1)
267  const char *minver = "(unknown)";
268 #elif NVENCAPI_CHECK_VERSION(13, 0)
269  const char *minver = "570.0";
270 #elif NVENCAPI_CHECK_VERSION(12, 2)
271 # if defined(_WIN32) || defined(__CYGWIN__)
272  const char *minver = "551.76";
273 # else
274  const char *minver = "550.54.14";
275 # endif
276 #elif NVENCAPI_CHECK_VERSION(12, 1)
277 # if defined(_WIN32) || defined(__CYGWIN__)
278  const char *minver = "531.61";
279 # else
280  const char *minver = "530.41.03";
281 # endif
282 #elif NVENCAPI_CHECK_VERSION(12, 0)
283 # if defined(_WIN32) || defined(__CYGWIN__)
284  const char *minver = "522.25";
285 # else
286  const char *minver = "520.56.06";
287 # endif
288 #elif NVENCAPI_CHECK_VERSION(11, 1)
289 # if defined(_WIN32) || defined(__CYGWIN__)
290  const char *minver = "471.41";
291 # else
292  const char *minver = "470.57.02";
293 # endif
294 #elif NVENCAPI_CHECK_VERSION(11, 0)
295 # if defined(_WIN32) || defined(__CYGWIN__)
296  const char *minver = "456.71";
297 # else
298  const char *minver = "455.28";
299 # endif
300 #elif NVENCAPI_CHECK_VERSION(10, 0)
301 # if defined(_WIN32) || defined(__CYGWIN__)
302  const char *minver = "450.51";
303 # else
304  const char *minver = "445.87";
305 # endif
306 #elif NVENCAPI_CHECK_VERSION(9, 1)
307 # if defined(_WIN32) || defined(__CYGWIN__)
308  const char *minver = "436.15";
309 # else
310  const char *minver = "435.21";
311 # endif
312 #elif NVENCAPI_CHECK_VERSION(9, 0)
313 # if defined(_WIN32) || defined(__CYGWIN__)
314  const char *minver = "418.81";
315 # else
316  const char *minver = "418.30";
317 # endif
318 #elif NVENCAPI_CHECK_VERSION(8, 2)
319 # if defined(_WIN32) || defined(__CYGWIN__)
320  const char *minver = "397.93";
321 # else
322  const char *minver = "396.24";
323 #endif
324 #elif NVENCAPI_CHECK_VERSION(8, 1)
325 # if defined(_WIN32) || defined(__CYGWIN__)
326  const char *minver = "390.77";
327 # else
328  const char *minver = "390.25";
329 # endif
330 #else
331 # if defined(_WIN32) || defined(__CYGWIN__)
332  const char *minver = "378.66";
333 # else
334  const char *minver = "378.13";
335 # endif
336 #endif
337  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
338 }
339 
340 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
341 {
342  NvencContext *ctx = avctx->priv_data;
343  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
344  NVENCSTATUS err;
345  uint32_t nvenc_max_ver;
346  int ret;
347 
348  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
349  if (ret < 0)
350  return ret;
351 
352  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
353  if (ret < 0) {
354  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
355  return ret;
356  }
357 
358  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
359  if (err != NV_ENC_SUCCESS)
360  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
361 
362  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
363 
364  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
365  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
366  "Required: %d.%d Found: %d.%d\n",
367  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
368  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
369  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
370  return AVERROR(ENOSYS);
371  }
372 
373  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
374 
375  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
376  if (err != NV_ENC_SUCCESS)
377  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
378 
379  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
380 
381  return 0;
382 }
383 
384 static int nvenc_push_context(AVCodecContext *avctx)
385 {
386  NvencContext *ctx = avctx->priv_data;
387  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
388 
389  if (ctx->d3d11_device)
390  return 0;
391 
392  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
393 }
394 
395 static int nvenc_pop_context(AVCodecContext *avctx)
396 {
397  NvencContext *ctx = avctx->priv_data;
398  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
399  CUcontext dummy;
400 
401  if (ctx->d3d11_device)
402  return 0;
403 
404  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
405 }
406 
407 static av_cold int nvenc_open_session(AVCodecContext *avctx)
408 {
409  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
410  NvencContext *ctx = avctx->priv_data;
411  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
412  NVENCSTATUS ret;
413 
414  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
415  params.apiVersion = NVENCAPI_VERSION;
416  if (ctx->d3d11_device) {
417  params.device = ctx->d3d11_device;
418  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
419  } else {
420  params.device = ctx->cu_context;
421  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
422  }
423 
424  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
425  if (ret != NV_ENC_SUCCESS) {
426  ctx->nvencoder = NULL;
427  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
428  }
429 
430  return 0;
431 }
432 
433 static int nvenc_check_codec_support(AVCodecContext *avctx)
434 {
435  NvencContext *ctx = avctx->priv_data;
436  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
437  int i, ret, count = 0;
438  GUID *guids = NULL;
439 
440  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
441 
442  if (ret != NV_ENC_SUCCESS || !count)
443  return AVERROR(ENOSYS);
444 
445  guids = av_malloc(count * sizeof(GUID));
446  if (!guids)
447  return AVERROR(ENOMEM);
448 
449  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
450  if (ret != NV_ENC_SUCCESS) {
451  ret = AVERROR(ENOSYS);
452  goto fail;
453  }
454 
455  ret = AVERROR(ENOSYS);
456  for (i = 0; i < count; i++) {
457  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
458  ret = 0;
459  break;
460  }
461  }
462 
463 fail:
464  av_free(guids);
465 
466  return ret;
467 }
468 
469 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
470 {
471  NvencContext *ctx = avctx->priv_data;
472  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
473  NV_ENC_CAPS_PARAM params = { 0 };
474  int ret, val = 0;
475 
476  params.version = NV_ENC_CAPS_PARAM_VER;
477  params.capsToQuery = cap;
478 
479  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
480 
481  if (ret == NV_ENC_SUCCESS)
482  return val;
483  return 0;
484 }
485 
486 static int nvenc_check_capabilities(AVCodecContext *avctx)
487 {
488  NvencContext *ctx = avctx->priv_data;
489  int tmp, ret;
490 
491  ret = nvenc_check_codec_support(avctx);
492  if (ret < 0) {
493  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
494  return ret;
495  }
496 
497  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
498  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
499  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
500  return AVERROR(ENOSYS);
501  }
502 
503 #ifdef NVENC_HAVE_422_SUPPORT
504  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
505 #else
506  ret = 0;
507 #endif
508  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
509  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
510  return AVERROR(ENOSYS);
511  }
512 
513  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
514  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
515  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
516  return AVERROR(ENOSYS);
517  }
518 
519  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
520  if (ret < avctx->width) {
521  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
522  avctx->width, ret);
523  return AVERROR(ENOSYS);
524  }
525 
526  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
527  if (ret < avctx->height) {
528  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
529  avctx->height, ret);
530  return AVERROR(ENOSYS);
531  }
532 
533  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
534  if (ret < avctx->max_b_frames) {
535  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
536  avctx->max_b_frames, ret);
537 
538  return AVERROR(ENOSYS);
539  }
540 
541  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
542  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
543  av_log(avctx, AV_LOG_WARNING,
544  "Interlaced encoding is not supported. Supported level: %d\n",
545  ret);
546  return AVERROR(ENOSYS);
547  }
548 
549  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
550  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
551  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
552  return AVERROR(ENOSYS);
553  }
554 
555  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
556  if (ctx->rc_lookahead > 0 && ret <= 0) {
557  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
558  return AVERROR(ENOSYS);
559  }
560 
561  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
562  if (ctx->temporal_aq > 0 && ret <= 0) {
563  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
564  return AVERROR(ENOSYS);
565  }
566 
567  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
568  if (ctx->weighted_pred > 0 && ret <= 0) {
569  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
570  return AVERROR(ENOSYS);
571  }
572 
573  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
574  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
575  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
576  return AVERROR(ENOSYS);
577  }
578 
579 #ifdef NVENC_HAVE_BFRAME_REF_MODE
580  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
581  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
582  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
583  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
584  return AVERROR(ENOSYS);
585  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
586  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
587  return AVERROR(ENOSYS);
588  }
589 #else
590  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
591  if (tmp > 0) {
592  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
593  return AVERROR(ENOSYS);
594  }
595 #endif
596 
597 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
598  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
599  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
600  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
601  return AVERROR(ENOSYS);
602  }
603 #else
604  if(avctx->refs != 0) {
605  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
606  return AVERROR(ENOSYS);
607  }
608 #endif
609 
610 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
611  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
612  if(ctx->single_slice_intra_refresh && ret <= 0) {
613  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
614  return AVERROR(ENOSYS);
615  }
616 #else
617  if(ctx->single_slice_intra_refresh) {
618  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
619  return AVERROR(ENOSYS);
620  }
621 #endif
622 
623  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
624  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
625  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
626  return AVERROR(ENOSYS);
627  }
628 
629 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
630  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
631  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
632  return AVERROR(ENOSYS);
633  }
634 #endif
635 
636  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
637  if(ctx->constrained_encoding && ret <= 0) {
638  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
639  return AVERROR(ENOSYS);
640  }
641 
642 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
643  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
644  if(ctx->tf_level > 0 && ret <= 0) {
645  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
646  return AVERROR(ENOSYS);
647  }
648 #endif
649 
650 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
651  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
652  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
653  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
654  ctx->lookahead_level > ret)
655  {
656  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
657  return AVERROR(ENOSYS);
658  }
659 #endif
660 
661 #ifdef NVENC_HAVE_UNIDIR_B
662  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
663  if(ctx->unidir_b && ret <= 0) {
664  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
665  return AVERROR(ENOSYS);
666  }
667 #endif
668 
669  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
670 
671 #ifdef NVENC_HAVE_MVHEVC
672  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
673  if(ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && !ctx->multiview_supported) {
674  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
675  return AVERROR(ENOSYS);
676  }
677 #endif
678 
679  return 0;
680 }
681 
682 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
683 {
684  NvencContext *ctx = avctx->priv_data;
685  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
686  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
687  char name[128] = { 0};
688  int major, minor, ret;
689  CUdevice cu_device;
690  int loglevel = AV_LOG_VERBOSE;
691 
692  if (ctx->device == LIST_DEVICES)
693  loglevel = AV_LOG_INFO;
694 
695  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
696  if (ret < 0)
697  return ret;
698 
699  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
700  if (ret < 0)
701  return ret;
702 
703  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
704  if (ret < 0)
705  return ret;
706 
707  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
708  if (((major << 4) | minor) < NVENC_CAP) {
709  av_log(avctx, loglevel, "does not support NVENC\n");
710  goto fail;
711  }
712 
713  if (ctx->device != idx && ctx->device != ANY_DEVICE)
714  return -1;
715 
716  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
717  if (ret < 0)
718  goto fail;
719 
720  ctx->cu_context = ctx->cu_context_internal;
721  ctx->cu_stream = NULL;
722 
723  if ((ret = nvenc_pop_context(avctx)) < 0)
724  goto fail2;
725 
726  if ((ret = nvenc_open_session(avctx)) < 0)
727  goto fail2;
728 
729  if ((ret = nvenc_check_capabilities(avctx)) < 0)
730  goto fail3;
731 
732  av_log(avctx, loglevel, "supports NVENC\n");
733 
734  dl_fn->nvenc_device_count++;
735 
736  if (ctx->device == idx || ctx->device == ANY_DEVICE)
737  return 0;
738 
739 fail3:
740  if ((ret = nvenc_push_context(avctx)) < 0)
741  return ret;
742 
743  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
744  ctx->nvencoder = NULL;
745 
746  if ((ret = nvenc_pop_context(avctx)) < 0)
747  return ret;
748 
749 fail2:
750  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
751  ctx->cu_context_internal = NULL;
752 
753 fail:
754  return AVERROR(ENOSYS);
755 }
756 
757 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
758 {
759  NvencContext *ctx = avctx->priv_data;
760  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
761 
762  switch (avctx->codec->id) {
763  case AV_CODEC_ID_H264:
764  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
765  break;
766  case AV_CODEC_ID_HEVC:
767  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
768  break;
769 #if CONFIG_AV1_NVENC_ENCODER
770  case AV_CODEC_ID_AV1:
771  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
772  break;
773 #endif
774  default:
775  return AVERROR_BUG;
776  }
777 
778  nvenc_map_preset(ctx);
779 
780  if (ctx->flags & NVENC_DEPRECATED_PRESET)
781  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
782 
783  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
784  AVHWFramesContext *frames_ctx;
785  AVHWDeviceContext *hwdev_ctx;
786  AVCUDADeviceContext *cuda_device_hwctx = NULL;
787 #if CONFIG_D3D11VA
788  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
789 #endif
790  int ret;
791 
792  if (avctx->hw_frames_ctx) {
793  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
794  if (frames_ctx->format == AV_PIX_FMT_CUDA)
795  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
796 #if CONFIG_D3D11VA
797  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
798  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
799 #endif
800  else
801  return AVERROR(EINVAL);
802  } else if (avctx->hw_device_ctx) {
803  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
804  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
805  cuda_device_hwctx = hwdev_ctx->hwctx;
806 #if CONFIG_D3D11VA
807  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
808  d3d11_device_hwctx = hwdev_ctx->hwctx;
809 #endif
810  else
811  return AVERROR(EINVAL);
812  } else {
813  return AVERROR(EINVAL);
814  }
815 
816  if (cuda_device_hwctx) {
817  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
818  ctx->cu_stream = cuda_device_hwctx->stream;
819  }
820 #if CONFIG_D3D11VA
821  else if (d3d11_device_hwctx) {
822  ctx->d3d11_device = d3d11_device_hwctx->device;
823  ID3D11Device_AddRef(ctx->d3d11_device);
824  }
825 #endif
826 
827  ret = nvenc_open_session(avctx);
828  if (ret < 0)
829  return ret;
830 
831  ret = nvenc_check_capabilities(avctx);
832  if (ret < 0) {
833  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
834  return ret;
835  }
836  } else {
837  int i, nb_devices = 0;
838 
839  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
840  return AVERROR_UNKNOWN;
841 
842  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
843  return AVERROR_UNKNOWN;
844 
845  if (!nb_devices) {
846  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
847  return AVERROR_EXTERNAL;
848  }
849 
850  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
851 
852  dl_fn->nvenc_device_count = 0;
853  for (i = 0; i < nb_devices; ++i) {
854  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
855  return 0;
856  }
857 
858  if (ctx->device == LIST_DEVICES)
859  return AVERROR_EXIT;
860 
861  if (!dl_fn->nvenc_device_count) {
862  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
863  return AVERROR_EXTERNAL;
864  }
865 
866  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
867  return AVERROR(EINVAL);
868  }
869 
870  return 0;
871 }
872 
873 static av_cold void set_constqp(AVCodecContext *avctx)
874 {
875  NvencContext *ctx = avctx->priv_data;
876  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
877 #if CONFIG_AV1_NVENC_ENCODER
878  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
879 #else
880  int qmax = 51;
881 #endif
882 
883  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
884 
885  if (ctx->init_qp_p >= 0) {
886  rc->constQP.qpInterP = ctx->init_qp_p;
887  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
888  rc->constQP.qpIntra = ctx->init_qp_i;
889  rc->constQP.qpInterB = ctx->init_qp_b;
890  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
891  rc->constQP.qpIntra = av_clip(
892  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
893  rc->constQP.qpInterB = av_clip(
894  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
895  } else {
896  rc->constQP.qpIntra = rc->constQP.qpInterP;
897  rc->constQP.qpInterB = rc->constQP.qpInterP;
898  }
899  } else if (ctx->cqp >= 0) {
900  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
901  if (avctx->b_quant_factor != 0.0)
902  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
903  if (avctx->i_quant_factor != 0.0)
904  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
905  }
906 
907  avctx->qmin = ctx->qmin = -1;
908  avctx->qmax = ctx->qmax = -1;
909 }
910 
911 static av_cold void set_vbr(AVCodecContext *avctx)
912 {
913  NvencContext *ctx = avctx->priv_data;
914  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
915  int qp_inter_p;
916 #if CONFIG_AV1_NVENC_ENCODER
917  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
918 #else
919  int qmax = 51;
920 #endif
921 
922  if (avctx->qmin >= 0 || avctx->qmax >= 0)
923  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
924 
925  if (avctx->qmin >= 0 && ctx->qmin < 0)
926  ctx->qmin = avctx->qmin;
927  if (avctx->qmax >= 0 && ctx->qmax < 0)
928  ctx->qmax = avctx->qmax;
929  avctx->qmin = ctx->qmin;
930  avctx->qmax = ctx->qmax;
931 
932  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
933  rc->enableMinQP = 1;
934  rc->enableMaxQP = 1;
935 
936  rc->minQP.qpInterB = ctx->qmin;
937  rc->minQP.qpInterP = ctx->qmin;
938  rc->minQP.qpIntra = ctx->qmin;
939 
940  rc->maxQP.qpInterB = ctx->qmax;
941  rc->maxQP.qpInterP = ctx->qmax;
942  rc->maxQP.qpIntra = ctx->qmax;
943 
944  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
945  } else if (ctx->qmin >= 0) {
946  rc->enableMinQP = 1;
947 
948  rc->minQP.qpInterB = ctx->qmin;
949  rc->minQP.qpInterP = ctx->qmin;
950  rc->minQP.qpIntra = ctx->qmin;
951 
952  qp_inter_p = ctx->qmin;
953  } else {
954  qp_inter_p = 26; // default to 26
955  }
956 
957  rc->enableInitialRCQP = 1;
958 
959  if (ctx->init_qp_p < 0) {
960  rc->initialRCQP.qpInterP = qp_inter_p;
961  } else {
962  rc->initialRCQP.qpInterP = ctx->init_qp_p;
963  }
964 
965  if (ctx->init_qp_i < 0) {
966  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
967  rc->initialRCQP.qpIntra = av_clip(
968  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
969  } else {
970  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
971  }
972  } else {
973  rc->initialRCQP.qpIntra = ctx->init_qp_i;
974  }
975 
976  if (ctx->init_qp_b < 0) {
977  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
978  rc->initialRCQP.qpInterB = av_clip(
979  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
980  } else {
981  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
982  }
983  } else {
984  rc->initialRCQP.qpInterB = ctx->init_qp_b;
985  }
986 }
987 
988 static av_cold void set_lossless(AVCodecContext *avctx)
989 {
990  NvencContext *ctx = avctx->priv_data;
991  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
992 
993  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
994  rc->constQP.qpInterB = 0;
995  rc->constQP.qpInterP = 0;
996  rc->constQP.qpIntra = 0;
997 
998  avctx->qmin = ctx->qmin = -1;
999  avctx->qmax = ctx->qmax = -1;
1000 }
1001 
1002 static void nvenc_override_rate_control(AVCodecContext *avctx)
1003 {
1004  NvencContext *ctx = avctx->priv_data;
1005  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1006 
1007  switch (ctx->rc) {
1008  case NV_ENC_PARAMS_RC_CONSTQP:
1009  set_constqp(avctx);
1010  return;
1011 #ifndef NVENC_NO_DEPRECATED_RC
1012  case NV_ENC_PARAMS_RC_VBR_MINQP:
1013  if (avctx->qmin < 0 && ctx->qmin < 0) {
1014  av_log(avctx, AV_LOG_WARNING,
1015  "The variable bitrate rate-control requires "
1016  "the 'qmin' option set.\n");
1017  set_vbr(avctx);
1018  return;
1019  }
1020  /* fall through */
1021  case NV_ENC_PARAMS_RC_VBR_HQ:
1022 #endif
1023  case NV_ENC_PARAMS_RC_VBR:
1024  set_vbr(avctx);
1025  break;
1026  case NV_ENC_PARAMS_RC_CBR:
1027 #ifndef NVENC_NO_DEPRECATED_RC
1028  case NV_ENC_PARAMS_RC_CBR_HQ:
1029  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1030 #endif
1031  break;
1032  }
1033 
1034  rc->rateControlMode = ctx->rc;
1035 }
1036 
1037 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
1038 {
1039  NvencContext *ctx = avctx->priv_data;
1040  // default minimum of 4 surfaces
1041  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1042  // another multiply by 2 to avoid blocking next PBB group
1043  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1044 
1045  // lookahead enabled
1046  if (ctx->rc_lookahead > 0) {
1047  // +1 is to account for lkd_bound calculation later
1048  // +4 is to allow sufficient pipelining with lookahead
1049  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1050  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1051  {
1052  av_log(avctx, AV_LOG_WARNING,
1053  "Defined rc_lookahead requires more surfaces, "
1054  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1055  }
1056  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1057  } else {
1058  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1059  {
1060  av_log(avctx, AV_LOG_WARNING,
1061  "Defined b-frame requires more surfaces, "
1062  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1063  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1064  }
1065  else if (ctx->nb_surfaces <= 0)
1066  ctx->nb_surfaces = nb_surfaces;
1067  // otherwise use user specified value
1068  }
1069 
1070  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1071  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1072 
1073  // Output in the worst case will only start when the surface buffer is completely full.
1074  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1075  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1076 
1077  return 0;
1078 }
1079 
1080 static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
1081 {
1082  NvencContext *ctx = avctx->priv_data;
1083 
1084  if (avctx->global_quality > 0)
1085  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1086 
1087  if (ctx->cqp < 0 && avctx->global_quality > 0)
1088  ctx->cqp = avctx->global_quality;
1089 
1090  if (avctx->bit_rate > 0) {
1091  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1092  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1093  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1094  }
1095 
1096  if (avctx->rc_max_rate > 0)
1097  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1098 
1099 #ifdef NVENC_HAVE_MULTIPASS
1100  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1101 
1102  if (ctx->flags & NVENC_ONE_PASS)
1103  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1104  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1105  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1106 
1107  if (ctx->rc < 0) {
1108  if (ctx->cbr) {
1109  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1110  } else if (ctx->cqp >= 0) {
1111  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1112  } else if (ctx->quality >= 0.0f) {
1113  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1114  }
1115  }
1116 #else
1117  if (ctx->rc < 0) {
1118  if (ctx->flags & NVENC_ONE_PASS)
1119  ctx->twopass = 0;
1120  if (ctx->flags & NVENC_TWO_PASSES)
1121  ctx->twopass = 1;
1122 
1123  if (ctx->twopass < 0)
1124  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1125 
1126  if (ctx->cbr) {
1127  if (ctx->twopass) {
1128  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1129  } else {
1130  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1131  }
1132  } else if (ctx->cqp >= 0) {
1133  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1134  } else if (ctx->twopass) {
1135  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1136  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1137  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1138  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1139  }
1140  }
1141 #endif
1142 
1143  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1144  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1145  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1146 
1147  ctx->rc &= ~RC_MODE_DEPRECATED;
1148  }
1149 
1150 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1151  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1152  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1153 #else
1154  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1155  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1156 #endif
1157 
1158 #ifdef NVENC_HAVE_LDKFS
1159  if (ctx->ldkfs)
1160  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1161 #endif
1162 
1163  if (ctx->flags & NVENC_LOSSLESS) {
1164  set_lossless(avctx);
1165  } else if (ctx->rc >= 0) {
1166  nvenc_override_rate_control(avctx);
1167  } else {
1168  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1169  set_vbr(avctx);
1170  }
1171 
1172  if (avctx->rc_buffer_size > 0) {
1173  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1174  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1175  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1176  }
1177 
1178  if (ctx->aq) {
1179  ctx->encode_config.rcParams.enableAQ = 1;
1180  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1181  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1182  }
1183 
1184  if (ctx->temporal_aq) {
1185  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1186  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1187  }
1188 
1189  if (ctx->rc_lookahead > 0) {
1190  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1191  ctx->encode_config.frameIntervalP - 4;
1192 
1193  if (lkd_bound < 0) {
1194  ctx->encode_config.rcParams.enableLookahead = 0;
1195  av_log(avctx, AV_LOG_WARNING,
1196  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1197  } else {
1198  ctx->encode_config.rcParams.enableLookahead = 1;
1199  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1200  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1201  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1202  av_log(avctx, AV_LOG_VERBOSE,
1203  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1204  ctx->encode_config.rcParams.lookaheadDepth,
1205  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1206  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1207  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1208  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1209  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1210 
1211 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1212  if (ctx->lookahead_level >= 0) {
1213  switch (ctx->lookahead_level) {
1214  case NV_ENC_LOOKAHEAD_LEVEL_0:
1215  case NV_ENC_LOOKAHEAD_LEVEL_1:
1216  case NV_ENC_LOOKAHEAD_LEVEL_2:
1217  case NV_ENC_LOOKAHEAD_LEVEL_3:
1218  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1219  break;
1220  default:
1221  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1222  return AVERROR(EINVAL);
1223  }
1224 
1225  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1226  }
1227 #endif
1228  }
1229  }
1230 
1231  if (ctx->strict_gop) {
1232  ctx->encode_config.rcParams.strictGOPTarget = 1;
1233  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1234  }
1235 
1236  if (ctx->nonref_p)
1237  ctx->encode_config.rcParams.enableNonRefP = 1;
1238 
1239  if (ctx->zerolatency)
1240  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1241 
1242  if (ctx->quality) {
1243  //convert from float to fixed point 8.8
1244  int tmp_quality = (int)(ctx->quality * 256.0f);
1245  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1246  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1247 
1248  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1249 
1250  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1251  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1252  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1253  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1254  }
1255 
1256  return 0;
1257 }
1258 
1259 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1260 {
1261  NvencContext *ctx = avctx->priv_data;
1262  NV_ENC_CONFIG *cc = &ctx->encode_config;
1263  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1264  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1265 
1266  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1267 
1268  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1269  vui->colourMatrix = AVCOL_SPC_BT470BG;
1270  vui->colourPrimaries = avctx->color_primaries;
1271  vui->transferCharacteristics = avctx->color_trc;
1272  vui->videoFullRangeFlag = 0;
1273  } else {
1274  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1275  vui->colourPrimaries = avctx->color_primaries;
1276  vui->transferCharacteristics = avctx->color_trc;
1277  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1278  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1279  }
1280 
1281  vui->colourDescriptionPresentFlag =
1282  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1283 
1284  vui->videoSignalTypePresentFlag =
1285  (vui->colourDescriptionPresentFlag
1286  || vui->videoFormat != 5
1287  || vui->videoFullRangeFlag != 0);
1288 
1289  if (ctx->max_slice_size > 0) {
1290  h264->sliceMode = 1;
1291  h264->sliceModeData = ctx->max_slice_size;
1292  } else {
1293  h264->sliceMode = 3;
1294  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1295  }
1296 
1297  if (ctx->intra_refresh) {
1298  h264->enableIntraRefresh = 1;
1299  h264->intraRefreshPeriod = cc->gopLength;
1300  h264->intraRefreshCnt = cc->gopLength - 1;
1301  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1302  h264->outputRecoveryPointSEI = 1;
1303 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1304  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1305 #endif
1306  }
1307 
1308  if (ctx->constrained_encoding)
1309  h264->enableConstrainedEncoding = 1;
1310 
1311  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1312  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1313  h264->outputAUD = ctx->aud;
1314 
1315  if (ctx->dpb_size >= 0) {
1316  /* 0 means "let the hardware decide" */
1317  h264->maxNumRefFrames = ctx->dpb_size;
1318  }
1319 
1320  h264->idrPeriod = cc->gopLength;
1321 
1322  if (IS_CBR(cc->rcParams.rateControlMode)) {
1323  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1324  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1325 
1326 #ifdef NVENC_HAVE_FILLER_DATA
1327  h264->enableFillerDataInsertion = ctx->cbr_padding;
1328 #endif
1329  }
1330 
1331  h264->outputPictureTimingSEI = 1;
1332 
1333 #ifndef NVENC_NO_DEPRECATED_RC
1334  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1335  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1336  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1337  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1338  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1339  }
1340 #endif
1341 
1342  if (ctx->flags & NVENC_LOSSLESS) {
1343  h264->qpPrimeYZeroTransformBypassFlag = 1;
1344  } else {
1345  switch(ctx->profile) {
1346  case NV_ENC_H264_PROFILE_BASELINE:
1347  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1348  avctx->profile = AV_PROFILE_H264_BASELINE;
1349  break;
1350  case NV_ENC_H264_PROFILE_MAIN:
1351  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1352  avctx->profile = AV_PROFILE_H264_MAIN;
1353  break;
1354  case NV_ENC_H264_PROFILE_HIGH:
1355  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1356  avctx->profile = AV_PROFILE_H264_HIGH;
1357  break;
1358 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1359  case NV_ENC_H264_PROFILE_HIGH_10:
1360  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1361  avctx->profile = AV_PROFILE_H264_HIGH_10;
1362  break;
1363 #endif
1364 #ifdef NVENC_HAVE_422_SUPPORT
1365  case NV_ENC_H264_PROFILE_HIGH_422:
1366  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1367  avctx->profile = AV_PROFILE_H264_HIGH_422;
1368  break;
1369 #endif
1370  case NV_ENC_H264_PROFILE_HIGH_444P:
1371  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1372  avctx->profile = AV_PROFILE_H264_HIGH_444_PREDICTIVE;
1373  break;
1374  }
1375  }
1376 
1377 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1378  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1379  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1380  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1381  avctx->profile = AV_PROFILE_H264_HIGH_10;
1382  }
1383 #endif
1384 
1385  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1386  if (IS_YUV444(ctx->data_pix_fmt)) {
1387  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1388  avctx->profile = AV_PROFILE_H264_HIGH_444_PREDICTIVE;
1389  }
1390 
1391 #ifdef NVENC_HAVE_422_SUPPORT
1392  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1393  if (IS_YUV422(ctx->data_pix_fmt)) {
1394  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1395  avctx->profile = AV_PROFILE_H264_HIGH_422;
1396  }
1397 #endif
1398 
1399  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1400 
1401  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1402 
1403  h264->level = ctx->level;
1404 
1405 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1406  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1407  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1408 #endif
1409 
1410  if (ctx->coder >= 0)
1411  h264->entropyCodingMode = ctx->coder;
1412 
1413 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1414  if (ctx->b_ref_mode >= 0)
1415  h264->useBFramesAsRef = ctx->b_ref_mode;
1416 #endif
1417 
1418 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1419  h264->numRefL0 = avctx->refs;
1420  h264->numRefL1 = avctx->refs;
1421 #endif
1422 
1423 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1424  if (ctx->tf_level >= 0) {
1425  h264->tfLevel = ctx->tf_level;
1426 
1427  switch (ctx->tf_level)
1428  {
1429  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1430  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1431  break;
1432  default:
1433  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1434  return AVERROR(EINVAL);
1435  }
1436 
1437  if (ctx->encode_config.frameIntervalP < 5)
1438  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1439  }
1440 #endif
1441 
1442 #ifdef NVENC_HAVE_TIME_CODE
1443  if (ctx->s12m_tc)
1444  h264->enableTimeCode = 1;
1445 #endif
1446 
1447  return 0;
1448 }
1449 
1450 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1451 {
1452  NvencContext *ctx = avctx->priv_data;
1453  NV_ENC_CONFIG *cc = &ctx->encode_config;
1454  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1455  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1456 
1457  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1458 
1459  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1460  vui->colourMatrix = AVCOL_SPC_BT470BG;
1461  vui->colourPrimaries = avctx->color_primaries;
1462  vui->transferCharacteristics = avctx->color_trc;
1463  vui->videoFullRangeFlag = 0;
1464  } else {
1465  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1466  vui->colourPrimaries = avctx->color_primaries;
1467  vui->transferCharacteristics = avctx->color_trc;
1468  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1469  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1470  }
1471 
1472  vui->colourDescriptionPresentFlag =
1473  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1474 
1475  vui->videoSignalTypePresentFlag =
1476  (vui->colourDescriptionPresentFlag
1477  || vui->videoFormat != 5
1478  || vui->videoFullRangeFlag != 0);
1479 
1480  if (ctx->max_slice_size > 0) {
1481  hevc->sliceMode = 1;
1482  hevc->sliceModeData = ctx->max_slice_size;
1483  } else {
1484  hevc->sliceMode = 3;
1485  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1486  }
1487 
1488  if (ctx->intra_refresh) {
1489  hevc->enableIntraRefresh = 1;
1490  hevc->intraRefreshPeriod = cc->gopLength;
1491  hevc->intraRefreshCnt = cc->gopLength - 1;
1492  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1493 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1494  hevc->outputRecoveryPointSEI = 1;
1495 #endif
1496 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1497  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1498 #endif
1499  }
1500 
1501 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1502  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1503  avctx->nb_decoded_side_data,
1504  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
1505  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1506  avctx->nb_decoded_side_data,
1507  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
1508 #endif
1509 
1510 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1511  if (ctx->constrained_encoding)
1512  hevc->enableConstrainedEncoding = 1;
1513 #endif
1514 
1515  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1516  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1517  hevc->outputAUD = ctx->aud;
1518 
1519  if (ctx->dpb_size >= 0) {
1520  /* 0 means "let the hardware decide" */
1521  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1522  }
1523 
1524  hevc->idrPeriod = cc->gopLength;
1525 
1526  if (IS_CBR(cc->rcParams.rateControlMode)) {
1527  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1528  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1529 
1530 #ifdef NVENC_HAVE_FILLER_DATA
1531  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1532 #endif
1533  }
1534 
1535  hevc->outputPictureTimingSEI = 1;
1536 
1537 #ifdef NVENC_HAVE_MVHEVC
1538  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1539  const AVFrameSideData *sd_stereo3d = av_frame_side_data_get(avctx->decoded_side_data, avctx->nb_decoded_side_data, AV_FRAME_DATA_STEREO3D);
1540  const AVFrameSideData *sd_tdrdi = av_frame_side_data_get(avctx->decoded_side_data, avctx->nb_decoded_side_data, AV_FRAME_DATA_3D_REFERENCE_DISPLAYS);
1541  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1542 
1543  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1544  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1545 
1546  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1547  stereo3d->type != AV_STEREO3D_2D &&
1548  stereo3d->type != AV_STEREO3D_UNSPEC &&
1549  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1550  {
1551  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1552  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1553  }
1554  }
1555 #endif
1556 
1557  switch (ctx->profile) {
1558  case NV_ENC_HEVC_PROFILE_MAIN:
1559  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1560  avctx->profile = AV_PROFILE_HEVC_MAIN;
1561  break;
1562  case NV_ENC_HEVC_PROFILE_MAIN_10:
1563  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1564  avctx->profile = AV_PROFILE_HEVC_MAIN_10;
1565  break;
1566  case NV_ENC_HEVC_PROFILE_REXT:
1567  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1568  avctx->profile = AV_PROFILE_HEVC_REXT;
1569  break;
1570 #ifdef NVENC_HAVE_MVHEVC
1571  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1572  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1573  avctx->profile = AV_PROFILE_HEVC_MULTIVIEW_MAIN;
1574  ctx->multiview = 1;
1575 
1576  hevc->enableMVHEVC = 1;
1577  hevc->outputHevc3DReferenceDisplayInfo = 1;
1578 
1579  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1580  break;
1581 #endif
1582  }
1583 
1584  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1585  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1586  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1587  avctx->profile = AV_PROFILE_HEVC_MAIN_10;
1588  }
1589 
1590  // force setting profile as rext if input is yuv444 or yuv422
1591  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1592  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1593  avctx->profile = AV_PROFILE_HEVC_REXT;
1594  }
1595 
1596 #ifdef NVENC_HAVE_MVHEVC
1597  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1598  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1599  return AVERROR(EINVAL);
1600  }
1601 #endif
1602 
1603  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1604 
1605 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1606  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1607  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1608 #else
1609  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1610 #endif
1611 
1612  hevc->level = ctx->level;
1613 
1614  hevc->tier = ctx->tier;
1615 
1616 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1617  if (ctx->b_ref_mode >= 0)
1618  hevc->useBFramesAsRef = ctx->b_ref_mode;
1619 #endif
1620 
1621 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1622  hevc->numRefL0 = avctx->refs;
1623  hevc->numRefL1 = avctx->refs;
1624 #endif
1625 
1626 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1627  if (ctx->tf_level >= 0) {
1628  hevc->tfLevel = ctx->tf_level;
1629 
1630  switch (ctx->tf_level)
1631  {
1632  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1633  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1634  break;
1635  default:
1636  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1637  return AVERROR(EINVAL);
1638  }
1639 
1640  if (ctx->encode_config.frameIntervalP < 5)
1641  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1642  }
1643 #endif
1644 
1645  return 0;
1646 }
1647 
1648 #if CONFIG_AV1_NVENC_ENCODER
1649 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1650 {
1651  NvencContext *ctx = avctx->priv_data;
1652  NV_ENC_CONFIG *cc = &ctx->encode_config;
1653  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1654 
1655  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1656 
1657  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1658  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1659  av1->colorPrimaries = avctx->color_primaries;
1660  av1->transferCharacteristics = avctx->color_trc;
1661  av1->colorRange = 0;
1662  } else {
1663  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1664  av1->colorPrimaries = avctx->color_primaries;
1665  av1->transferCharacteristics = avctx->color_trc;
1666  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1667  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1668  }
1669 
1670  if (IS_YUV444(ctx->data_pix_fmt)) {
1671  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1672  return AVERROR(ENOTSUP);
1673  } else {
1674  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1675  avctx->profile = AV_PROFILE_AV1_MAIN;
1676  }
1677 
1678  if (ctx->dpb_size >= 0) {
1679  /* 0 means "let the hardware decide" */
1680  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1681  }
1682 
1683  if (ctx->intra_refresh) {
1684  av1->enableIntraRefresh = 1;
1685  av1->intraRefreshPeriod = cc->gopLength;
1686  av1->intraRefreshCnt = cc->gopLength - 1;
1687  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1688  }
1689 
1690  av1->idrPeriod = cc->gopLength;
1691 
1692  if (IS_CBR(cc->rcParams.rateControlMode)) {
1693  av1->enableBitstreamPadding = ctx->cbr_padding;
1694  }
1695 
1696  if (ctx->tile_cols >= 0)
1697  av1->numTileColumns = ctx->tile_cols;
1698  if (ctx->tile_rows >= 0)
1699  av1->numTileRows = ctx->tile_rows;
1700 
1701  av1->outputAnnexBFormat = 0;
1702 
1703  av1->level = ctx->level;
1704  av1->tier = ctx->tier;
1705 
1706  av1->enableTimingInfo = ctx->timing_info;
1707 
1708  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1709  av1->disableSeqHdr = 0;
1710  av1->repeatSeqHdr = 1;
1711 
1712  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1713 
1714 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1715  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1716  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1717 #else
1718  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1719  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1720 #endif
1721 
1722 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1723  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1724  avctx->nb_decoded_side_data,
1725  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
1726  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1727  avctx->nb_decoded_side_data,
1728  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
1729 #endif
1730 
1731  if (ctx->b_ref_mode >= 0)
1732  av1->useBFramesAsRef = ctx->b_ref_mode;
1733 
1734  av1->numFwdRefs = avctx->refs;
1735  av1->numBwdRefs = avctx->refs;
1736 
1737 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1738  if (ctx->tf_level >= 0) {
1739  av1->tfLevel = ctx->tf_level;
1740 
1741  switch (ctx->tf_level)
1742  {
1743  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1744  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1745  break;
1746  default:
1747  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1748  return AVERROR(EINVAL);
1749  }
1750 
1751  if (ctx->encode_config.frameIntervalP < 5)
1752  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1753  }
1754 #endif
1755 
1756  return 0;
1757 }
1758 #endif
1759 
1760 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1761 {
1762  switch (avctx->codec->id) {
1763  case AV_CODEC_ID_H264:
1764  return nvenc_setup_h264_config(avctx);
1765  case AV_CODEC_ID_HEVC:
1766  return nvenc_setup_hevc_config(avctx);
1767 #if CONFIG_AV1_NVENC_ENCODER
1768  case AV_CODEC_ID_AV1:
1769  return nvenc_setup_av1_config(avctx);
1770 #endif
1771  /* Earlier switch/case will return if unknown codec is passed. */
1772  }
1773 
1774  return 0;
1775 }
1776 
1777 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1778  int sw, sh;
1779 
1780  sw = avctx->width;
1781  sh = avctx->height;
1782 
1783 #if CONFIG_AV1_NVENC_ENCODER
1784  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1785  /* For AV1 we actually need to calculate the render width/height, not the dar */
1786  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1787  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1788  {
1789  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1790  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1791  } else {
1792  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1793  }
1794  }
1795 
1796  *dw = sw;
1797  *dh = sh;
1798  return;
1799  }
1800 #endif
1801 
1802  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1803  sw *= avctx->sample_aspect_ratio.num;
1804  sh *= avctx->sample_aspect_ratio.den;
1805  }
1806 
1807  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1808 }
1809 
1810 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1811 {
1812  NvencContext *ctx = avctx->priv_data;
1813  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1814  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1815 
1816  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1817  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1818  AVCPBProperties *cpb_props;
1819  int res = 0;
1820  int dw, dh;
1821 
1822  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1823  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1824 
1825  ctx->init_encode_params.encodeHeight = avctx->height;
1826  ctx->init_encode_params.encodeWidth = avctx->width;
1827 
1828  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1829 
1830  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1831  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1832 
1833 #ifdef NVENC_HAVE_NEW_PRESETS
1834  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1835 
1836  if (ctx->flags & NVENC_LOSSLESS)
1837  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1838  else if (ctx->flags & NVENC_LOWLATENCY)
1839  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1840 
1841  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1842  ctx->init_encode_params.encodeGUID,
1843  ctx->init_encode_params.presetGUID,
1844  ctx->init_encode_params.tuningInfo,
1845  &preset_config);
1846 #else
1847  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1848  ctx->init_encode_params.encodeGUID,
1849  ctx->init_encode_params.presetGUID,
1850  &preset_config);
1851 #endif
1852  if (nv_status != NV_ENC_SUCCESS)
1853  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1854 
1855  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1856 
1857  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1858 
1859  compute_dar(avctx, &dw, &dh);
1860  ctx->init_encode_params.darHeight = dh;
1861  ctx->init_encode_params.darWidth = dw;
1862 
1863  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1864  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1865  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1866  } else {
1867  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1868  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1869  }
1870 
1871 #ifdef NVENC_HAVE_UNIDIR_B
1872  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1873 #endif
1874 
1875  ctx->init_encode_params.enableEncodeAsync = 0;
1876  ctx->init_encode_params.enablePTD = 1;
1877 
1878 #ifdef NVENC_HAVE_NEW_PRESETS
1879  /* If lookahead isn't set from CLI, use value from preset.
1880  * P6 & P7 presets may enable lookahead for better quality.
1881  * */
1882  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1883  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1884 #endif
1885 
1886  if (ctx->weighted_pred == 1)
1887  ctx->init_encode_params.enableWeightedPrediction = 1;
1888 
1889 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1890  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1891 
1892  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1893  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1894  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1895  }
1896 #endif
1897 
1898  if (ctx->bluray_compat) {
1899  ctx->aud = 1;
1900  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1901  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1902  switch (avctx->codec->id) {
1903  case AV_CODEC_ID_H264:
1904  /* maximum level depends on used resolution */
1905  break;
1906  case AV_CODEC_ID_HEVC:
1907  ctx->level = NV_ENC_LEVEL_HEVC_51;
1908  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1909  break;
1910  }
1911  }
1912 
1913  if (avctx->gop_size > 0) {
1914  // only overwrite preset if a GOP size was selected as input
1915  ctx->encode_config.gopLength = avctx->gop_size;
1916  } else if (avctx->gop_size == 0) {
1917  ctx->encode_config.frameIntervalP = 0;
1918  ctx->encode_config.gopLength = 1;
1919  }
1920 
1921  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1922  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1923  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1924  }
1925 
1926  /* force to enable intra refresh */
1927  if(ctx->single_slice_intra_refresh)
1928  ctx->intra_refresh = 1;
1929 
1930  nvenc_recalc_surfaces(avctx);
1931 
1932  res = nvenc_setup_rate_control(avctx);
1933  if (res < 0)
1934  return res;
1935 
1936  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1937  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1938  } else {
1939  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1940  }
1941 
1942  res = nvenc_setup_codec_config(avctx);
1943  if (res)
1944  return res;
1945 
1946  res = nvenc_push_context(avctx);
1947  if (res < 0)
1948  return res;
1949 
1950  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1951  if (nv_status != NV_ENC_SUCCESS) {
1952  nvenc_pop_context(avctx);
1953  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1954  }
1955 
1956 #ifdef NVENC_HAVE_CUSTREAM_PTR
1957  if (ctx->cu_context) {
1958  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1959  if (nv_status != NV_ENC_SUCCESS) {
1960  nvenc_pop_context(avctx);
1961  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1962  }
1963  }
1964 #endif
1965 
1966  res = nvenc_pop_context(avctx);
1967  if (res < 0)
1968  return res;
1969 
1970  if (ctx->encode_config.frameIntervalP > 1)
1971  avctx->has_b_frames = 2;
1972 
1973  if (ctx->encode_config.rcParams.averageBitRate > 0)
1974  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1975 
1976  cpb_props = ff_encode_add_cpb_side_data(avctx);
1977  if (!cpb_props)
1978  return AVERROR(ENOMEM);
1979  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1980  cpb_props->avg_bitrate = avctx->bit_rate;
1981  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1982 
1983  return 0;
1984 }
1985 
1986 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1987 {
1988  switch (pix_fmt) {
1989  case AV_PIX_FMT_YUV420P:
1990  return NV_ENC_BUFFER_FORMAT_YV12;
1991  case AV_PIX_FMT_NV12:
1992  return NV_ENC_BUFFER_FORMAT_NV12;
1993  case AV_PIX_FMT_P010:
1994  case AV_PIX_FMT_P016:
1995  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1996  case AV_PIX_FMT_GBRP:
1997  case AV_PIX_FMT_YUV444P:
1998  return NV_ENC_BUFFER_FORMAT_YUV444;
1999  case AV_PIX_FMT_GBRP16:
2000  case AV_PIX_FMT_GBRP10MSB:
2001  case AV_PIX_FMT_YUV444P16:
2002  case AV_PIX_FMT_YUV444P10MSB:
2003  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2004  case AV_PIX_FMT_0RGB32:
2005  case AV_PIX_FMT_RGB32:
2006  return NV_ENC_BUFFER_FORMAT_ARGB;
2007  case AV_PIX_FMT_0BGR32:
2008  case AV_PIX_FMT_BGR32:
2009  return NV_ENC_BUFFER_FORMAT_ABGR;
2010  case AV_PIX_FMT_X2RGB10:
2011  return NV_ENC_BUFFER_FORMAT_ARGB10;
2012  case AV_PIX_FMT_X2BGR10:
2013  return NV_ENC_BUFFER_FORMAT_ABGR10;
2014 #ifdef NVENC_HAVE_422_SUPPORT
2015  case AV_PIX_FMT_NV16:
2016  return NV_ENC_BUFFER_FORMAT_NV16;
2017  case AV_PIX_FMT_P210:
2018  case AV_PIX_FMT_P216:
2019  return NV_ENC_BUFFER_FORMAT_P210;
2020 #endif
2021  default:
2022  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2023  }
2024 }
2025 
2026 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2027 {
2028  NvencContext *ctx = avctx->priv_data;
2029  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2030  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2031  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2032 
2033  NVENCSTATUS nv_status;
2034  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2035  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2036 
2037  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2038  ctx->surfaces[idx].in_ref = av_frame_alloc();
2039  if (!ctx->surfaces[idx].in_ref)
2040  return AVERROR(ENOMEM);
2041  } else {
2042  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2043 
2044  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2045  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2046  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2047  av_get_pix_fmt_name(ctx->data_pix_fmt));
2048  return AVERROR(EINVAL);
2049  }
2050 
2051  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2052  allocSurf.width = avctx->width;
2053  allocSurf.height = avctx->height;
2054  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2055 
2056  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2057  if (nv_status != NV_ENC_SUCCESS) {
2058  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2059  }
2060 
2061  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2062  ctx->surfaces[idx].width = allocSurf.width;
2063  ctx->surfaces[idx].height = allocSurf.height;
2064  }
2065 
2066  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2067  if (nv_status != NV_ENC_SUCCESS) {
2068  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2069  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2070  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2071  av_frame_free(&ctx->surfaces[idx].in_ref);
2072  return err;
2073  }
2074 
2075  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2076 
2077  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2078 
2079  return 0;
2080 }
2081 
2082 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
2083 {
2084  NvencContext *ctx = avctx->priv_data;
2085  int i, res = 0, res2;
2086 
2087  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2088  if (!ctx->surfaces)
2089  return AVERROR(ENOMEM);
2090 
2091  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2092  if (!ctx->frame_data_array)
2093  return AVERROR(ENOMEM);
2094 
2095  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2096  sizeof(int64_t), 0);
2097  if (!ctx->timestamp_list)
2098  return AVERROR(ENOMEM);
2099 
2100  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2101  if (!ctx->unused_surface_queue)
2102  return AVERROR(ENOMEM);
2103 
2104  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2105  if (!ctx->output_surface_queue)
2106  return AVERROR(ENOMEM);
2107  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2108  if (!ctx->output_surface_ready_queue)
2109  return AVERROR(ENOMEM);
2110 
2111  res = nvenc_push_context(avctx);
2112  if (res < 0)
2113  return res;
2114 
2115  for (i = 0; i < ctx->nb_surfaces; i++) {
2116  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2117  goto fail;
2118  }
2119 
2120 fail:
2121  res2 = nvenc_pop_context(avctx);
2122  if (res2 < 0)
2123  return res2;
2124 
2125  return res;
2126 }
2127 
2128 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
2129 {
2130  NvencContext *ctx = avctx->priv_data;
2131  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2132  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2133 
2134  NVENCSTATUS nv_status;
2135  uint32_t outSize = 0;
2136  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2137 
2138  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2139  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2140 
2141  payload.spsppsBuffer = tmpHeader;
2142  payload.inBufferSize = sizeof(tmpHeader);
2143  payload.outSPSPPSPayloadSize = &outSize;
2144 
2145  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2146  if (nv_status != NV_ENC_SUCCESS) {
2147  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2148  }
2149 
2150  avctx->extradata_size = outSize;
2151  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
2152 
2153  if (!avctx->extradata) {
2154  return AVERROR(ENOMEM);
2155  }
2156 
2157  memcpy(avctx->extradata, tmpHeader, outSize);
2158 
2159  return 0;
2160 }
2161 
2162 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
2163 {
2164  NvencContext *ctx = avctx->priv_data;
2165  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2166  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2167  int i, res;
2168 
2169  /* the encoder has to be flushed before it can be closed */
2170  if (ctx->nvencoder) {
2171  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2172  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2173 
2174  res = nvenc_push_context(avctx);
2175  if (res < 0)
2176  return res;
2177 
2178  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2179  }
2180 
2181  av_fifo_freep2(&ctx->timestamp_list);
2182  av_fifo_freep2(&ctx->output_surface_ready_queue);
2183  av_fifo_freep2(&ctx->output_surface_queue);
2184  av_fifo_freep2(&ctx->unused_surface_queue);
2185 
2186  if (ctx->frame_data_array) {
2187  for (i = 0; i < ctx->frame_data_array_nb; i++)
2188  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2189  av_freep(&ctx->frame_data_array);
2190  }
2191 
2192  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2193  for (i = 0; i < ctx->nb_registered_frames; i++) {
2194  if (ctx->registered_frames[i].mapped)
2195  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2196  if (ctx->registered_frames[i].regptr)
2197  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2198  }
2199  ctx->nb_registered_frames = 0;
2200  }
2201 
2202  if (ctx->surfaces) {
2203  for (i = 0; i < ctx->nb_surfaces; ++i) {
2204  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2205  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2206  av_frame_free(&ctx->surfaces[i].in_ref);
2207  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2208  }
2209  }
2210  av_freep(&ctx->surfaces);
2211  ctx->nb_surfaces = 0;
2212 
2213  av_frame_free(&ctx->frame);
2214 
2215  av_freep(&ctx->sei_data);
2216 
2217  if (ctx->nvencoder) {
2218  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2219 
2220  res = nvenc_pop_context(avctx);
2221  if (res < 0)
2222  return res;
2223  }
2224  ctx->nvencoder = NULL;
2225 
2226  if (ctx->cu_context_internal)
2227  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2228  ctx->cu_context = ctx->cu_context_internal = NULL;
2229 
2230 #if CONFIG_D3D11VA
2231  if (ctx->d3d11_device) {
2232  ID3D11Device_Release(ctx->d3d11_device);
2233  ctx->d3d11_device = NULL;
2234  }
2235 #endif
2236 
2237  nvenc_free_functions(&dl_fn->nvenc_dl);
2238  cuda_free_functions(&dl_fn->cuda_dl);
2239 
2240  dl_fn->nvenc_device_count = 0;
2241 
2242  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2243 
2244  return 0;
2245 }
2246 
2247 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
2248 {
2249  NvencContext *ctx = avctx->priv_data;
2250  int ret;
2251 
2252  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2253  AVHWFramesContext *frames_ctx;
2254  if (!avctx->hw_frames_ctx) {
2255  av_log(avctx, AV_LOG_ERROR,
2256  "hw_frames_ctx must be set when using GPU frames as input\n");
2257  return AVERROR(EINVAL);
2258  }
2259  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2260  if (frames_ctx->format != avctx->pix_fmt) {
2261  av_log(avctx, AV_LOG_ERROR,
2262  "hw_frames_ctx must match the GPU frame type\n");
2263  return AVERROR(EINVAL);
2264  }
2265  ctx->data_pix_fmt = frames_ctx->sw_format;
2266  } else {
2267  ctx->data_pix_fmt = avctx->pix_fmt;
2268  }
2269 
2270  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2271  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2272  return AVERROR(EINVAL);
2273  }
2274 
2275  ctx->frame = av_frame_alloc();
2276  if (!ctx->frame)
2277  return AVERROR(ENOMEM);
2278 
2279  if ((ret = nvenc_load_libraries(avctx)) < 0)
2280  return ret;
2281 
2282  if ((ret = nvenc_setup_device(avctx)) < 0)
2283  return ret;
2284 
2285  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2286  return ret;
2287 
2288  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2289  return ret;
2290 
2291  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2292  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2293  return ret;
2294  }
2295 
2296  return 0;
2297 }
2298 
2299 static NvencSurface *get_free_frame(NvencContext *ctx)
2300 {
2301  NvencSurface *tmp_surf;
2302 
2303  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2304  // queue empty
2305  return NULL;
2306 
2307  return tmp_surf;
2308 }
2309 
2310 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2311  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2312 {
2313  int dst_linesize[4] = {
2314  lock_buffer_params->pitch,
2315  lock_buffer_params->pitch,
2316  lock_buffer_params->pitch,
2317  lock_buffer_params->pitch
2318  };
2319  uint8_t *dst_data[4];
2320  int ret;
2321 
2322  if (frame->format == AV_PIX_FMT_YUV420P)
2323  dst_linesize[1] = dst_linesize[2] >>= 1;
2324 
2325  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2326  lock_buffer_params->bufferDataPtr, dst_linesize);
2327  if (ret < 0)
2328  return ret;
2329 
2330  if (frame->format == AV_PIX_FMT_YUV420P)
2331  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2332 
2333  av_image_copy2(dst_data, dst_linesize,
2334  frame->data, frame->linesize, frame->format,
2335  avctx->width, avctx->height);
2336 
2337  return 0;
2338 }
2339 
2340 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
2341 {
2342  NvencContext *ctx = avctx->priv_data;
2343  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2344  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2345  NVENCSTATUS nv_status;
2346 
2347  int i, first_round;
2348 
2349  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2350  for (first_round = 1; first_round >= 0; first_round--) {
2351  for (i = 0; i < ctx->nb_registered_frames; i++) {
2352  if (!ctx->registered_frames[i].mapped) {
2353  if (ctx->registered_frames[i].regptr) {
2354  if (first_round)
2355  continue;
2356  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2357  if (nv_status != NV_ENC_SUCCESS)
2358  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2359  ctx->registered_frames[i].ptr = NULL;
2360  ctx->registered_frames[i].regptr = NULL;
2361  }
2362  return i;
2363  }
2364  }
2365  }
2366  } else {
2367  return ctx->nb_registered_frames++;
2368  }
2369 
2370  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2371  return AVERROR(ENOMEM);
2372 }
2373 
2374 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
2375 {
2376  NvencContext *ctx = avctx->priv_data;
2377  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2378  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2379 
2380  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2381  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2382  int i, idx, ret;
2383 
2384  for (i = 0; i < ctx->nb_registered_frames; i++) {
2385  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2386  return i;
2387  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2388  return i;
2389  }
2390 
2391  idx = nvenc_find_free_reg_resource(avctx);
2392  if (idx < 0)
2393  return idx;
2394 
2395  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2396  reg.width = frames_ctx->width;
2397  reg.height = frames_ctx->height;
2398  reg.pitch = frame->linesize[0];
2399  reg.resourceToRegister = frame->data[0];
2400 
2401  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2402  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2403  }
2404  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2405  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2406  reg.subResourceIndex = (intptr_t)frame->data[1];
2407  }
2408 
2409  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2410  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2411  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2412  av_get_pix_fmt_name(frames_ctx->sw_format));
2413  return AVERROR(EINVAL);
2414  }
2415 
2416  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2417  if (ret != NV_ENC_SUCCESS) {
2418  nvenc_print_error(avctx, ret, "Error registering an input resource");
2419  return AVERROR_UNKNOWN;
2420  }
2421 
2422  ctx->registered_frames[idx].ptr = frame->data[0];
2423  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2424  ctx->registered_frames[idx].regptr = reg.registeredResource;
2425  return idx;
2426 }
2427 
2428 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
2429  NvencSurface *nvenc_frame)
2430 {
2431  NvencContext *ctx = avctx->priv_data;
2432  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2433  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2434 
2435  int res;
2436  NVENCSTATUS nv_status;
2437 
2438  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2439  int reg_idx = nvenc_register_frame(avctx, frame);
2440  if (reg_idx < 0) {
2441  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2442  return reg_idx;
2443  }
2444 
2445  res = av_frame_ref(nvenc_frame->in_ref, frame);
2446  if (res < 0)
2447  return res;
2448 
2449  if (!ctx->registered_frames[reg_idx].mapped) {
2450  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2451  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2452  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2453  if (nv_status != NV_ENC_SUCCESS) {
2454  av_frame_unref(nvenc_frame->in_ref);
2455  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2456  }
2457  }
2458 
2459  ctx->registered_frames[reg_idx].mapped += 1;
2460 
2461  nvenc_frame->reg_idx = reg_idx;
2462  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2463  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2464  nvenc_frame->pitch = frame->linesize[0];
2465 
2466  return 0;
2467  } else {
2468  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2469 
2470  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2471  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2472 
2473  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2474  if (nv_status != NV_ENC_SUCCESS) {
2475  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2476  }
2477 
2478  nvenc_frame->pitch = lockBufferParams.pitch;
2479  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2480 
2481  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2482  if (nv_status != NV_ENC_SUCCESS) {
2483  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2484  }
2485 
2486  return res;
2487  }
2488 }
2489 
2490 #ifdef NVENC_HAVE_TIME_CODE
2491 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2492 {
2493  AVFrameSideData *sd = av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE);
2494 
2495  if (sd) {
2496  uint32_t *tc = (uint32_t*)sd->data;
2497  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2498 
2499  switch (cnt) {
2500  case 0:
2501  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2502  time_code->skipClockTimestampInsertion = 1;
2503  break;
2504  case 2:
2505  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2506  break;
2507  case 3:
2508  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2509  break;
2510  default:
2511  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2512  break;
2513  }
2514 
2515  for (int i = 0; i < cnt; i++) {
2516  unsigned hh, mm, ss, ff, drop;
2517  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2518 
2519  time_code->clockTimestamp[i].countingType = 0;
2520  time_code->clockTimestamp[i].discontinuityFlag = 0;
2521  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2522  time_code->clockTimestamp[i].nFrames = ff;
2523  time_code->clockTimestamp[i].secondsValue = ss;
2524  time_code->clockTimestamp[i].minutesValue = mm;
2525  time_code->clockTimestamp[i].hoursValue = hh;
2526  time_code->clockTimestamp[i].timeOffset = 0;
2527  }
2528  } else {
2529  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2530  time_code->skipClockTimestampInsertion = 1;
2531  }
2532 }
2533 #endif
2534 
2535 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame,
2536  NV_ENC_PIC_PARAMS *params,
2537  NV_ENC_SEI_PAYLOAD *sei_data,
2538  int sei_count)
2539 {
2540  NvencContext *ctx = avctx->priv_data;
2541 
2542  switch (avctx->codec->id) {
2543  case AV_CODEC_ID_H264:
2544  params->codecPicParams.h264PicParams.sliceMode =
2545  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2546  params->codecPicParams.h264PicParams.sliceModeData =
2547  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2548  if (sei_count > 0) {
2549  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2550  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2551  }
2552 
2553 #ifdef NVENC_HAVE_TIME_CODE
2554  if (ctx->s12m_tc)
2555  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2556 #endif
2557 
2558  break;
2559  case AV_CODEC_ID_HEVC:
2560  params->codecPicParams.hevcPicParams.sliceMode =
2561  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2562  params->codecPicParams.hevcPicParams.sliceModeData =
2563  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2564  if (sei_count > 0) {
2565  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2566  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2567  }
2568 
2569  break;
2570 #if CONFIG_AV1_NVENC_ENCODER
2571  case AV_CODEC_ID_AV1:
2572  params->codecPicParams.av1PicParams.numTileColumns =
2573  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2574  params->codecPicParams.av1PicParams.numTileRows =
2575  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2576  if (sei_count > 0) {
2577  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2578  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2579  }
2580 
2581  break;
2582 #endif
2583  }
2584 }
2585 
2586 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2587 {
2588  av_fifo_write(queue, &timestamp, 1);
2589 }
2590 
2591 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2592 {
2593  int64_t timestamp = AV_NOPTS_VALUE;
2594  // The following call might fail if the queue is empty.
2595  av_fifo_read(queue, &timestamp, 1);
2596 
2597  return timestamp;
2598 }
2599 
2600 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2601 {
2602  int64_t timestamp = AV_NOPTS_VALUE;
2603  av_fifo_peek(queue, &timestamp, 1, index);
2604 
2605  return timestamp;
2606 }
2607 
2608 static int nvenc_set_timestamp(AVCodecContext *avctx,
2609  NV_ENC_LOCK_BITSTREAM *params,
2610  AVPacket *pkt)
2611 {
2612  NvencContext *ctx = avctx->priv_data;
2613  unsigned int delay;
2614  int64_t delay_time;
2615 
2616  pkt->pts = params->outputTimeStamp;
2617 
2618  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2619  pkt->dts = pkt->pts;
2620  return 0;
2621  }
2622 
2623  // This can be more than necessary, but we don't know the real reorder delay.
2624  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2625 #ifdef NVENC_HAVE_MVHEVC
2626  delay *= ctx->multiview ? 2 : 1;
2627 #endif
2628  if (ctx->output_frame_num >= delay) {
2629  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2630  ctx->output_frame_num++;
2631  return 0;
2632  }
2633 
2634  delay_time = ctx->initial_delay_time;
2635  if (!delay_time) {
2636  int64_t t1, t2, t3;
2637  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2638  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2639  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2640 
2641  if (t1 != AV_NOPTS_VALUE) {
2642  delay_time = t1 - t2;
2643  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2644  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2645  avctx->time_base);
2646  } else if (t3 != AV_NOPTS_VALUE) {
2647  delay_time = delay * (t3 - t2);
2648  } else {
2649  delay_time = delay;
2650  }
2651  ctx->initial_delay_time = delay_time;
2652  }
2653 
2654  /* The following method is simple, but doesn't guarantee monotonic with VFR
2655  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2656  *
2657  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2658  */
2659  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2660  ctx->output_frame_num++;
2661 
2662  return 0;
2663 }
2664 
2665 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2666 {
2667  NvencContext *ctx = avctx->priv_data;
2668  int res = 0;
2669 
2670  int idx = ctx->frame_data_array_pos;
2671  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2672 
2673  // in case the encoder got reconfigured, there might be leftovers
2674  av_buffer_unref(&frame_data->frame_opaque_ref);
2675 
2676  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2677  frame_data->frame_opaque_ref = av_buffer_ref(frame->opaque_ref);
2678  if (!frame_data->frame_opaque_ref)
2679  return AVERROR(ENOMEM);
2680  }
2681 
2682  frame_data->duration = frame->duration;
2683  frame_data->frame_opaque = frame->opaque;
2684 
2685  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2686  pic_params->inputDuration = idx;
2687 
2688  return res;
2689 }
2690 
2691 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2692 {
2693  NvencContext *ctx = avctx->priv_data;
2694  int res = 0;
2695 
2696  int idx = lock_params->outputDuration;
2697  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2698 
2699  pkt->duration = frame_data->duration;
2700 
2701  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2702  pkt->opaque = frame_data->frame_opaque;
2703  pkt->opaque_ref = frame_data->frame_opaque_ref;
2704  frame_data->frame_opaque_ref = NULL;
2705  }
2706 
2707  av_buffer_unref(&frame_data->frame_opaque_ref);
2708 
2709  return res;
2710 }
2711 
2712 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2713 {
2714  NvencContext *ctx = avctx->priv_data;
2715  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2716  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2717 
2718  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2719  NVENCSTATUS nv_status;
2720  int res = 0;
2721 
2722  enum AVPictureType pict_type;
2723 
2724  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2725 
2726  lock_params.doNotWait = 0;
2727  lock_params.outputBitstream = tmpoutsurf->output_surface;
2728 
2729  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2730  if (nv_status != NV_ENC_SUCCESS) {
2731  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2732  goto error;
2733  }
2734 
2735  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2736 
2737  if (res < 0) {
2738  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2739  goto error;
2740  }
2741 
2742  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2743 
2744  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2745  if (nv_status != NV_ENC_SUCCESS) {
2746  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2747  goto error;
2748  }
2749 
2750 
2751  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2752  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2753  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2754  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2755  if (nv_status != NV_ENC_SUCCESS) {
2756  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2757  goto error;
2758  }
2759  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2760  res = AVERROR_BUG;
2761  goto error;
2762  }
2763 
2764  av_frame_unref(tmpoutsurf->in_ref);
2765 
2766  tmpoutsurf->input_surface = NULL;
2767  }
2768 
2769  switch (lock_params.pictureType) {
2770  case NV_ENC_PIC_TYPE_IDR:
2771  pkt->flags |= AV_PKT_FLAG_KEY;
2772  case NV_ENC_PIC_TYPE_I:
2773  pict_type = AV_PICTURE_TYPE_I;
2774  break;
2775  case NV_ENC_PIC_TYPE_P:
2776  pict_type = AV_PICTURE_TYPE_P;
2777  break;
2778  case NV_ENC_PIC_TYPE_B:
2779  pict_type = AV_PICTURE_TYPE_B;
2780  break;
2781  case NV_ENC_PIC_TYPE_BI:
2782  pict_type = AV_PICTURE_TYPE_BI;
2783  break;
2784  default:
2785  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2786  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2787  res = AVERROR_EXTERNAL;
2788  goto error;
2789  }
2790 
2791  ff_encode_add_stats_side_data(pkt,
2792  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2793 
2794  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2795  if (res < 0)
2796  goto error2;
2797 
2798  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2799  if (res < 0)
2800  goto error2;
2801 
2802  return 0;
2803 
2804 error:
2805  timestamp_queue_dequeue(ctx->timestamp_list);
2806 
2807 error2:
2808  return res;
2809 }
2810 
2811 static int output_ready(AVCodecContext *avctx, int flush)
2812 {
2813  NvencContext *ctx = avctx->priv_data;
2814  int nb_ready, nb_pending;
2815 
2816  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2817  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2818  if (flush)
2819  return nb_ready > 0;
2820  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2821 }
2822 
2823 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2824 {
2825  NvencContext *ctx = avctx->priv_data;
2826  int sei_count = 0;
2827  int i, res;
2828 
2829  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2830  void *a53_data = NULL;
2831  size_t a53_size = 0;
2832 
2833  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2834  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2835  }
2836 
2837  if (a53_data) {
2838  void *tmp = av_fast_realloc(ctx->sei_data,
2839  &ctx->sei_data_size,
2840  (sei_count + 1) * sizeof(*ctx->sei_data));
2841  if (!tmp) {
2842  av_free(a53_data);
2843  res = AVERROR(ENOMEM);
2844  goto error;
2845  } else {
2846  ctx->sei_data = tmp;
2847  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2848  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2849 
2850 #if CONFIG_AV1_NVENC_ENCODER
2851  if (avctx->codec->id == AV_CODEC_ID_AV1)
2852  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2853  else
2854 #endif
2855  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2856 
2857  sei_count++;
2858  }
2859  }
2860  }
2861 
2862  if (ctx->s12m_tc && avctx->codec->id != AV_CODEC_ID_H264 && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2863  void *tc_data = NULL;
2864  size_t tc_size = 0;
2865 
2866  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2867  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2868  }
2869 
2870  if (tc_data) {
2871  void *tmp = av_fast_realloc(ctx->sei_data,
2872  &ctx->sei_data_size,
2873  (sei_count + 1) * sizeof(*ctx->sei_data));
2874  if (!tmp) {
2875  av_free(tc_data);
2876  res = AVERROR(ENOMEM);
2877  goto error;
2878  } else {
2879  ctx->sei_data = tmp;
2880  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2881  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2882 
2883 #if CONFIG_AV1_NVENC_ENCODER
2884  if (avctx->codec->id == AV_CODEC_ID_AV1)
2885  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2886  else
2887 #endif
2888  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2889 
2890  sei_count++;
2891  }
2892  }
2893  }
2894 
2895  if (!ctx->udu_sei)
2896  return sei_count;
2897 
2898  for (i = 0; i < frame->nb_side_data; i++) {
2899  AVFrameSideData *side_data = frame->side_data[i];
2900  void *tmp;
2901 
2902  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2903  continue;
2904 
2905  tmp = av_fast_realloc(ctx->sei_data,
2906  &ctx->sei_data_size,
2907  (sei_count + 1) * sizeof(*ctx->sei_data));
2908  if (!tmp) {
2909  res = AVERROR(ENOMEM);
2910  goto error;
2911  } else {
2912  ctx->sei_data = tmp;
2913  ctx->sei_data[sei_count].payloadSize = side_data->size;
2914  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2915  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2916 
2917  if (!ctx->sei_data[sei_count].payload) {
2918  res = AVERROR(ENOMEM);
2919  goto error;
2920  }
2921 
2922  sei_count++;
2923  }
2924  }
2925 
2926  return sei_count;
2927 
2928 error:
2929  for (i = 0; i < sei_count; i++)
2930  av_freep(&(ctx->sei_data[i].payload));
2931 
2932  return res;
2933 }
2934 
2935 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2936 {
2937  NvencContext *ctx = avctx->priv_data;
2938  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2939  NVENCSTATUS ret;
2940 
2941  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2942  int needs_reconfig = 0;
2943  int needs_encode_config = 0;
2944  int reconfig_bitrate = 0, reconfig_dar = 0;
2945  int dw, dh;
2946 
2947  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2948  params.reInitEncodeParams = ctx->init_encode_params;
2949 
2950  compute_dar(avctx, &dw, &dh);
2951  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2952  av_log(avctx, AV_LOG_VERBOSE,
2953  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2954  ctx->init_encode_params.darWidth,
2955  ctx->init_encode_params.darHeight, dw, dh);
2956 
2957  params.reInitEncodeParams.darHeight = dh;
2958  params.reInitEncodeParams.darWidth = dw;
2959 
2960  needs_reconfig = 1;
2961  reconfig_dar = 1;
2962  }
2963 
2964  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2965  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2966  av_log(avctx, AV_LOG_VERBOSE,
2967  "avg bitrate change: %d -> %d\n",
2968  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2969  (uint32_t)avctx->bit_rate);
2970 
2971  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2972  reconfig_bitrate = 1;
2973  }
2974 
2975  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2976  av_log(avctx, AV_LOG_VERBOSE,
2977  "max bitrate change: %d -> %d\n",
2978  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2979  (uint32_t)avctx->rc_max_rate);
2980 
2981  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2982  reconfig_bitrate = 1;
2983  }
2984 
2985  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2986  av_log(avctx, AV_LOG_VERBOSE,
2987  "vbv buffer size change: %d -> %d\n",
2988  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2989  avctx->rc_buffer_size);
2990 
2991  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2992  reconfig_bitrate = 1;
2993  }
2994 
2995  if (reconfig_bitrate) {
2996  params.resetEncoder = 1;
2997  params.forceIDR = 1;
2998 
2999  needs_encode_config = 1;
3000  needs_reconfig = 1;
3001  }
3002  }
3003 
3004  if (!needs_encode_config)
3005  params.reInitEncodeParams.encodeConfig = NULL;
3006 
3007  if (needs_reconfig) {
3008  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3009  if (ret != NV_ENC_SUCCESS) {
3010  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3011  } else {
3012  if (reconfig_dar) {
3013  ctx->init_encode_params.darHeight = dh;
3014  ctx->init_encode_params.darWidth = dw;
3015  }
3016 
3017  if (reconfig_bitrate) {
3018  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3019  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3020  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3021  }
3022 
3023  }
3024  }
3025 }
3026 
3027 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3028 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3029  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3030 {
3031  NvencContext *ctx = avctx->priv_data;
3032 
3033  if (ctx->mdm || ctx->cll) {
3034  const AVFrameSideData *sd_mdm = av_frame_get_side_data(frame, AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
3035  const AVFrameSideData *sd_cll = av_frame_get_side_data(frame, AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
3036  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3037  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3038  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3039 
3040  if (!sd_mdm)
3041  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3042  avctx->nb_decoded_side_data,
3043  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
3044  if (!sd_cll)
3045  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3046  avctx->nb_decoded_side_data,
3047  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
3048 
3049  if (sd_mdm) {
3050  const AVMasteringDisplayMetadata *mdm = (AVMasteringDisplayMetadata *)sd_mdm->data;
3051 
3052  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3053  mdm->display_primaries[0][0].den);
3054  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3055  mdm->display_primaries[0][1].den);
3056  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3057  mdm->display_primaries[1][0].den);
3058  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3059  mdm->display_primaries[1][1].den);
3060  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3061  mdm->display_primaries[2][0].den);
3062  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3063  mdm->display_primaries[2][1].den);
3064  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3065  mdm->white_point[0].den);
3066  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3067  mdm->white_point[1].den);
3068  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3069  mdm->max_luminance.den);
3070  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3071  mdm->min_luminance.den);
3072 
3073  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3074  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3075  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3076  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3077  else
3078  return AVERROR_BUG;
3079  }
3080  if (sd_cll) {
3081  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3082 
3083  content_light_level->maxContentLightLevel = cll->MaxCLL;
3084  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3085 
3086  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3087  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3088  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3089  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3090  else
3091  return AVERROR_BUG;
3092  }
3093  }
3094 
3095  return 0;
3096 }
3097 #endif
3098 
3099 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3100 {
3101  NVENCSTATUS nv_status;
3102  NvencSurface *tmp_out_surf, *in_surf;
3103  int res, res2;
3104  int sei_count = 0;
3105  int i;
3106 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3107  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3108  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3109 #endif
3110 #ifdef NVENC_HAVE_MVHEVC
3111  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3112 #endif
3113 
3114  NvencContext *ctx = avctx->priv_data;
3115  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3116  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3117 
3118  NV_ENC_PIC_PARAMS pic_params = { 0 };
3119  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3120 
3121  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3122  return AVERROR(EINVAL);
3123 
3124  if (frame && frame->buf[0]) {
3125  in_surf = get_free_frame(ctx);
3126  if (!in_surf)
3127  return AVERROR(EAGAIN);
3128 
3129  res = nvenc_push_context(avctx);
3130  if (res < 0)
3131  return res;
3132 
3133  reconfig_encoder(avctx, frame);
3134 
3135  res = nvenc_upload_frame(avctx, frame, in_surf);
3136 
3137  res2 = nvenc_pop_context(avctx);
3138  if (res2 < 0)
3139  return res2;
3140 
3141  if (res)
3142  return res;
3143 
3144  pic_params.inputBuffer = in_surf->input_surface;
3145  pic_params.bufferFmt = in_surf->format;
3146  pic_params.inputWidth = in_surf->width;
3147  pic_params.inputHeight = in_surf->height;
3148  pic_params.inputPitch = in_surf->pitch;
3149  pic_params.outputBitstream = in_surf->output_surface;
3150 
3151  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3152  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3153  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3154  else
3155  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3156  } else {
3157  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3158  }
3159 
3160  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3161  pic_params.encodePicFlags =
3162  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3163  } else {
3164  pic_params.encodePicFlags = 0;
3165  }
3166 
3167  pic_params.frameIdx = ctx->frame_idx_counter++;
3168  pic_params.inputTimeStamp = frame->pts;
3169 
3170  if (ctx->extra_sei) {
3171  res = prepare_sei_data_array(avctx, frame);
3172  if (res < 0)
3173  return res;
3174  sei_count = res;
3175  }
3176 
3177 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3178  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3179  if (res < 0)
3180  return res;
3181 #endif
3182 
3183 #ifdef NVENC_HAVE_MVHEVC
3184  if (ctx->multiview) {
3185  const AVFrameSideData *sd_tdrdi = av_frame_get_side_data(frame, AV_FRAME_DATA_3D_REFERENCE_DISPLAYS);
3186  const AVFrameSideData *sd_view_id = av_frame_get_side_data(frame, AV_FRAME_DATA_VIEW_ID);
3187 
3188  if (sd_view_id)
3189  ctx->next_view_id = *(int*)sd_view_id->data;
3190 
3191  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3192 
3193  if (sd_tdrdi) {
3194  AV3DReferenceDisplaysInfo *tdrdi = (AV3DReferenceDisplaysInfo*)sd_tdrdi->data;
3195 
3196  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3197  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3198  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3199 
3200  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3201 
3202  for (i = 0; i < tdrdi->num_ref_displays &&
3203  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3204  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3205  ref_disp_info.leftViewId[i] = display->left_view_id;
3206  ref_disp_info.rightViewId[i] = display->right_view_id;
3207  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3208  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3209  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3210  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3211  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3212  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3213  }
3214 
3215  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3216  ctx->display_sei_sent = 1;
3217  } else if (!ctx->display_sei_sent) {
3218  ref_disp_info.precRefDisplayWidth = 31;
3219  ref_disp_info.leftViewId[0] = 0;
3220  ref_disp_info.rightViewId[0] = 1;
3221 
3222  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3223  ctx->display_sei_sent = 1;
3224  }
3225 
3226  ctx->next_view_id = !ctx->next_view_id;
3227  }
3228 #endif
3229 
3230  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3231  if (res < 0)
3232  return res;
3233 
3234  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3235  } else {
3236  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3237  }
3238 
3239  res = nvenc_push_context(avctx);
3240  if (res < 0)
3241  return res;
3242 
3243  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3244 
3245  for (i = 0; i < sei_count; i++)
3246  av_freep(&(ctx->sei_data[i].payload));
3247 
3248  res = nvenc_pop_context(avctx);
3249  if (res < 0)
3250  return res;
3251 
3252  if (nv_status != NV_ENC_SUCCESS &&
3253  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3254  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3255 
3256  if (frame && frame->buf[0]) {
3257  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3258 
3259  if (avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)
3260  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3261  }
3262 
3263  /* all the pending buffers are now ready for output */
3264  if (nv_status == NV_ENC_SUCCESS) {
3265  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3266  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3267  }
3268 
3269  return 0;
3270 }
3271 
3272 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
3273 {
3274  NvencSurface *tmp_out_surf;
3275  int res, res2;
3276 
3277  NvencContext *ctx = avctx->priv_data;
3278 
3279  AVFrame *frame = ctx->frame;
3280 
3281  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3282  return AVERROR(EINVAL);
3283 
3284  if (!frame->buf[0]) {
3285  res = ff_encode_get_frame(avctx, frame);
3286  if (res < 0 && res != AVERROR_EOF)
3287  return res;
3288  }
3289 
3290  res = nvenc_send_frame(avctx, frame);
3291  if (res < 0) {
3292  if (res != AVERROR(EAGAIN))
3293  return res;
3294  } else
3295  av_frame_unref(frame);
3296 
3297  if (output_ready(avctx, avctx->internal->draining)) {
3298  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3299 
3300  res = nvenc_push_context(avctx);
3301  if (res < 0)
3302  return res;
3303 
3304  res = process_output_surface(avctx, pkt, tmp_out_surf);
3305 
3306  res2 = nvenc_pop_context(avctx);
3307  if (res2 < 0)
3308  return res2;
3309 
3310  if (res)
3311  return res;
3312 
3313  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3314  } else if (avctx->internal->draining) {
3315  return AVERROR_EOF;
3316  } else {
3317  return AVERROR(EAGAIN);
3318  }
3319 
3320  return 0;
3321 }
3322 
3323 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
3324 {
3325  NvencContext *ctx = avctx->priv_data;
3326 
3327  nvenc_send_frame(avctx, NULL);
3328  av_fifo_reset2(ctx->timestamp_list);
3329  ctx->output_frame_num = 0;
3330  ctx->initial_delay_time = 0;
3331 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:61
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:201
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:88
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:205
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:201
level
uint8_t level
Definition: svq3.c:208
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:659
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1924
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:177
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:659
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:513
GUIDTuple
Definition: nvenc.c:200
GUIDTuple::flags
int flags
Definition: nvenc.c:202
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3456
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:384
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:200
AVPictureType
AVPictureType
Definition: avutil.h:276
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:206
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2811
NvencContext
Definition: nvenc.h:211
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1704
int64_t
long long int64_t
Definition: coverity.c:34
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:181
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:554
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:116
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:64
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2665
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:427
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:652
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2608
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:777
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:588
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:785
NvencFrameData
Definition: nvenc.h:126
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2935
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:701
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2600
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:59
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:873
NvencSurface
Definition: nvenc.h:113
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:606
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:180
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1241
nverr
NVENCSTATUS nverr
Definition: nvenc.c:133
NONE
#define NONE
Definition: vf_drawvg.c:257
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:988
PRESET
#define PRESET(name,...)
Definition: nvenc.c:208
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:643
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3323
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:655
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1777
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:551
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:706
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2428
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:140
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:794
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:911
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:165
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:440
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:624
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:469
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
fail
#define fail()
Definition: checkasm.h:206
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
dummy
int dummy
Definition: motion.c:66
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:123
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1080
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:689
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:210
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:488
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2310
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:128
ff_encode_add_stats_side_data
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition: encode.c:918
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:264
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:486
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:63
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:52
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:645
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
pkt
AVPacket * pkt
Definition: movenc.c:60
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:285
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:106
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
P2
#define P2
Definition: cavsdsp.c:36
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:193
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:515
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:697
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2247
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1217
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:552
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1415
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1925
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:516
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:134
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
ctx
AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2128
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2586
P1
#define P1
Definition: cavsdsp.c:37
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1270
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2591
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:613
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:137
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:282
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:120
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:115
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1255
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:49
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:561
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:98
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:213
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:124
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:117
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:669
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:466
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:481
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2162
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:801
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:552
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:136
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1259
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:169
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:535
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:614
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:135
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:395
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:195
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1005
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:278
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:433
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:88
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:982
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2026
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:284
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:682
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2374
AVCodecHWConfigInternal
Definition: hwconfig.h:25
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:192
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:473
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3272
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:587
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:511
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1002
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:594
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:620
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:622
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:297
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:616
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2299
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:183
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:778
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:407
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:581
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:168
nvenc_errors
static const struct @214 nvenc_errors[]
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:514
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2712
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:340
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1037
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:109
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:287
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:170
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:182
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2823
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:197
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:496
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:613
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:256
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1475
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:116
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:52
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:592
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:631
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:47
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1986
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:604
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1453
NvencSurface::width
int width
Definition: nvenc.h:118
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:118
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:75
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1810
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:134
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:515
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:137
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:303
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext
main external API structure.
Definition: avcodec.h:431
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:202
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:105
NvencSurface::height
int height
Definition: nvenc.h:119
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1234
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1618
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2082
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:801
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:283
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:122
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2340
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2535
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:602
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:139
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:769
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:204
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:282
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1021
DEFAULT
#define DEFAULT
Definition: avdct.c:30
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:565
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:458
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:757
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1151
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:592
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:568
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:887
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1760
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:194
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:616
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1450
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3099
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3376
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2691
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