FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc_sei.h"
27 
28 #include "libavutil/hwcontext_cuda.h"
29 #include "libavutil/hwcontext.h"
30 #include "libavutil/cuda_check.h"
31 #include "libavutil/imgutils.h"
32 #include "libavutil/mem.h"
33 #include "libavutil/pixdesc.h"
34 #include "atsc_a53.h"
35 #include "encode.h"
36 #include "internal.h"
37 #include "packet_internal.h"
38 
39 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
40 
41 #define NVENC_CAP 0x30
42 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
43  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
44  rc == NV_ENC_PARAMS_RC_CBR_HQ)
45 
46 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
47  AV_PIX_FMT_YUV420P,
48  AV_PIX_FMT_NV12,
49  AV_PIX_FMT_P010,
50  AV_PIX_FMT_YUV444P,
51  AV_PIX_FMT_P016, // Truncated to 10bits
52  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
53  AV_PIX_FMT_0RGB32,
54  AV_PIX_FMT_RGB32,
55  AV_PIX_FMT_0BGR32,
56  AV_PIX_FMT_BGR32,
57  AV_PIX_FMT_X2RGB10,
58  AV_PIX_FMT_X2BGR10,
59  AV_PIX_FMT_GBRP,
60  AV_PIX_FMT_GBRP16, // Truncated to 10bits
61  AV_PIX_FMT_CUDA,
62 #if CONFIG_D3D11VA
63  AV_PIX_FMT_D3D11,
64 #endif
65  AV_PIX_FMT_NONE
66 };
67 
68 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
69  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
70  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
71 #if CONFIG_D3D11VA
72  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
73  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
74 #endif
75  NULL,
76 };
77 
78 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
79  pix_fmt == AV_PIX_FMT_P016 || \
80  pix_fmt == AV_PIX_FMT_YUV444P16 || \
81  pix_fmt == AV_PIX_FMT_GBRP16)
82 
83 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
84  pix_fmt == AV_PIX_FMT_YUV444P16 || \
85  pix_fmt == AV_PIX_FMT_GBRP || \
86  pix_fmt == AV_PIX_FMT_GBRP16)
87 
88 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
89  pix_fmt == AV_PIX_FMT_GBRP16)
90 
91 static const struct {
92  NVENCSTATUS nverr;
93  int averr;
94  const char *desc;
95 } nvenc_errors[] = {
96  { NV_ENC_SUCCESS, 0, "success" },
97  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
98  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
99  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
100  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
101  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
102  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
103  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
104  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
105  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
106  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
107  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
108  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
109  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
110  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
111  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
112  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
113  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
114  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
115  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
116  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
117  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
118  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
119  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
120  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
121  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
122 };
123 
124 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
125 {
126  int i;
127  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
128  if (nvenc_errors[i].nverr == err) {
129  if (desc)
130  *desc = nvenc_errors[i].desc;
131  return nvenc_errors[i].averr;
132  }
133  }
134  if (desc)
135  *desc = "unknown error";
136  return AVERROR_UNKNOWN;
137 }
138 
139 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
140  const char *error_string)
141 {
142  const char *desc;
143  const char *details = "(no details)";
144  int ret = nvenc_map_error(err, &desc);
145 
146 #ifdef NVENC_HAVE_GETLASTERRORSTRING
147  NvencContext *ctx = avctx->priv_data;
148  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
149 
150  if (p_nvenc && ctx->nvencoder)
151  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
152 #endif
153 
154  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
155 
156  return ret;
157 }
158 
159 typedef struct GUIDTuple {
160  const GUID guid;
161  int flags;
162 } GUIDTuple;
163 
164 #define PRESET_ALIAS(alias, name, ...) \
165  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
166 
167 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
168 
169 static void nvenc_map_preset(NvencContext *ctx)
170 {
171  GUIDTuple presets[] = {
172 #ifdef NVENC_HAVE_NEW_PRESETS
173  PRESET(P1),
174  PRESET(P2),
175  PRESET(P3),
176  PRESET(P4),
177  PRESET(P5),
178  PRESET(P6),
179  PRESET(P7),
180  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
181  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
182  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
183  // Compat aliases
184  PRESET_ALIAS(DEFAULT, P4, NVENC_DEPRECATED_PRESET),
185  PRESET_ALIAS(HP, P1, NVENC_DEPRECATED_PRESET),
186  PRESET_ALIAS(HQ, P7, NVENC_DEPRECATED_PRESET),
187  PRESET_ALIAS(BD, P5, NVENC_DEPRECATED_PRESET),
188  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
189  PRESET_ALIAS(LOW_LATENCY_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
190  PRESET_ALIAS(LOW_LATENCY_HQ, P7, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
191  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
192  PRESET_ALIAS(LOSSLESS_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
193 #else
194  PRESET(DEFAULT),
195  PRESET(HP),
196  PRESET(HQ),
197  PRESET(BD),
198  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
199  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
200  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
201  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
202  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
203  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
204  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
205  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
206 #endif
207  };
208 
209  GUIDTuple *t = &presets[ctx->preset];
210 
211  ctx->init_encode_params.presetGUID = t->guid;
212  ctx->flags = t->flags;
213 
214 #ifdef NVENC_HAVE_NEW_PRESETS
215  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
216  ctx->flags |= NVENC_LOSSLESS;
217 #endif
218 }
219 
220 #undef PRESET
221 #undef PRESET_ALIAS
222 
223 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
224 {
225 #if NVENCAPI_CHECK_VERSION(11, 2)
226  const char *minver = "(unknown)";
227 #elif NVENCAPI_CHECK_VERSION(11, 1)
228 # if defined(_WIN32) || defined(__CYGWIN__)
229  const char *minver = "471.41";
230 # else
231  const char *minver = "470.57.02";
232 # endif
233 #elif NVENCAPI_CHECK_VERSION(11, 0)
234 # if defined(_WIN32) || defined(__CYGWIN__)
235  const char *minver = "456.71";
236 # else
237  const char *minver = "455.28";
238 # endif
239 #elif NVENCAPI_CHECK_VERSION(10, 0)
240 # if defined(_WIN32) || defined(__CYGWIN__)
241  const char *minver = "450.51";
242 # else
243  const char *minver = "445.87";
244 # endif
245 #elif NVENCAPI_CHECK_VERSION(9, 1)
246 # if defined(_WIN32) || defined(__CYGWIN__)
247  const char *minver = "436.15";
248 # else
249  const char *minver = "435.21";
250 # endif
251 #elif NVENCAPI_CHECK_VERSION(9, 0)
252 # if defined(_WIN32) || defined(__CYGWIN__)
253  const char *minver = "418.81";
254 # else
255  const char *minver = "418.30";
256 # endif
257 #elif NVENCAPI_CHECK_VERSION(8, 2)
258 # if defined(_WIN32) || defined(__CYGWIN__)
259  const char *minver = "397.93";
260 # else
261  const char *minver = "396.24";
262 #endif
263 #elif NVENCAPI_CHECK_VERSION(8, 1)
264 # if defined(_WIN32) || defined(__CYGWIN__)
265  const char *minver = "390.77";
266 # else
267  const char *minver = "390.25";
268 # endif
269 #else
270 # if defined(_WIN32) || defined(__CYGWIN__)
271  const char *minver = "378.66";
272 # else
273  const char *minver = "378.13";
274 # endif
275 #endif
276  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
277 }
278 
279 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
280 {
281  NvencContext *ctx = avctx->priv_data;
282  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
283  NVENCSTATUS err;
284  uint32_t nvenc_max_ver;
285  int ret;
286 
287  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
288  if (ret < 0)
289  return ret;
290 
291  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
292  if (ret < 0) {
293  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
294  return ret;
295  }
296 
297  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
298  if (err != NV_ENC_SUCCESS)
299  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
300 
301  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
302 
303  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
304  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
305  "Required: %d.%d Found: %d.%d\n",
306  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
307  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
308  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
309  return AVERROR(ENOSYS);
310  }
311 
312  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
313 
314  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
315  if (err != NV_ENC_SUCCESS)
316  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
317 
318  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
319 
320  return 0;
321 }
322 
323 static int nvenc_push_context(AVCodecContext *avctx)
324 {
325  NvencContext *ctx = avctx->priv_data;
326  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
327 
328  if (ctx->d3d11_device)
329  return 0;
330 
331  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
332 }
333 
334 static int nvenc_pop_context(AVCodecContext *avctx)
335 {
336  NvencContext *ctx = avctx->priv_data;
337  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
338  CUcontext dummy;
339 
340  if (ctx->d3d11_device)
341  return 0;
342 
343  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
344 }
345 
346 static av_cold int nvenc_open_session(AVCodecContext *avctx)
347 {
348  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
349  NvencContext *ctx = avctx->priv_data;
350  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
351  NVENCSTATUS ret;
352 
353  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
354  params.apiVersion = NVENCAPI_VERSION;
355  if (ctx->d3d11_device) {
356  params.device = ctx->d3d11_device;
357  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
358  } else {
359  params.device = ctx->cu_context;
360  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
361  }
362 
363  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
364  if (ret != NV_ENC_SUCCESS) {
365  ctx->nvencoder = NULL;
366  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
367  }
368 
369  return 0;
370 }
371 
372 static int nvenc_check_codec_support(AVCodecContext *avctx)
373 {
374  NvencContext *ctx = avctx->priv_data;
375  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
376  int i, ret, count = 0;
377  GUID *guids = NULL;
378 
379  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
380 
381  if (ret != NV_ENC_SUCCESS || !count)
382  return AVERROR(ENOSYS);
383 
384  guids = av_malloc(count * sizeof(GUID));
385  if (!guids)
386  return AVERROR(ENOMEM);
387 
388  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
389  if (ret != NV_ENC_SUCCESS) {
390  ret = AVERROR(ENOSYS);
391  goto fail;
392  }
393 
394  ret = AVERROR(ENOSYS);
395  for (i = 0; i < count; i++) {
396  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
397  ret = 0;
398  break;
399  }
400  }
401 
402 fail:
403  av_free(guids);
404 
405  return ret;
406 }
407 
408 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
409 {
410  NvencContext *ctx = avctx->priv_data;
411  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
412  NV_ENC_CAPS_PARAM params = { 0 };
413  int ret, val = 0;
414 
415  params.version = NV_ENC_CAPS_PARAM_VER;
416  params.capsToQuery = cap;
417 
418  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
419 
420  if (ret == NV_ENC_SUCCESS)
421  return val;
422  return 0;
423 }
424 
425 static int nvenc_check_capabilities(AVCodecContext *avctx)
426 {
427  NvencContext *ctx = avctx->priv_data;
428  int ret;
429 
430  ret = nvenc_check_codec_support(avctx);
431  if (ret < 0) {
432  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
433  return ret;
434  }
435 
436  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
437  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
438  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
439  return AVERROR(ENOSYS);
440  }
441 
442  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
443  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
444  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
445  return AVERROR(ENOSYS);
446  }
447 
448  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
449  if (ret < avctx->width) {
450  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
451  avctx->width, ret);
452  return AVERROR(ENOSYS);
453  }
454 
455  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
456  if (ret < avctx->height) {
457  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
458  avctx->height, ret);
459  return AVERROR(ENOSYS);
460  }
461 
462  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
463  if (ret < avctx->max_b_frames) {
464  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
465  avctx->max_b_frames, ret);
466 
467  return AVERROR(ENOSYS);
468  }
469 
470  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
471  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
472  av_log(avctx, AV_LOG_WARNING,
473  "Interlaced encoding is not supported. Supported level: %d\n",
474  ret);
475  return AVERROR(ENOSYS);
476  }
477 
478  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
479  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
480  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
481  return AVERROR(ENOSYS);
482  }
483 
484  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
485  if (ctx->rc_lookahead > 0 && ret <= 0) {
486  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
487  return AVERROR(ENOSYS);
488  }
489 
490  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
491  if (ctx->temporal_aq > 0 && ret <= 0) {
492  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
493  return AVERROR(ENOSYS);
494  }
495 
496  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
497  if (ctx->weighted_pred > 0 && ret <= 0) {
498  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
499  return AVERROR(ENOSYS);
500  }
501 
502  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
503  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
504  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
505  return AVERROR(ENOSYS);
506  }
507 
508 #ifdef NVENC_HAVE_BFRAME_REF_MODE
509  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
510  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
511  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
512  return AVERROR(ENOSYS);
513  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
514  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
515  return AVERROR(ENOSYS);
516  }
517 #else
518  if (ctx->b_ref_mode != 0) {
519  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
520  return AVERROR(ENOSYS);
521  }
522 #endif
523 
524 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
525  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
526  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
527  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
528  return AVERROR(ENOSYS);
529  }
530 #else
531  if(avctx->refs != 0) {
532  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
533  return AVERROR(ENOSYS);
534  }
535 #endif
536 
537 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
538  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
539  if(ctx->single_slice_intra_refresh && ret <= 0) {
540  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
541  return AVERROR(ENOSYS);
542  }
543 #else
544  if(ctx->single_slice_intra_refresh) {
545  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
546  return AVERROR(ENOSYS);
547  }
548 #endif
549 
550  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
551  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
552  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
553  return AVERROR(ENOSYS);
554  }
555 
556 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
557  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
558  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
559  return AVERROR(ENOSYS);
560  }
561 #endif
562 
563  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
564  if(ctx->constrained_encoding && ret <= 0) {
565  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
566  return AVERROR(ENOSYS);
567  }
568 
569  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
570 
571  return 0;
572 }
573 
574 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
575 {
576  NvencContext *ctx = avctx->priv_data;
577  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
578  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
579  char name[128] = { 0};
580  int major, minor, ret;
581  CUdevice cu_device;
582  int loglevel = AV_LOG_VERBOSE;
583 
584  if (ctx->device == LIST_DEVICES)
585  loglevel = AV_LOG_INFO;
586 
587  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
588  if (ret < 0)
589  return ret;
590 
591  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
592  if (ret < 0)
593  return ret;
594 
595  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
596  if (ret < 0)
597  return ret;
598 
599  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
600  if (((major << 4) | minor) < NVENC_CAP) {
601  av_log(avctx, loglevel, "does not support NVENC\n");
602  goto fail;
603  }
604 
605  if (ctx->device != idx && ctx->device != ANY_DEVICE)
606  return -1;
607 
608  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
609  if (ret < 0)
610  goto fail;
611 
612  ctx->cu_context = ctx->cu_context_internal;
613  ctx->cu_stream = NULL;
614 
615  if ((ret = nvenc_pop_context(avctx)) < 0)
616  goto fail2;
617 
618  if ((ret = nvenc_open_session(avctx)) < 0)
619  goto fail2;
620 
621  if ((ret = nvenc_check_capabilities(avctx)) < 0)
622  goto fail3;
623 
624  av_log(avctx, loglevel, "supports NVENC\n");
625 
626  dl_fn->nvenc_device_count++;
627 
628  if (ctx->device == idx || ctx->device == ANY_DEVICE)
629  return 0;
630 
631 fail3:
632  if ((ret = nvenc_push_context(avctx)) < 0)
633  return ret;
634 
635  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
636  ctx->nvencoder = NULL;
637 
638  if ((ret = nvenc_pop_context(avctx)) < 0)
639  return ret;
640 
641 fail2:
642  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
643  ctx->cu_context_internal = NULL;
644 
645 fail:
646  return AVERROR(ENOSYS);
647 }
648 
649 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
650 {
651  NvencContext *ctx = avctx->priv_data;
652  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
653 
654  switch (avctx->codec->id) {
655  case AV_CODEC_ID_H264:
656  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
657  break;
658  case AV_CODEC_ID_HEVC:
659  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
660  break;
661  default:
662  return AVERROR_BUG;
663  }
664 
665  nvenc_map_preset(ctx);
666 
667  if (ctx->flags & NVENC_DEPRECATED_PRESET)
668  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
669 
670  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
671  AVHWFramesContext *frames_ctx;
672  AVHWDeviceContext *hwdev_ctx;
673  AVCUDADeviceContext *cuda_device_hwctx = NULL;
674 #if CONFIG_D3D11VA
675  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
676 #endif
677  int ret;
678 
679  if (avctx->hw_frames_ctx) {
680  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
681  if (frames_ctx->format == AV_PIX_FMT_CUDA)
682  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
683 #if CONFIG_D3D11VA
684  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
685  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
686 #endif
687  else
688  return AVERROR(EINVAL);
689  } else if (avctx->hw_device_ctx) {
690  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
691  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
692  cuda_device_hwctx = hwdev_ctx->hwctx;
693 #if CONFIG_D3D11VA
694  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
695  d3d11_device_hwctx = hwdev_ctx->hwctx;
696 #endif
697  else
698  return AVERROR(EINVAL);
699  } else {
700  return AVERROR(EINVAL);
701  }
702 
703  if (cuda_device_hwctx) {
704  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
705  ctx->cu_stream = cuda_device_hwctx->stream;
706  }
707 #if CONFIG_D3D11VA
708  else if (d3d11_device_hwctx) {
709  ctx->d3d11_device = d3d11_device_hwctx->device;
710  ID3D11Device_AddRef(ctx->d3d11_device);
711  }
712 #endif
713 
714  ret = nvenc_open_session(avctx);
715  if (ret < 0)
716  return ret;
717 
718  ret = nvenc_check_capabilities(avctx);
719  if (ret < 0) {
720  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
721  return ret;
722  }
723  } else {
724  int i, nb_devices = 0;
725 
726  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
727  return AVERROR_UNKNOWN;
728 
729  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
730  return AVERROR_UNKNOWN;
731 
732  if (!nb_devices) {
733  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
734  return AVERROR_EXTERNAL;
735  }
736 
737  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
738 
739  dl_fn->nvenc_device_count = 0;
740  for (i = 0; i < nb_devices; ++i) {
741  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
742  return 0;
743  }
744 
745  if (ctx->device == LIST_DEVICES)
746  return AVERROR_EXIT;
747 
748  if (!dl_fn->nvenc_device_count) {
749  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
750  return AVERROR_EXTERNAL;
751  }
752 
753  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
754  return AVERROR(EINVAL);
755  }
756 
757  return 0;
758 }
759 
760 static av_cold void set_constqp(AVCodecContext *avctx)
761 {
762  NvencContext *ctx = avctx->priv_data;
763  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
764 
765  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
766 
767  if (ctx->init_qp_p >= 0) {
768  rc->constQP.qpInterP = ctx->init_qp_p;
769  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
770  rc->constQP.qpIntra = ctx->init_qp_i;
771  rc->constQP.qpInterB = ctx->init_qp_b;
772  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
773  rc->constQP.qpIntra = av_clip(
774  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
775  rc->constQP.qpInterB = av_clip(
776  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
777  } else {
778  rc->constQP.qpIntra = rc->constQP.qpInterP;
779  rc->constQP.qpInterB = rc->constQP.qpInterP;
780  }
781  } else if (ctx->cqp >= 0) {
782  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
783  if (avctx->b_quant_factor != 0.0)
784  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
785  if (avctx->i_quant_factor != 0.0)
786  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
787  }
788 
789  avctx->qmin = -1;
790  avctx->qmax = -1;
791 }
792 
793 static av_cold void set_vbr(AVCodecContext *avctx)
794 {
795  NvencContext *ctx = avctx->priv_data;
796  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
797  int qp_inter_p;
798 
799  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
800  rc->enableMinQP = 1;
801  rc->enableMaxQP = 1;
802 
803  rc->minQP.qpInterB = avctx->qmin;
804  rc->minQP.qpInterP = avctx->qmin;
805  rc->minQP.qpIntra = avctx->qmin;
806 
807  rc->maxQP.qpInterB = avctx->qmax;
808  rc->maxQP.qpInterP = avctx->qmax;
809  rc->maxQP.qpIntra = avctx->qmax;
810 
811  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
812  } else if (avctx->qmin >= 0) {
813  rc->enableMinQP = 1;
814 
815  rc->minQP.qpInterB = avctx->qmin;
816  rc->minQP.qpInterP = avctx->qmin;
817  rc->minQP.qpIntra = avctx->qmin;
818 
819  qp_inter_p = avctx->qmin;
820  } else {
821  qp_inter_p = 26; // default to 26
822  }
823 
824  rc->enableInitialRCQP = 1;
825 
826  if (ctx->init_qp_p < 0) {
827  rc->initialRCQP.qpInterP = qp_inter_p;
828  } else {
829  rc->initialRCQP.qpInterP = ctx->init_qp_p;
830  }
831 
832  if (ctx->init_qp_i < 0) {
833  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
834  rc->initialRCQP.qpIntra = av_clip(
835  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
836  } else {
837  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
838  }
839  } else {
840  rc->initialRCQP.qpIntra = ctx->init_qp_i;
841  }
842 
843  if (ctx->init_qp_b < 0) {
844  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
845  rc->initialRCQP.qpInterB = av_clip(
846  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
847  } else {
848  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
849  }
850  } else {
851  rc->initialRCQP.qpInterB = ctx->init_qp_b;
852  }
853 }
854 
855 static av_cold void set_lossless(AVCodecContext *avctx)
856 {
857  NvencContext *ctx = avctx->priv_data;
858  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
859 
860  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
861  rc->constQP.qpInterB = 0;
862  rc->constQP.qpInterP = 0;
863  rc->constQP.qpIntra = 0;
864 
865  avctx->qmin = -1;
866  avctx->qmax = -1;
867 }
868 
869 static void nvenc_override_rate_control(AVCodecContext *avctx)
870 {
871  NvencContext *ctx = avctx->priv_data;
872  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
873 
874  switch (ctx->rc) {
875  case NV_ENC_PARAMS_RC_CONSTQP:
876  set_constqp(avctx);
877  return;
878  case NV_ENC_PARAMS_RC_VBR_MINQP:
879  if (avctx->qmin < 0) {
880  av_log(avctx, AV_LOG_WARNING,
881  "The variable bitrate rate-control requires "
882  "the 'qmin' option set.\n");
883  set_vbr(avctx);
884  return;
885  }
886  /* fall through */
887  case NV_ENC_PARAMS_RC_VBR_HQ:
888  case NV_ENC_PARAMS_RC_VBR:
889  set_vbr(avctx);
890  break;
891  case NV_ENC_PARAMS_RC_CBR:
892  case NV_ENC_PARAMS_RC_CBR_HQ:
893  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
894  break;
895  }
896 
897  rc->rateControlMode = ctx->rc;
898 }
899 
900 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
901 {
902  NvencContext *ctx = avctx->priv_data;
903  // default minimum of 4 surfaces
904  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
905  // another multiply by 2 to avoid blocking next PBB group
906  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
907 
908  // lookahead enabled
909  if (ctx->rc_lookahead > 0) {
910  // +1 is to account for lkd_bound calculation later
911  // +4 is to allow sufficient pipelining with lookahead
912  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
913  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
914  {
915  av_log(avctx, AV_LOG_WARNING,
916  "Defined rc_lookahead requires more surfaces, "
917  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
918  }
919  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
920  } else {
921  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
922  {
923  av_log(avctx, AV_LOG_WARNING,
924  "Defined b-frame requires more surfaces, "
925  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
926  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
927  }
928  else if (ctx->nb_surfaces <= 0)
929  ctx->nb_surfaces = nb_surfaces;
930  // otherwise use user specified value
931  }
932 
933  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
934  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
935 
936  return 0;
937 }
938 
939 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
940 {
941  NvencContext *ctx = avctx->priv_data;
942 
943  if (avctx->global_quality > 0)
944  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
945 
946  if (ctx->cqp < 0 && avctx->global_quality > 0)
947  ctx->cqp = avctx->global_quality;
948 
949  if (avctx->bit_rate > 0) {
950  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
951  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
952  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
953  }
954 
955  if (avctx->rc_max_rate > 0)
956  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
957 
958 #ifdef NVENC_HAVE_MULTIPASS
959  ctx->encode_config.rcParams.multiPass = ctx->multipass;
960 
961  if (ctx->flags & NVENC_ONE_PASS)
962  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
963  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
964  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
965 
966  if (ctx->rc < 0) {
967  if (ctx->cbr) {
968  ctx->rc = NV_ENC_PARAMS_RC_CBR;
969  } else if (ctx->cqp >= 0) {
970  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
971  } else if (ctx->quality >= 0.0f) {
972  ctx->rc = NV_ENC_PARAMS_RC_VBR;
973  }
974  }
975 #else
976  if (ctx->rc < 0) {
977  if (ctx->flags & NVENC_ONE_PASS)
978  ctx->twopass = 0;
979  if (ctx->flags & NVENC_TWO_PASSES)
980  ctx->twopass = 1;
981 
982  if (ctx->twopass < 0)
983  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
984 
985  if (ctx->cbr) {
986  if (ctx->twopass) {
987  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
988  } else {
989  ctx->rc = NV_ENC_PARAMS_RC_CBR;
990  }
991  } else if (ctx->cqp >= 0) {
992  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
993  } else if (ctx->twopass) {
994  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
995  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
996  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
997  }
998  }
999 #endif
1000 
1001  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1002  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1003  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1004 
1005  ctx->rc &= ~RC_MODE_DEPRECATED;
1006  }
1007 
1008 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1009  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1010  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1011 #else
1012  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1013  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1014 #endif
1015 
1016 #ifdef NVENC_HAVE_LDKFS
1017  if (ctx->ldkfs)
1018  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1019 #endif
1020 
1021  if (ctx->flags & NVENC_LOSSLESS) {
1022  set_lossless(avctx);
1023  } else if (ctx->rc >= 0) {
1024  nvenc_override_rate_control(avctx);
1025  } else {
1026  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1027  set_vbr(avctx);
1028  }
1029 
1030  if (avctx->rc_buffer_size > 0) {
1031  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1032  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1033  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1034  }
1035 
1036  if (ctx->aq) {
1037  ctx->encode_config.rcParams.enableAQ = 1;
1038  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1039  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1040  }
1041 
1042  if (ctx->temporal_aq) {
1043  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1044  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1045  }
1046 
1047  if (ctx->rc_lookahead > 0) {
1048  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1049  ctx->encode_config.frameIntervalP - 4;
1050 
1051  if (lkd_bound < 0) {
1052  av_log(avctx, AV_LOG_WARNING,
1053  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1054  } else {
1055  ctx->encode_config.rcParams.enableLookahead = 1;
1056  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1057  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1058  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1059  av_log(avctx, AV_LOG_VERBOSE,
1060  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1061  ctx->encode_config.rcParams.lookaheadDepth,
1062  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1063  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1064  }
1065  }
1066 
1067  if (ctx->strict_gop) {
1068  ctx->encode_config.rcParams.strictGOPTarget = 1;
1069  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1070  }
1071 
1072  if (ctx->nonref_p)
1073  ctx->encode_config.rcParams.enableNonRefP = 1;
1074 
1075  if (ctx->zerolatency)
1076  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1077 
1078  if (ctx->quality) {
1079  //convert from float to fixed point 8.8
1080  int tmp_quality = (int)(ctx->quality * 256.0f);
1081  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1082  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1083 
1084  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1085 
1086  //CQ mode shall discard avg bitrate & honor max bitrate;
1087  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1088  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1089  }
1090 }
1091 
1092 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1093 {
1094  NvencContext *ctx = avctx->priv_data;
1095  NV_ENC_CONFIG *cc = &ctx->encode_config;
1096  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1097  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1098 
1099  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1100 
1101  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1102  vui->colourMatrix = AVCOL_SPC_BT470BG;
1103  vui->colourPrimaries = avctx->color_primaries;
1104  vui->transferCharacteristics = avctx->color_trc;
1105  vui->videoFullRangeFlag = 0;
1106  } else {
1107  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1108  vui->colourPrimaries = avctx->color_primaries;
1109  vui->transferCharacteristics = avctx->color_trc;
1110  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1111  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1112  }
1113 
1114  vui->colourDescriptionPresentFlag =
1115  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1116 
1117  vui->videoSignalTypePresentFlag =
1118  (vui->colourDescriptionPresentFlag
1119  || vui->videoFormat != 5
1120  || vui->videoFullRangeFlag != 0);
1121 
1122  h264->sliceMode = 3;
1123  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1124 
1125  if (ctx->intra_refresh) {
1126  h264->enableIntraRefresh = 1;
1127  h264->intraRefreshPeriod = avctx->gop_size;
1128  h264->intraRefreshCnt = avctx->gop_size - 1;
1129 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1130  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1131 #endif
1132  }
1133 
1134  if (ctx->constrained_encoding)
1135  h264->enableConstrainedEncoding = 1;
1136 
1137  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1138  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1139  h264->outputAUD = ctx->aud;
1140 
1141  if (ctx->dpb_size >= 0) {
1142  /* 0 means "let the hardware decide" */
1143  h264->maxNumRefFrames = ctx->dpb_size;
1144  }
1145 
1146  if (ctx->intra_refresh) {
1147  h264->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1148  } else if (avctx->gop_size >= 0) {
1149  h264->idrPeriod = avctx->gop_size;
1150  }
1151 
1152  if (IS_CBR(cc->rcParams.rateControlMode)) {
1153  h264->outputBufferingPeriodSEI = 1;
1154  }
1155 
1156  h264->outputPictureTimingSEI = 1;
1157 
1158  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1159  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1160  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1161  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1162  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1163  }
1164 
1165  if (ctx->flags & NVENC_LOSSLESS) {
1166  h264->qpPrimeYZeroTransformBypassFlag = 1;
1167  } else {
1168  switch(ctx->profile) {
1169  case NV_ENC_H264_PROFILE_BASELINE:
1170  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1171  avctx->profile = FF_PROFILE_H264_BASELINE;
1172  break;
1173  case NV_ENC_H264_PROFILE_MAIN:
1174  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1175  avctx->profile = FF_PROFILE_H264_MAIN;
1176  break;
1177  case NV_ENC_H264_PROFILE_HIGH:
1178  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1179  avctx->profile = FF_PROFILE_H264_HIGH;
1180  break;
1181  case NV_ENC_H264_PROFILE_HIGH_444P:
1182  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1183  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1184  break;
1185  }
1186  }
1187 
1188  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1189  if (IS_YUV444(ctx->data_pix_fmt)) {
1190  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1191  avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
1192  }
1193 
1194  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1195 
1196  h264->level = ctx->level;
1197 
1198  if (ctx->coder >= 0)
1199  h264->entropyCodingMode = ctx->coder;
1200 
1201 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1202  h264->useBFramesAsRef = ctx->b_ref_mode;
1203 #endif
1204 
1205 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1206  h264->numRefL0 = avctx->refs;
1207  h264->numRefL1 = avctx->refs;
1208 #endif
1209 
1210  return 0;
1211 }
1212 
1213 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1214 {
1215  NvencContext *ctx = avctx->priv_data;
1216  NV_ENC_CONFIG *cc = &ctx->encode_config;
1217  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1218  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1219 
1220  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1221 
1222  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1223  vui->colourMatrix = AVCOL_SPC_BT470BG;
1224  vui->colourPrimaries = avctx->color_primaries;
1225  vui->transferCharacteristics = avctx->color_trc;
1226  vui->videoFullRangeFlag = 0;
1227  } else {
1228  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1229  vui->colourPrimaries = avctx->color_primaries;
1230  vui->transferCharacteristics = avctx->color_trc;
1231  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1232  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1233  }
1234 
1235  vui->colourDescriptionPresentFlag =
1236  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1237 
1238  vui->videoSignalTypePresentFlag =
1239  (vui->colourDescriptionPresentFlag
1240  || vui->videoFormat != 5
1241  || vui->videoFullRangeFlag != 0);
1242 
1243  hevc->sliceMode = 3;
1244  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1245 
1246  if (ctx->intra_refresh) {
1247  hevc->enableIntraRefresh = 1;
1248  hevc->intraRefreshPeriod = avctx->gop_size;
1249  hevc->intraRefreshCnt = avctx->gop_size - 1;
1250 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1251  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1252 #endif
1253  }
1254 
1255 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1256  if (ctx->constrained_encoding)
1257  hevc->enableConstrainedEncoding = 1;
1258 #endif
1259 
1260  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1261  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1262  hevc->outputAUD = ctx->aud;
1263 
1264  if (ctx->dpb_size >= 0) {
1265  /* 0 means "let the hardware decide" */
1266  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1267  }
1268 
1269  if (ctx->intra_refresh) {
1270  hevc->idrPeriod = NVENC_INFINITE_GOPLENGTH;
1271  } else if (avctx->gop_size >= 0) {
1272  hevc->idrPeriod = avctx->gop_size;
1273  }
1274 
1275  if (IS_CBR(cc->rcParams.rateControlMode)) {
1276  hevc->outputBufferingPeriodSEI = 1;
1277  }
1278 
1279  hevc->outputPictureTimingSEI = 1;
1280 
1281  switch (ctx->profile) {
1282  case NV_ENC_HEVC_PROFILE_MAIN:
1283  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1284  avctx->profile = FF_PROFILE_HEVC_MAIN;
1285  break;
1286  case NV_ENC_HEVC_PROFILE_MAIN_10:
1287  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1288  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1289  break;
1290  case NV_ENC_HEVC_PROFILE_REXT:
1291  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1292  avctx->profile = FF_PROFILE_HEVC_REXT;
1293  break;
1294  }
1295 
1296  // force setting profile as main10 if input is 10 bit
1297  if (IS_10BIT(ctx->data_pix_fmt)) {
1298  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1299  avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1300  }
1301 
1302  // force setting profile as rext if input is yuv444
1303  if (IS_YUV444(ctx->data_pix_fmt)) {
1304  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1305  avctx->profile = FF_PROFILE_HEVC_REXT;
1306  }
1307 
1308  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1309 
1310  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1311 
1312  hevc->level = ctx->level;
1313 
1314  hevc->tier = ctx->tier;
1315 
1316 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1317  hevc->useBFramesAsRef = ctx->b_ref_mode;
1318 #endif
1319 
1320 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1321  hevc->numRefL0 = avctx->refs;
1322  hevc->numRefL1 = avctx->refs;
1323 #endif
1324 
1325  return 0;
1326 }
1327 
1328 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1329 {
1330  switch (avctx->codec->id) {
1331  case AV_CODEC_ID_H264:
1332  return nvenc_setup_h264_config(avctx);
1333  case AV_CODEC_ID_HEVC:
1334  return nvenc_setup_hevc_config(avctx);
1335  /* Earlier switch/case will return if unknown codec is passed. */
1336  }
1337 
1338  return 0;
1339 }
1340 
1341 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1342  int sw, sh;
1343 
1344  sw = avctx->width;
1345  sh = avctx->height;
1346 
1347  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1348  sw *= avctx->sample_aspect_ratio.num;
1349  sh *= avctx->sample_aspect_ratio.den;
1350  }
1351 
1352  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1353 }
1354 
1355 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1356 {
1357  NvencContext *ctx = avctx->priv_data;
1358  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1359  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1360 
1361  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1362  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1363  AVCPBProperties *cpb_props;
1364  int res = 0;
1365  int dw, dh;
1366 
1367  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1368  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1369 
1370  ctx->init_encode_params.encodeHeight = avctx->height;
1371  ctx->init_encode_params.encodeWidth = avctx->width;
1372 
1373  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1374 
1375  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1376  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1377 
1378 #ifdef NVENC_HAVE_NEW_PRESETS
1379  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1380 
1381  if (ctx->flags & NVENC_LOSSLESS)
1382  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1383  else if (ctx->flags & NVENC_LOWLATENCY)
1384  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1385 
1386  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1387  ctx->init_encode_params.encodeGUID,
1388  ctx->init_encode_params.presetGUID,
1389  ctx->init_encode_params.tuningInfo,
1390  &preset_config);
1391 #else
1392  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1393  ctx->init_encode_params.encodeGUID,
1394  ctx->init_encode_params.presetGUID,
1395  &preset_config);
1396 #endif
1397  if (nv_status != NV_ENC_SUCCESS)
1398  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1399 
1400  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1401 
1402  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1403 
1404  compute_dar(avctx, &dw, &dh);
1405  ctx->init_encode_params.darHeight = dh;
1406  ctx->init_encode_params.darWidth = dw;
1407 
1408  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1409  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1410  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1411  } else {
1412  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1413  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1414  }
1415 
1416  ctx->init_encode_params.enableEncodeAsync = 0;
1417  ctx->init_encode_params.enablePTD = 1;
1418 
1419 #ifdef NVENC_HAVE_NEW_PRESETS
1420  /* If lookahead isn't set from CLI, use value from preset.
1421  * P6 & P7 presets may enable lookahead for better quality.
1422  * */
1423  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1424  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1425 #endif
1426 
1427  if (ctx->weighted_pred == 1)
1428  ctx->init_encode_params.enableWeightedPrediction = 1;
1429 
1430  if (ctx->bluray_compat) {
1431  ctx->aud = 1;
1432  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1433  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1434  switch (avctx->codec->id) {
1435  case AV_CODEC_ID_H264:
1436  /* maximum level depends on used resolution */
1437  break;
1438  case AV_CODEC_ID_HEVC:
1439  ctx->level = NV_ENC_LEVEL_HEVC_51;
1440  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1441  break;
1442  }
1443  }
1444 
1445  if (avctx->gop_size > 0) {
1446  if (avctx->max_b_frames >= 0) {
1447  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1448  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1449  }
1450 
1451  ctx->encode_config.gopLength = avctx->gop_size;
1452  } else if (avctx->gop_size == 0) {
1453  ctx->encode_config.frameIntervalP = 0;
1454  ctx->encode_config.gopLength = 1;
1455  }
1456 
1457  /* force to enable intra refresh */
1458  if(ctx->single_slice_intra_refresh)
1459  ctx->intra_refresh = 1;
1460 
1461  if (ctx->intra_refresh)
1462  ctx->encode_config.gopLength = NVENC_INFINITE_GOPLENGTH;
1463 
1464  nvenc_recalc_surfaces(avctx);
1465 
1466  nvenc_setup_rate_control(avctx);
1467 
1468  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1469  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1470  } else {
1471  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1472  }
1473 
1474  res = nvenc_setup_codec_config(avctx);
1475  if (res)
1476  return res;
1477 
1478  res = nvenc_push_context(avctx);
1479  if (res < 0)
1480  return res;
1481 
1482  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1483  if (nv_status != NV_ENC_SUCCESS) {
1484  nvenc_pop_context(avctx);
1485  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1486  }
1487 
1488 #ifdef NVENC_HAVE_CUSTREAM_PTR
1489  if (ctx->cu_context) {
1490  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1491  if (nv_status != NV_ENC_SUCCESS) {
1492  nvenc_pop_context(avctx);
1493  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1494  }
1495  }
1496 #endif
1497 
1498  res = nvenc_pop_context(avctx);
1499  if (res < 0)
1500  return res;
1501 
1502  if (ctx->encode_config.frameIntervalP > 1)
1503  avctx->has_b_frames = 2;
1504 
1505  if (ctx->encode_config.rcParams.averageBitRate > 0)
1506  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1507 
1508  cpb_props = ff_add_cpb_side_data(avctx);
1509  if (!cpb_props)
1510  return AVERROR(ENOMEM);
1511  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1512  cpb_props->avg_bitrate = avctx->bit_rate;
1513  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1514 
1515  return 0;
1516 }
1517 
1518 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1519 {
1520  switch (pix_fmt) {
1521  case AV_PIX_FMT_YUV420P:
1522  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1523  case AV_PIX_FMT_NV12:
1524  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1525  case AV_PIX_FMT_P010:
1526  case AV_PIX_FMT_P016:
1527  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1528  case AV_PIX_FMT_GBRP:
1529  case AV_PIX_FMT_YUV444P:
1530  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1531  case AV_PIX_FMT_GBRP16:
1532  case AV_PIX_FMT_YUV444P16:
1533  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1534  case AV_PIX_FMT_0RGB32:
1535  case AV_PIX_FMT_RGB32:
1536  return NV_ENC_BUFFER_FORMAT_ARGB;
1537  case AV_PIX_FMT_0BGR32:
1538  case AV_PIX_FMT_BGR32:
1539  return NV_ENC_BUFFER_FORMAT_ABGR;
1540  case AV_PIX_FMT_X2RGB10:
1541  return NV_ENC_BUFFER_FORMAT_ARGB10;
1542  case AV_PIX_FMT_X2BGR10:
1543  return NV_ENC_BUFFER_FORMAT_ABGR10;
1544  default:
1545  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1546  }
1547 }
1548 
1549 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1550 {
1551  NvencContext *ctx = avctx->priv_data;
1552  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1553  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1554  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1555 
1556  NVENCSTATUS nv_status;
1557  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1558  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1559 
1560  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1561  ctx->surfaces[idx].in_ref = av_frame_alloc();
1562  if (!ctx->surfaces[idx].in_ref)
1563  return AVERROR(ENOMEM);
1564  } else {
1565  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1566 
1567  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1568  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1569  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1570  av_get_pix_fmt_name(ctx->data_pix_fmt));
1571  return AVERROR(EINVAL);
1572  }
1573 
1574  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1575  allocSurf.width = avctx->width;
1576  allocSurf.height = avctx->height;
1577  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1578 
1579  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1580  if (nv_status != NV_ENC_SUCCESS) {
1581  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1582  }
1583 
1584  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1585  ctx->surfaces[idx].width = allocSurf.width;
1586  ctx->surfaces[idx].height = allocSurf.height;
1587  }
1588 
1589  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1590  if (nv_status != NV_ENC_SUCCESS) {
1591  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1592  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1593  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1594  av_frame_free(&ctx->surfaces[idx].in_ref);
1595  return err;
1596  }
1597 
1598  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1599 
1600  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1601 
1602  return 0;
1603 }
1604 
1605 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1606 {
1607  NvencContext *ctx = avctx->priv_data;
1608  int i, res = 0, res2;
1609 
1610  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1611  if (!ctx->surfaces)
1612  return AVERROR(ENOMEM);
1613 
1614  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces, sizeof(int64_t), 0);
1615  if (!ctx->timestamp_list)
1616  return AVERROR(ENOMEM);
1617 
1618  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1619  if (!ctx->unused_surface_queue)
1620  return AVERROR(ENOMEM);
1621 
1622  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1623  if (!ctx->output_surface_queue)
1624  return AVERROR(ENOMEM);
1625  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1626  if (!ctx->output_surface_ready_queue)
1627  return AVERROR(ENOMEM);
1628 
1629  res = nvenc_push_context(avctx);
1630  if (res < 0)
1631  return res;
1632 
1633  for (i = 0; i < ctx->nb_surfaces; i++) {
1634  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1635  goto fail;
1636  }
1637 
1638 fail:
1639  res2 = nvenc_pop_context(avctx);
1640  if (res2 < 0)
1641  return res2;
1642 
1643  return res;
1644 }
1645 
1646 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1647 {
1648  NvencContext *ctx = avctx->priv_data;
1649  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1650  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1651 
1652  NVENCSTATUS nv_status;
1653  uint32_t outSize = 0;
1654  char tmpHeader[256];
1655  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1656  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1657 
1658  payload.spsppsBuffer = tmpHeader;
1659  payload.inBufferSize = sizeof(tmpHeader);
1660  payload.outSPSPPSPayloadSize = &outSize;
1661 
1662  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1663  if (nv_status != NV_ENC_SUCCESS) {
1664  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1665  }
1666 
1667  avctx->extradata_size = outSize;
1668  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1669 
1670  if (!avctx->extradata) {
1671  return AVERROR(ENOMEM);
1672  }
1673 
1674  memcpy(avctx->extradata, tmpHeader, outSize);
1675 
1676  return 0;
1677 }
1678 
1679 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1680 {
1681  NvencContext *ctx = avctx->priv_data;
1682  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1683  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1684  int i, res;
1685 
1686  /* the encoder has to be flushed before it can be closed */
1687  if (ctx->nvencoder) {
1688  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1689  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1690 
1691  res = nvenc_push_context(avctx);
1692  if (res < 0)
1693  return res;
1694 
1695  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1696  }
1697 
1698  av_fifo_freep2(&ctx->timestamp_list);
1699  av_fifo_freep2(&ctx->output_surface_ready_queue);
1700  av_fifo_freep2(&ctx->output_surface_queue);
1701  av_fifo_freep2(&ctx->unused_surface_queue);
1702 
1703  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1704  for (i = 0; i < ctx->nb_registered_frames; i++) {
1705  if (ctx->registered_frames[i].mapped)
1706  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1707  if (ctx->registered_frames[i].regptr)
1708  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1709  }
1710  ctx->nb_registered_frames = 0;
1711  }
1712 
1713  if (ctx->surfaces) {
1714  for (i = 0; i < ctx->nb_surfaces; ++i) {
1715  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1716  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1717  av_frame_free(&ctx->surfaces[i].in_ref);
1718  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1719  }
1720  }
1721  av_freep(&ctx->surfaces);
1722  ctx->nb_surfaces = 0;
1723 
1724  av_frame_free(&ctx->frame);
1725 
1726  av_freep(&ctx->sei_data);
1727 
1728  if (ctx->nvencoder) {
1729  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1730 
1731  res = nvenc_pop_context(avctx);
1732  if (res < 0)
1733  return res;
1734  }
1735  ctx->nvencoder = NULL;
1736 
1737  if (ctx->cu_context_internal)
1738  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1739  ctx->cu_context = ctx->cu_context_internal = NULL;
1740 
1741 #if CONFIG_D3D11VA
1742  if (ctx->d3d11_device) {
1743  ID3D11Device_Release(ctx->d3d11_device);
1744  ctx->d3d11_device = NULL;
1745  }
1746 #endif
1747 
1748  nvenc_free_functions(&dl_fn->nvenc_dl);
1749  cuda_free_functions(&dl_fn->cuda_dl);
1750 
1751  dl_fn->nvenc_device_count = 0;
1752 
1753  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1754 
1755  return 0;
1756 }
1757 
1758 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1759 {
1760  NvencContext *ctx = avctx->priv_data;
1761  int ret;
1762 
1763  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1764  AVHWFramesContext *frames_ctx;
1765  if (!avctx->hw_frames_ctx) {
1766  av_log(avctx, AV_LOG_ERROR,
1767  "hw_frames_ctx must be set when using GPU frames as input\n");
1768  return AVERROR(EINVAL);
1769  }
1770  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1771  if (frames_ctx->format != avctx->pix_fmt) {
1772  av_log(avctx, AV_LOG_ERROR,
1773  "hw_frames_ctx must match the GPU frame type\n");
1774  return AVERROR(EINVAL);
1775  }
1776  ctx->data_pix_fmt = frames_ctx->sw_format;
1777  } else {
1778  ctx->data_pix_fmt = avctx->pix_fmt;
1779  }
1780 
1781  ctx->frame = av_frame_alloc();
1782  if (!ctx->frame)
1783  return AVERROR(ENOMEM);
1784 
1785  if ((ret = nvenc_load_libraries(avctx)) < 0)
1786  return ret;
1787 
1788  if ((ret = nvenc_setup_device(avctx)) < 0)
1789  return ret;
1790 
1791  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1792  return ret;
1793 
1794  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1795  return ret;
1796 
1797  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1798  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1799  return ret;
1800  }
1801 
1802  return 0;
1803 }
1804 
1805 static NvencSurface *get_free_frame(NvencContext *ctx)
1806 {
1807  NvencSurface *tmp_surf;
1808 
1809  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
1810  // queue empty
1811  return NULL;
1812 
1813  return tmp_surf;
1814 }
1815 
1816 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1817  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1818 {
1819  int dst_linesize[4] = {
1820  lock_buffer_params->pitch,
1821  lock_buffer_params->pitch,
1822  lock_buffer_params->pitch,
1823  lock_buffer_params->pitch
1824  };
1825  uint8_t *dst_data[4];
1826  int ret;
1827 
1828  if (frame->format == AV_PIX_FMT_YUV420P)
1829  dst_linesize[1] = dst_linesize[2] >>= 1;
1830 
1831  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1832  lock_buffer_params->bufferDataPtr, dst_linesize);
1833  if (ret < 0)
1834  return ret;
1835 
1836  if (frame->format == AV_PIX_FMT_YUV420P)
1837  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1838 
1839  av_image_copy(dst_data, dst_linesize,
1840  (const uint8_t**)frame->data, frame->linesize, frame->format,
1841  avctx->width, avctx->height);
1842 
1843  return 0;
1844 }
1845 
1846 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1847 {
1848  NvencContext *ctx = avctx->priv_data;
1849  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1850  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1851  NVENCSTATUS nv_status;
1852 
1853  int i, first_round;
1854 
1855  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1856  for (first_round = 1; first_round >= 0; first_round--) {
1857  for (i = 0; i < ctx->nb_registered_frames; i++) {
1858  if (!ctx->registered_frames[i].mapped) {
1859  if (ctx->registered_frames[i].regptr) {
1860  if (first_round)
1861  continue;
1862  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1863  if (nv_status != NV_ENC_SUCCESS)
1864  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1865  ctx->registered_frames[i].ptr = NULL;
1866  ctx->registered_frames[i].regptr = NULL;
1867  }
1868  return i;
1869  }
1870  }
1871  }
1872  } else {
1873  return ctx->nb_registered_frames++;
1874  }
1875 
1876  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1877  return AVERROR(ENOMEM);
1878 }
1879 
1880 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
1881 {
1882  NvencContext *ctx = avctx->priv_data;
1883  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1884  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1885 
1886  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1887  NV_ENC_REGISTER_RESOURCE reg = { 0 };
1888  int i, idx, ret;
1889 
1890  for (i = 0; i < ctx->nb_registered_frames; i++) {
1891  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1892  return i;
1893  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1894  return i;
1895  }
1896 
1897  idx = nvenc_find_free_reg_resource(avctx);
1898  if (idx < 0)
1899  return idx;
1900 
1901  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1902  reg.width = frames_ctx->width;
1903  reg.height = frames_ctx->height;
1904  reg.pitch = frame->linesize[0];
1905  reg.resourceToRegister = frame->data[0];
1906 
1907  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1908  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1909  }
1910  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1911  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1912  reg.subResourceIndex = (intptr_t)frame->data[1];
1913  }
1914 
1915  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1916  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1917  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1918  av_get_pix_fmt_name(frames_ctx->sw_format));
1919  return AVERROR(EINVAL);
1920  }
1921 
1922  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1923  if (ret != NV_ENC_SUCCESS) {
1924  nvenc_print_error(avctx, ret, "Error registering an input resource");
1925  return AVERROR_UNKNOWN;
1926  }
1927 
1928  ctx->registered_frames[idx].ptr = frame->data[0];
1929  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1930  ctx->registered_frames[idx].regptr = reg.registeredResource;
1931  return idx;
1932 }
1933 
1934 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
1935  NvencSurface *nvenc_frame)
1936 {
1937  NvencContext *ctx = avctx->priv_data;
1938  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1939  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1940 
1941  int res;
1942  NVENCSTATUS nv_status;
1943 
1944  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1945  int reg_idx = nvenc_register_frame(avctx, frame);
1946  if (reg_idx < 0) {
1947  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1948  return reg_idx;
1949  }
1950 
1951  res = av_frame_ref(nvenc_frame->in_ref, frame);
1952  if (res < 0)
1953  return res;
1954 
1955  if (!ctx->registered_frames[reg_idx].mapped) {
1956  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1957  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1958  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1959  if (nv_status != NV_ENC_SUCCESS) {
1960  av_frame_unref(nvenc_frame->in_ref);
1961  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1962  }
1963  }
1964 
1965  ctx->registered_frames[reg_idx].mapped += 1;
1966 
1967  nvenc_frame->reg_idx = reg_idx;
1968  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1969  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1970  nvenc_frame->pitch = frame->linesize[0];
1971 
1972  return 0;
1973  } else {
1974  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1975 
1976  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1977  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1978 
1979  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1980  if (nv_status != NV_ENC_SUCCESS) {
1981  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1982  }
1983 
1984  nvenc_frame->pitch = lockBufferParams.pitch;
1985  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1986 
1987  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1988  if (nv_status != NV_ENC_SUCCESS) {
1989  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1990  }
1991 
1992  return res;
1993  }
1994 }
1995 
1996 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
1997  NV_ENC_PIC_PARAMS *params,
1998  NV_ENC_SEI_PAYLOAD *sei_data,
1999  int sei_count)
2000 {
2001  NvencContext *ctx = avctx->priv_data;
2002 
2003  switch (avctx->codec->id) {
2004  case AV_CODEC_ID_H264:
2005  params->codecPicParams.h264PicParams.sliceMode =
2006  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2007  params->codecPicParams.h264PicParams.sliceModeData =
2008  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2009  if (sei_count > 0) {
2010  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2011  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2012  }
2013 
2014  break;
2015  case AV_CODEC_ID_HEVC:
2016  params->codecPicParams.hevcPicParams.sliceMode =
2017  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2018  params->codecPicParams.hevcPicParams.sliceModeData =
2019  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2020  if (sei_count > 0) {
2021  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2022  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2023  }
2024 
2025  break;
2026  }
2027 }
2028 
2029 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2030 {
2031  av_fifo_write(queue, &timestamp, 1);
2032 }
2033 
2034 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2035 {
2036  int64_t timestamp = AV_NOPTS_VALUE;
2037  // The following call might fail if the queue is empty.
2038  av_fifo_read(queue, &timestamp, 1);
2039 
2040  return timestamp;
2041 }
2042 
2043 static int nvenc_set_timestamp(AVCodecContext *avctx,
2044  NV_ENC_LOCK_BITSTREAM *params,
2045  AVPacket *pkt)
2046 {
2047  NvencContext *ctx = avctx->priv_data;
2048 
2049  pkt->pts = params->outputTimeStamp;
2050  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2051 
2052  pkt->dts -= FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
2053 
2054  return 0;
2055 }
2056 
2057 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2058 {
2059  NvencContext *ctx = avctx->priv_data;
2060  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2061  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2062 
2063  uint32_t slice_mode_data;
2064  uint32_t *slice_offsets = NULL;
2065  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2066  NVENCSTATUS nv_status;
2067  int res = 0;
2068 
2069  enum AVPictureType pict_type;
2070 
2071  switch (avctx->codec->id) {
2072  case AV_CODEC_ID_H264:
2073  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2074  break;
2075  case AV_CODEC_ID_H265:
2076  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2077  break;
2078  default:
2079  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
2080  res = AVERROR(EINVAL);
2081  goto error;
2082  }
2083  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
2084 
2085  if (!slice_offsets) {
2086  res = AVERROR(ENOMEM);
2087  goto error;
2088  }
2089 
2090  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2091 
2092  lock_params.doNotWait = 0;
2093  lock_params.outputBitstream = tmpoutsurf->output_surface;
2094  lock_params.sliceOffsets = slice_offsets;
2095 
2096  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2097  if (nv_status != NV_ENC_SUCCESS) {
2098  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2099  goto error;
2100  }
2101 
2102  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2103 
2104  if (res < 0) {
2105  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2106  goto error;
2107  }
2108 
2109  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2110 
2111  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2112  if (nv_status != NV_ENC_SUCCESS) {
2113  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2114  goto error;
2115  }
2116 
2117 
2118  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2119  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2120  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2121  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2122  if (nv_status != NV_ENC_SUCCESS) {
2123  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2124  goto error;
2125  }
2126  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2127  res = AVERROR_BUG;
2128  goto error;
2129  }
2130 
2131  av_frame_unref(tmpoutsurf->in_ref);
2132 
2133  tmpoutsurf->input_surface = NULL;
2134  }
2135 
2136  switch (lock_params.pictureType) {
2137  case NV_ENC_PIC_TYPE_IDR:
2138  pkt->flags |= AV_PKT_FLAG_KEY;
2139  case NV_ENC_PIC_TYPE_I:
2140  pict_type = AV_PICTURE_TYPE_I;
2141  break;
2142  case NV_ENC_PIC_TYPE_P:
2143  pict_type = AV_PICTURE_TYPE_P;
2144  break;
2145  case NV_ENC_PIC_TYPE_B:
2146  pict_type = AV_PICTURE_TYPE_B;
2147  break;
2148  case NV_ENC_PIC_TYPE_BI:
2149  pict_type = AV_PICTURE_TYPE_BI;
2150  break;
2151  default:
2152  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2153  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2154  res = AVERROR_EXTERNAL;
2155  goto error;
2156  }
2157 
2158  ff_side_data_set_encoder_stats(pkt,
2159  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2160 
2161  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2162  if (res < 0)
2163  goto error2;
2164 
2165  av_free(slice_offsets);
2166 
2167  return 0;
2168 
2169 error:
2170  timestamp_queue_dequeue(ctx->timestamp_list);
2171 
2172 error2:
2173  av_free(slice_offsets);
2174 
2175  return res;
2176 }
2177 
2178 static int output_ready(AVCodecContext *avctx, int flush)
2179 {
2180  NvencContext *ctx = avctx->priv_data;
2181  int nb_ready, nb_pending;
2182 
2183  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2184  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2185  if (flush)
2186  return nb_ready > 0;
2187  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2188 }
2189 
2190 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2191 {
2192  NvencContext *ctx = avctx->priv_data;
2193  int sei_count = 0;
2194  int i, res;
2195 
2196  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2197  void *a53_data = NULL;
2198  size_t a53_size = 0;
2199 
2200  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2201  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2202  }
2203 
2204  if (a53_data) {
2205  void *tmp = av_fast_realloc(ctx->sei_data,
2206  &ctx->sei_data_size,
2207  (sei_count + 1) * sizeof(*ctx->sei_data));
2208  if (!tmp) {
2209  av_free(a53_data);
2210  res = AVERROR(ENOMEM);
2211  goto error;
2212  } else {
2213  ctx->sei_data = tmp;
2214  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2215  ctx->sei_data[sei_count].payloadType = 4;
2216  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2217  sei_count++;
2218  }
2219  }
2220  }
2221 
2222  if (ctx->s12m_tc && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2223  void *tc_data = NULL;
2224  size_t tc_size = 0;
2225 
2226  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2227  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2228  }
2229 
2230  if (tc_data) {
2231  void *tmp = av_fast_realloc(ctx->sei_data,
2232  &ctx->sei_data_size,
2233  (sei_count + 1) * sizeof(*ctx->sei_data));
2234  if (!tmp) {
2235  av_free(tc_data);
2236  res = AVERROR(ENOMEM);
2237  goto error;
2238  } else {
2239  ctx->sei_data = tmp;
2240  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2241  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2242  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2243  sei_count++;
2244  }
2245  }
2246  }
2247 
2248  if (!ctx->udu_sei)
2249  return sei_count;
2250 
2251  for (i = 0; i < frame->nb_side_data; i++) {
2252  AVFrameSideData *side_data = frame->side_data[i];
2253  void *tmp;
2254 
2255  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2256  continue;
2257 
2258  tmp = av_fast_realloc(ctx->sei_data,
2259  &ctx->sei_data_size,
2260  (sei_count + 1) * sizeof(*ctx->sei_data));
2261  if (!tmp) {
2262  res = AVERROR(ENOMEM);
2263  goto error;
2264  } else {
2265  ctx->sei_data = tmp;
2266  ctx->sei_data[sei_count].payloadSize = side_data->size;
2267  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2268  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2269 
2270  if (!ctx->sei_data[sei_count].payload) {
2271  res = AVERROR(ENOMEM);
2272  goto error;
2273  }
2274 
2275  sei_count++;
2276  }
2277  }
2278 
2279  return sei_count;
2280 
2281 error:
2282  for (i = 0; i < sei_count; i++)
2283  av_freep(&(ctx->sei_data[i].payload));
2284 
2285  return res;
2286 }
2287 
2288 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2289 {
2290  NvencContext *ctx = avctx->priv_data;
2291  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2292  NVENCSTATUS ret;
2293 
2294  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2295  int needs_reconfig = 0;
2296  int needs_encode_config = 0;
2297  int reconfig_bitrate = 0, reconfig_dar = 0;
2298  int dw, dh;
2299 
2300  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2301  params.reInitEncodeParams = ctx->init_encode_params;
2302 
2303  compute_dar(avctx, &dw, &dh);
2304  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2305  av_log(avctx, AV_LOG_VERBOSE,
2306  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2307  ctx->init_encode_params.darWidth,
2308  ctx->init_encode_params.darHeight, dw, dh);
2309 
2310  params.reInitEncodeParams.darHeight = dh;
2311  params.reInitEncodeParams.darWidth = dw;
2312 
2313  needs_reconfig = 1;
2314  reconfig_dar = 1;
2315  }
2316 
2317  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2318  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2319  av_log(avctx, AV_LOG_VERBOSE,
2320  "avg bitrate change: %d -> %d\n",
2321  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2322  (uint32_t)avctx->bit_rate);
2323 
2324  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2325  reconfig_bitrate = 1;
2326  }
2327 
2328  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2329  av_log(avctx, AV_LOG_VERBOSE,
2330  "max bitrate change: %d -> %d\n",
2331  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2332  (uint32_t)avctx->rc_max_rate);
2333 
2334  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2335  reconfig_bitrate = 1;
2336  }
2337 
2338  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2339  av_log(avctx, AV_LOG_VERBOSE,
2340  "vbv buffer size change: %d -> %d\n",
2341  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2342  avctx->rc_buffer_size);
2343 
2344  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2345  reconfig_bitrate = 1;
2346  }
2347 
2348  if (reconfig_bitrate) {
2349  params.resetEncoder = 1;
2350  params.forceIDR = 1;
2351 
2352  needs_encode_config = 1;
2353  needs_reconfig = 1;
2354  }
2355  }
2356 
2357  if (!needs_encode_config)
2358  params.reInitEncodeParams.encodeConfig = NULL;
2359 
2360  if (needs_reconfig) {
2361  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2362  if (ret != NV_ENC_SUCCESS) {
2363  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2364  } else {
2365  if (reconfig_dar) {
2366  ctx->init_encode_params.darHeight = dh;
2367  ctx->init_encode_params.darWidth = dw;
2368  }
2369 
2370  if (reconfig_bitrate) {
2371  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2372  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2373  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2374  }
2375 
2376  }
2377  }
2378 }
2379 
2380 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2381 {
2382  NVENCSTATUS nv_status;
2383  NvencSurface *tmp_out_surf, *in_surf;
2384  int res, res2;
2385  int sei_count = 0;
2386  int i;
2387 
2388  NvencContext *ctx = avctx->priv_data;
2389  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2390  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2391 
2392  NV_ENC_PIC_PARAMS pic_params = { 0 };
2393  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2394 
2395  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2396  return AVERROR(EINVAL);
2397 
2398  if (frame && frame->buf[0]) {
2399  in_surf = get_free_frame(ctx);
2400  if (!in_surf)
2401  return AVERROR(EAGAIN);
2402 
2403  res = nvenc_push_context(avctx);
2404  if (res < 0)
2405  return res;
2406 
2407  reconfig_encoder(avctx, frame);
2408 
2409  res = nvenc_upload_frame(avctx, frame, in_surf);
2410 
2411  res2 = nvenc_pop_context(avctx);
2412  if (res2 < 0)
2413  return res2;
2414 
2415  if (res)
2416  return res;
2417 
2418  pic_params.inputBuffer = in_surf->input_surface;
2419  pic_params.bufferFmt = in_surf->format;
2420  pic_params.inputWidth = in_surf->width;
2421  pic_params.inputHeight = in_surf->height;
2422  pic_params.inputPitch = in_surf->pitch;
2423  pic_params.outputBitstream = in_surf->output_surface;
2424 
2425  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2426  if (frame->top_field_first)
2427  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2428  else
2429  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2430  } else {
2431  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2432  }
2433 
2434  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2435  pic_params.encodePicFlags =
2436  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2437  } else {
2438  pic_params.encodePicFlags = 0;
2439  }
2440 
2441  pic_params.inputTimeStamp = frame->pts;
2442 
2443  if (ctx->extra_sei) {
2444  res = prepare_sei_data_array(avctx, frame);
2445  if (res < 0)
2446  return res;
2447  sei_count = res;
2448  }
2449 
2450  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2451  } else {
2452  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2453  }
2454 
2455  res = nvenc_push_context(avctx);
2456  if (res < 0)
2457  return res;
2458 
2459  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2460 
2461  for (i = 0; i < sei_count; i++)
2462  av_freep(&(ctx->sei_data[i].payload));
2463 
2464  res = nvenc_pop_context(avctx);
2465  if (res < 0)
2466  return res;
2467 
2468  if (nv_status != NV_ENC_SUCCESS &&
2469  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2470  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2471 
2472  if (frame && frame->buf[0]) {
2473  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
2474  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2475  }
2476 
2477  /* all the pending buffers are now ready for output */
2478  if (nv_status == NV_ENC_SUCCESS) {
2479  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
2480  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2481  }
2482 
2483  return 0;
2484 }
2485 
2486 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
2487 {
2488  NvencSurface *tmp_out_surf;
2489  int res, res2;
2490 
2491  NvencContext *ctx = avctx->priv_data;
2492 
2493  AVFrame *frame = ctx->frame;
2494 
2495  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2496  return AVERROR(EINVAL);
2497 
2498  if (!frame->buf[0]) {
2499  res = ff_encode_get_frame(avctx, frame);
2500  if (res < 0 && res != AVERROR_EOF)
2501  return res;
2502  }
2503 
2504  res = nvenc_send_frame(avctx, frame);
2505  if (res < 0) {
2506  if (res != AVERROR(EAGAIN))
2507  return res;
2508  } else
2509  av_frame_unref(frame);
2510 
2511  if (output_ready(avctx, avctx->internal->draining)) {
2512  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2513 
2514  res = nvenc_push_context(avctx);
2515  if (res < 0)
2516  return res;
2517 
2518  res = process_output_surface(avctx, pkt, tmp_out_surf);
2519 
2520  res2 = nvenc_pop_context(avctx);
2521  if (res2 < 0)
2522  return res2;
2523 
2524  if (res)
2525  return res;
2526 
2527  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
2528  } else if (avctx->internal->draining) {
2529  return AVERROR_EOF;
2530  } else {
2531  return AVERROR(EAGAIN);
2532  }
2533 
2534  return 0;
2535 }
2536 
2537 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
2538 {
2539  NvencContext *ctx = avctx->priv_data;
2540 
2541  nvenc_send_frame(avctx, NULL);
2542  av_fifo_reset2(ctx->timestamp_list);
2543 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:31
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1647
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:164
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:225
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:160
level
uint8_t level
Definition: svq3.c:206
av_clip
#define av_clip
Definition: common.h:95
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:975
P3
#define P3
Definition: hevcdsp_template.c:1497
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:691
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:383
GUIDTuple
Definition: nvenc.c:159
NONE
@ NONE
Definition: af_afade.c:56
GUIDTuple::flags
int flags
Definition: nvenc.c:161
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:2675
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:602
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1595
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:323
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2178
NvencContext
Definition: nvenc.h:153
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:150
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:135
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:83
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:116
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:325
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:968
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2043
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:601
P1
#define P1
Definition: cavsdsp.c:39
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:374
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:686
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1607
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:136
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:134
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2288
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:528
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:46
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:760
NvencSurface
Definition: nvenc.h:80
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:139
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1028
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1194
nverr
NVENCSTATUS nverr
Definition: nvenc.c:92
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:855
PRESET
#define PRESET(name,...)
Definition: nvenc.c:167
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:429
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2537
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:30
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:284
nvenc.h
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:312
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1341
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:1741
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:533
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1934
nvenc_errors
static const struct @108 nvenc_errors[]
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:99
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:703
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:793
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:124
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:407
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:408
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:179
fail
#define fail()
Definition: checkasm.h:131
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:145
dummy
int dummy
Definition: motion.c:65
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:90
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:947
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:169
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:478
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1599
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1816
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:88
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:223
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:276
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:425
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:104
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:961
pkt
AVPacket * pkt
Definition: movenc.c:59
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:234
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:142
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1644
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:500
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:130
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:694
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1758
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:505
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:464
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:421
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1331
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:386
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:530
NvencDynLoadFunctions
Definition: nvenc.h:93
ctx
AVFormatContext * ctx
Definition: movenc.c:48
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:149
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demuxing_decoding.c:41
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1646
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2029
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1223
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2034
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:96
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:104
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:77
NvencSurface::pitch
int pitch
Definition: nvenc.h:87
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:82
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1208
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:41
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:427
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:78
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:939
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
flush
static void flush(AVCodecContext *avctx)
Definition: aacdec_template.c:606
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:84
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:982
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:433
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:448
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1679
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1645
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:95
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1092
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
convert_header.major
int major
Definition: convert_header.py:23
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:521
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:462
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:94
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:334
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:94
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:593
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:353
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:372
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:68
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:1068
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1549
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:143
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:233
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:574
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:141
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1880
AVCodecHWConfigInternal
Definition: hwconfig.h:29
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2486
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:373
height
#define height
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:381
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:869
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:380
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:305
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:119
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1805
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:679
AVCodec::id
enum AVCodecID id
Definition: codec.h:218
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:346
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:97
convert_header.minor
int minor
Definition: convert_header.py:26
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:269
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:367
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:499
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2057
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:279
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:900
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:109
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:224
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2190
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:487
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:461
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:264
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1939
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:83
P2
#define P2
Definition: cavsdsp.c:38
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:42
AVCodecContext::height
int height
Definition: avcodec.h:571
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:608
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:39
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1518
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:272
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:458
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1889
NvencSurface::width
int width
Definition: nvenc.h:85
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1355
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:93
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:385
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:125
cuda_check.h
atsc_a53.h
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:1996
AVCodecContext
main external API structure.
Definition: avcodec.h:398
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:79
NvencSurface::height
int height
Definition: nvenc.h:86
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1187
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1556
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1605
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:710
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:232
AV_CODEC_ID_H265
#define AV_CODEC_ID_H265
Definition: codec_id.h:225
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:89
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1846
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1597
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:457
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:137
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:158
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:98
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:670
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:160
packet_internal.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:231
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
av_free
#define av_free(p)
Definition: tableprint_vlc.h:33
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:998
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: packet.h:351
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:425
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:34
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:649
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:140
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:571
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1328
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int
int
Definition: ffmpeg_filter.c:155
hevc_sei.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:768
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1213
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2380
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2595
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