FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 
47 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48 
49 #define NVENC_CAP 0x30
50 
51 #ifndef NVENC_NO_DEPRECATED_RC
52 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
53  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
54  rc == NV_ENC_PARAMS_RC_CBR_HQ)
55 #else
56 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
57 #endif
58 
64  AV_PIX_FMT_P016, // Truncated to 10bits
65 #ifdef NVENC_HAVE_422_SUPPORT
69 #endif
71  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
80  AV_PIX_FMT_GBRP16, // Truncated to 10bits
82 #if CONFIG_D3D11VA
84 #endif
86 };
87 
89  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
91 #if CONFIG_D3D11VA
92  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
94 #endif
95  NULL,
96 };
97 
98 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
99  pix_fmt == AV_PIX_FMT_P016 || \
100  pix_fmt == AV_PIX_FMT_P210 || \
101  pix_fmt == AV_PIX_FMT_P216 || \
102  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_X2RGB10 || \
105  pix_fmt == AV_PIX_FMT_X2BGR10 || \
106  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
107  pix_fmt == AV_PIX_FMT_GBRP16)
108 
109 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
110  pix_fmt == AV_PIX_FMT_RGB32 || \
111  pix_fmt == AV_PIX_FMT_0BGR32 || \
112  pix_fmt == AV_PIX_FMT_BGR32 || \
113  pix_fmt == AV_PIX_FMT_X2RGB10 || \
114  pix_fmt == AV_PIX_FMT_X2BGR10)
115 
116 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
117  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
118  pix_fmt == AV_PIX_FMT_YUV444P16 || \
119  pix_fmt == AV_PIX_FMT_GBRP || \
120  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
121  pix_fmt == AV_PIX_FMT_GBRP16 || \
122  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
123 
124 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
125  pix_fmt == AV_PIX_FMT_P210 || \
126  pix_fmt == AV_PIX_FMT_P216)
127 
128 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
129  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
130  pix_fmt == AV_PIX_FMT_GBRP16)
131 
132 static const struct {
133  NVENCSTATUS nverr;
134  int averr;
135  const char *desc;
136 } nvenc_errors[] = {
137  { NV_ENC_SUCCESS, 0, "success" },
138  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
139  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
140  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
141  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
142  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
143  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
144  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
145  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
146  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
147  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
148  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
149  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
150  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
151  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
152  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
153  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
154  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
155  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
156  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
157  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
158  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
159  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
160  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
161  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
162  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
163 };
164 
165 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
166 {
167  int i;
168  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
169  if (nvenc_errors[i].nverr == err) {
170  if (desc)
171  *desc = nvenc_errors[i].desc;
172  return nvenc_errors[i].averr;
173  }
174  }
175  if (desc)
176  *desc = "unknown error";
177  return AVERROR_UNKNOWN;
178 }
179 
180 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
181  const char *error_string)
182 {
183  const char *desc;
184  const char *details = "(no details)";
185  int ret = nvenc_map_error(err, &desc);
186 
187 #ifdef NVENC_HAVE_GETLASTERRORSTRING
188  NvencContext *ctx = avctx->priv_data;
189  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
190 
191  if (p_nvenc && ctx->nvencoder)
192  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
193 #endif
194 
195  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
196 
197  return ret;
198 }
199 
200 typedef struct GUIDTuple {
201  const GUID guid;
202  int flags;
203 } GUIDTuple;
204 
205 #define PRESET_ALIAS(alias, name, ...) \
206  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
207 
208 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
209 
211 {
212  GUIDTuple presets[] = {
213 #ifdef NVENC_HAVE_NEW_PRESETS
214  PRESET(P1),
215  PRESET(P2),
216  PRESET(P3),
217  PRESET(P4),
218  PRESET(P5),
219  PRESET(P6),
220  PRESET(P7),
222  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
224  // Compat aliases
229  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
234 #else
235  PRESET(DEFAULT),
236  PRESET(HP),
237  PRESET(HQ),
238  PRESET(BD),
239  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
240  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
242  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
243  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
244  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
245  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
246  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
247 #endif
248  };
249 
250  GUIDTuple *t = &presets[ctx->preset];
251 
252  ctx->init_encode_params.presetGUID = t->guid;
253  ctx->flags = t->flags;
254 
255 #ifdef NVENC_HAVE_NEW_PRESETS
256  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
258 #endif
259 }
260 
261 #undef PRESET
262 #undef PRESET_ALIAS
263 
265 {
266 #if NVENCAPI_CHECK_VERSION(13, 2)
267  const char *minver = "(unknown)";
268 #elif NVENCAPI_CHECK_VERSION(13, 1)
269  const char *minver = "610.00";
270 #elif NVENCAPI_CHECK_VERSION(13, 0)
271  const char *minver = "570.0";
272 #elif NVENCAPI_CHECK_VERSION(12, 2)
273 # if defined(_WIN32) || defined(__CYGWIN__)
274  const char *minver = "551.76";
275 # else
276  const char *minver = "550.54.14";
277 # endif
278 #elif NVENCAPI_CHECK_VERSION(12, 1)
279 # if defined(_WIN32) || defined(__CYGWIN__)
280  const char *minver = "531.61";
281 # else
282  const char *minver = "530.41.03";
283 # endif
284 #elif NVENCAPI_CHECK_VERSION(12, 0)
285 # if defined(_WIN32) || defined(__CYGWIN__)
286  const char *minver = "522.25";
287 # else
288  const char *minver = "520.56.06";
289 # endif
290 #elif NVENCAPI_CHECK_VERSION(11, 1)
291 # if defined(_WIN32) || defined(__CYGWIN__)
292  const char *minver = "471.41";
293 # else
294  const char *minver = "470.57.02";
295 # endif
296 #elif NVENCAPI_CHECK_VERSION(11, 0)
297 # if defined(_WIN32) || defined(__CYGWIN__)
298  const char *minver = "456.71";
299 # else
300  const char *minver = "455.28";
301 # endif
302 #elif NVENCAPI_CHECK_VERSION(10, 0)
303 # if defined(_WIN32) || defined(__CYGWIN__)
304  const char *minver = "450.51";
305 # else
306  const char *minver = "445.87";
307 # endif
308 #elif NVENCAPI_CHECK_VERSION(9, 1)
309 # if defined(_WIN32) || defined(__CYGWIN__)
310  const char *minver = "436.15";
311 # else
312  const char *minver = "435.21";
313 # endif
314 #elif NVENCAPI_CHECK_VERSION(9, 0)
315 # if defined(_WIN32) || defined(__CYGWIN__)
316  const char *minver = "418.81";
317 # else
318  const char *minver = "418.30";
319 # endif
320 #elif NVENCAPI_CHECK_VERSION(8, 2)
321 # if defined(_WIN32) || defined(__CYGWIN__)
322  const char *minver = "397.93";
323 # else
324  const char *minver = "396.24";
325 #endif
326 #elif NVENCAPI_CHECK_VERSION(8, 1)
327 # if defined(_WIN32) || defined(__CYGWIN__)
328  const char *minver = "390.77";
329 # else
330  const char *minver = "390.25";
331 # endif
332 #else
333 # if defined(_WIN32) || defined(__CYGWIN__)
334  const char *minver = "378.66";
335 # else
336  const char *minver = "378.13";
337 # endif
338 #endif
339  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
340 }
341 
342 #if NVENCAPI_CHECK_VERSION(12, 0)
343 #define to_nv_color_matrix(n) (NV_ENC_VUI_MATRIX_COEFFS)(n)
344 #define to_nv_color_pri(n) (NV_ENC_VUI_COLOR_PRIMARIES)(n)
345 #define to_nv_color_trc(n) (NV_ENC_VUI_TRANSFER_CHARACTERISTIC)(n)
346 #else
347 #define to_nv_color_matrix(n) (uint32_t)(n)
348 #define to_nv_color_pri(n) (uint32_t)(n)
349 #define to_nv_color_trc(n) (uint32_t)(n)
350 #endif
351 
353 {
354  NvencContext *ctx = avctx->priv_data;
355  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
356  NVENCSTATUS err;
357  uint32_t nvenc_max_ver;
358  int ret;
359 
360  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
361  if (ret < 0)
362  return ret;
363 
364  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
365  if (ret < 0) {
367  return ret;
368  }
369 
370  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
371  if (err != NV_ENC_SUCCESS)
372  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
373 
374  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
375 
376  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
377  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
378  "Required: %d.%d Found: %d.%d\n",
379  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
380  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
382  return AVERROR(ENOSYS);
383  }
384 
385  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
386 
387  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
388  if (err != NV_ENC_SUCCESS)
389  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
390 
391  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
392 
393  return 0;
394 }
395 
397 {
398  NvencContext *ctx = avctx->priv_data;
399  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
400 
401  if (ctx->d3d11_device)
402  return 0;
403 
404  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
405 }
406 
408 {
409  NvencContext *ctx = avctx->priv_data;
410  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
411  CUcontext dummy;
412 
413  if (ctx->d3d11_device)
414  return 0;
415 
416  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
417 }
418 
420 {
421  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
422  NvencContext *ctx = avctx->priv_data;
423  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
424  NVENCSTATUS ret;
425 
426  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
427  params.apiVersion = NVENCAPI_VERSION;
428  if (ctx->d3d11_device) {
429  params.device = ctx->d3d11_device;
430  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
431  } else {
432  params.device = ctx->cu_context;
433  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
434  }
435 
436  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
437  if (ret != NV_ENC_SUCCESS) {
438  ctx->nvencoder = NULL;
439  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
440  }
441 
442  return 0;
443 }
444 
446 {
447  NvencContext *ctx = avctx->priv_data;
448  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
449  int i, ret, count = 0;
450  GUID *guids = NULL;
451 
452  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
453 
454  if (ret != NV_ENC_SUCCESS || !count)
455  return AVERROR(ENOSYS);
456 
457  guids = av_malloc(count * sizeof(GUID));
458  if (!guids)
459  return AVERROR(ENOMEM);
460 
461  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
462  if (ret != NV_ENC_SUCCESS) {
463  ret = AVERROR(ENOSYS);
464  goto fail;
465  }
466 
467  ret = AVERROR(ENOSYS);
468  for (i = 0; i < count; i++) {
469  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
470  ret = 0;
471  break;
472  }
473  }
474 
475 fail:
476  av_free(guids);
477 
478  return ret;
479 }
480 
481 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
482 {
483  NvencContext *ctx = avctx->priv_data;
484  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
485  NV_ENC_CAPS_PARAM params = { 0 };
486  int ret, val = 0;
487 
488  params.version = NV_ENC_CAPS_PARAM_VER;
489  params.capsToQuery = cap;
490 
491  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
492 
493  if (ret == NV_ENC_SUCCESS)
494  return val;
495  return 0;
496 }
497 
499 {
500  NvencContext *ctx = avctx->priv_data;
501  int tmp, ret;
502 
504  if (ret < 0) {
505  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
506  return ret;
507  }
508 
509  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
510  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
511  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
512  return AVERROR(ENOSYS);
513  }
514 
515 #ifdef NVENC_HAVE_422_SUPPORT
516  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
517 #else
518  ret = 0;
519 #endif
520  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
521  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
522  return AVERROR(ENOSYS);
523  }
524 
525  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
526  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
527  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
528  return AVERROR(ENOSYS);
529  }
530 
531  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
532  if (ret < avctx->width) {
533  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
534  avctx->width, ret);
535  return AVERROR(ENOSYS);
536  }
537 
538  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
539  if (ret < avctx->height) {
540  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
541  avctx->height, ret);
542  return AVERROR(ENOSYS);
543  }
544 
545  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
546  if (ret < avctx->max_b_frames) {
547  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
548  avctx->max_b_frames, ret);
549 
550  return AVERROR(ENOSYS);
551  }
552 
553  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
554  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
555  av_log(avctx, AV_LOG_WARNING,
556  "Interlaced encoding is not supported. Supported level: %d\n",
557  ret);
558  return AVERROR(ENOSYS);
559  }
560 
561  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
562  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
563  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
564  return AVERROR(ENOSYS);
565  }
566 
567  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
568  if (ctx->rc_lookahead > 0 && ret <= 0) {
569  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
570  return AVERROR(ENOSYS);
571  }
572 
573  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
574  if (ctx->temporal_aq > 0 && ret <= 0) {
575  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
576  return AVERROR(ENOSYS);
577  }
578 
579  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
580  if (ctx->weighted_pred > 0 && ret <= 0) {
581  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
582  return AVERROR(ENOSYS);
583  }
584 
585  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
586  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
587  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
588  return AVERROR(ENOSYS);
589  }
590 
591 #ifdef NVENC_HAVE_BFRAME_REF_MODE
592  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
593  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
594  switch (tmp) {
595  case NV_ENC_BFRAME_REF_MODE_DISABLED:
596  break;
597  case NV_ENC_BFRAME_REF_MODE_EACH:
598  if (!(ret & 1)) {
599  av_log(avctx, AV_LOG_WARNING, "Each B frame reference mode is not supported\n");
600  return AVERROR(ENOSYS);
601  }
602  break;
603  case NV_ENC_BFRAME_REF_MODE_MIDDLE:
604  if (!(ret & 2)) {
605  av_log(avctx, AV_LOG_WARNING, "Middle B frame reference mode is not supported\n");
606  return AVERROR(ENOSYS);
607  }
608  break;
609 #ifdef NVENC_HAVE_AV1_HGOP_SUPPORT
610  case NV_ENC_BFRAME_REF_MODE_HIERARCHICAL:
611  if (!(ret & 4)) {
612  av_log(avctx, AV_LOG_WARNING, "Hierarchical B frame reference mode is not supported\n");
613  return AVERROR(ENOSYS);
614  }
615  break;
616 #endif
617  default:
618  av_log(avctx, AV_LOG_ERROR, "Invalid b_ref_mode value %d\n", tmp);
619  return AVERROR(EINVAL);
620  }
621 #else
622  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
623  if (tmp > 0) {
624  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
625  return AVERROR(ENOSYS);
626  }
627 #endif
628 
629 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
630  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
631  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
632  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
633  return AVERROR(ENOSYS);
634  }
635 #else
636  if(avctx->refs != 0) {
637  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
638  return AVERROR(ENOSYS);
639  }
640 #endif
641 
642 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
643  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
644  if(ctx->single_slice_intra_refresh && ret <= 0) {
645  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
646  return AVERROR(ENOSYS);
647  }
648 #else
649  if(ctx->single_slice_intra_refresh) {
650  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
651  return AVERROR(ENOSYS);
652  }
653 #endif
654 
655  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
656  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
657  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
658  return AVERROR(ENOSYS);
659  }
660 
661 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
662  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
663  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
664  return AVERROR(ENOSYS);
665  }
666 #endif
667 
668  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
669  if(ctx->constrained_encoding && ret <= 0) {
670  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
671  return AVERROR(ENOSYS);
672  }
673 
674 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
675  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
676  if(ctx->tf_level > 0 && ret <= 0) {
677  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
678  return AVERROR(ENOSYS);
679  }
680 #endif
681 
682 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
683  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
684  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
685  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
686  ctx->lookahead_level > ret)
687  {
688  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
689  return AVERROR(ENOSYS);
690  }
691 #endif
692 
693 #ifdef NVENC_HAVE_UNIDIR_B
694  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
695  if(ctx->unidir_b && ret <= 0) {
696  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
697  return AVERROR(ENOSYS);
698  }
699 #endif
700 
701  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
702 
703 #ifdef NVENC_HAVE_MVHEVC
704  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
705  if (avctx->codec_id == AV_CODEC_ID_HEVC &&
706  ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN &&
707  !ctx->multiview_supported) {
708  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
709  return AVERROR(ENOSYS);
710  }
711 #endif
712 
713  return 0;
714 }
715 
716 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
717 {
718  NvencContext *ctx = avctx->priv_data;
719  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
720  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
721  char name[128] = { 0};
722  int major, minor, ret;
723  CUdevice cu_device;
724  int loglevel = AV_LOG_VERBOSE;
725 
726  if (ctx->device == LIST_DEVICES)
727  loglevel = AV_LOG_INFO;
728 
729  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
730  if (ret < 0)
731  return ret;
732 
733  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
734  if (ret < 0)
735  return ret;
736 
737  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
738  if (ret < 0)
739  return ret;
740 
741  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
742  if (((major << 4) | minor) < NVENC_CAP) {
743  av_log(avctx, loglevel, "does not support NVENC\n");
744  goto fail;
745  }
746 
747  if (ctx->device != idx && ctx->device != ANY_DEVICE)
748  return -1;
749 
750  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
751  if (ret < 0)
752  goto fail;
753 
754  ctx->cu_context = ctx->cu_context_internal;
755  ctx->cu_stream = NULL;
756 
757  if ((ret = nvenc_pop_context(avctx)) < 0)
758  goto fail2;
759 
760  if ((ret = nvenc_open_session(avctx)) < 0)
761  goto fail2;
762 
763  if ((ret = nvenc_check_capabilities(avctx)) < 0)
764  goto fail3;
765 
766  av_log(avctx, loglevel, "supports NVENC\n");
767 
768  dl_fn->nvenc_device_count++;
769 
770  if (ctx->device == idx || ctx->device == ANY_DEVICE)
771  return 0;
772 
773 fail3:
774  if ((ret = nvenc_push_context(avctx)) < 0)
775  return ret;
776 
777  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
778  ctx->nvencoder = NULL;
779 
780  if ((ret = nvenc_pop_context(avctx)) < 0)
781  return ret;
782 
783 fail2:
784  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
785  ctx->cu_context_internal = NULL;
786 
787 fail:
788  return AVERROR(ENOSYS);
789 }
790 
792 {
793  NvencContext *ctx = avctx->priv_data;
794  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
795 
796  switch (avctx->codec->id) {
797  case AV_CODEC_ID_H264:
798  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
799  break;
800  case AV_CODEC_ID_HEVC:
801  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
802  break;
803 #if CONFIG_AV1_NVENC_ENCODER
804  case AV_CODEC_ID_AV1:
805  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
806  break;
807 #endif
808  default:
809  return AVERROR_BUG;
810  }
811 
813 
815  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
816 
817  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
818  AVHWFramesContext *frames_ctx;
819  AVHWDeviceContext *hwdev_ctx;
820  AVCUDADeviceContext *cuda_device_hwctx = NULL;
821 #if CONFIG_D3D11VA
822  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
823 #endif
824  int ret;
825 
826  if (avctx->hw_frames_ctx) {
827  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
828  if (frames_ctx->format == AV_PIX_FMT_CUDA)
829  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
830 #if CONFIG_D3D11VA
831  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
832  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
833 #endif
834  else
835  return AVERROR(EINVAL);
836  } else if (avctx->hw_device_ctx) {
837  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
838  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
839  cuda_device_hwctx = hwdev_ctx->hwctx;
840 #if CONFIG_D3D11VA
841  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
842  d3d11_device_hwctx = hwdev_ctx->hwctx;
843 #endif
844  else
845  return AVERROR(EINVAL);
846  } else {
847  return AVERROR(EINVAL);
848  }
849 
850  if (cuda_device_hwctx) {
851  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
852  ctx->cu_stream = cuda_device_hwctx->stream;
853  }
854 #if CONFIG_D3D11VA
855  else if (d3d11_device_hwctx) {
856  ctx->d3d11_device = d3d11_device_hwctx->device;
857  ID3D11Device_AddRef(ctx->d3d11_device);
858  }
859 #endif
860 
861  ret = nvenc_open_session(avctx);
862  if (ret < 0)
863  return ret;
864 
865  ret = nvenc_check_capabilities(avctx);
866  if (ret < 0) {
867  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
868  return ret;
869  }
870  } else {
871  int i, nb_devices = 0;
872 
873  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
874  return AVERROR_UNKNOWN;
875 
876  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
877  return AVERROR_UNKNOWN;
878 
879  if (!nb_devices) {
880  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
881  return AVERROR_EXTERNAL;
882  }
883 
884  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
885 
886  dl_fn->nvenc_device_count = 0;
887  for (i = 0; i < nb_devices; ++i) {
888  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
889  return 0;
890  }
891 
892  if (ctx->device == LIST_DEVICES)
893  return AVERROR_EXIT;
894 
895  if (!dl_fn->nvenc_device_count) {
896  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
897  return AVERROR_EXTERNAL;
898  }
899 
900  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
901  return AVERROR(EINVAL);
902  }
903 
904  return 0;
905 }
906 
907 static av_cold void set_constqp(AVCodecContext *avctx)
908 {
909  NvencContext *ctx = avctx->priv_data;
910  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
911 #if CONFIG_AV1_NVENC_ENCODER
912  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
913 #else
914  int qmax = 51;
915 #endif
916 
917  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
918 
919  if (ctx->init_qp_p >= 0) {
920  rc->constQP.qpInterP = ctx->init_qp_p;
921  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
922  rc->constQP.qpIntra = ctx->init_qp_i;
923  rc->constQP.qpInterB = ctx->init_qp_b;
924  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
925  rc->constQP.qpIntra = av_clip(
926  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
927  rc->constQP.qpInterB = av_clip(
928  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
929  } else {
930  rc->constQP.qpIntra = rc->constQP.qpInterP;
931  rc->constQP.qpInterB = rc->constQP.qpInterP;
932  }
933  } else if (ctx->cqp >= 0) {
934  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
935  if (avctx->b_quant_factor != 0.0)
936  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
937  if (avctx->i_quant_factor != 0.0)
938  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
939  }
940 
941  avctx->qmin = ctx->qmin = -1;
942  avctx->qmax = ctx->qmax = -1;
943 }
944 
945 static av_cold void set_vbr(AVCodecContext *avctx)
946 {
947  NvencContext *ctx = avctx->priv_data;
948  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
949  int qp_inter_p;
950 #if CONFIG_AV1_NVENC_ENCODER
951  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
952 #else
953  int qmax = 51;
954 #endif
955 
956  if (avctx->qmin >= 0 || avctx->qmax >= 0)
957  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
958 
959  if (avctx->qmin >= 0 && ctx->qmin < 0)
960  ctx->qmin = avctx->qmin;
961  if (avctx->qmax >= 0 && ctx->qmax < 0)
962  ctx->qmax = avctx->qmax;
963  avctx->qmin = ctx->qmin;
964  avctx->qmax = ctx->qmax;
965 
966  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
967  rc->enableMinQP = 1;
968  rc->enableMaxQP = 1;
969 
970  rc->minQP.qpInterB = ctx->qmin;
971  rc->minQP.qpInterP = ctx->qmin;
972  rc->minQP.qpIntra = ctx->qmin;
973 
974  rc->maxQP.qpInterB = ctx->qmax;
975  rc->maxQP.qpInterP = ctx->qmax;
976  rc->maxQP.qpIntra = ctx->qmax;
977 
978  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
979  } else if (ctx->qmin >= 0) {
980  rc->enableMinQP = 1;
981 
982  rc->minQP.qpInterB = ctx->qmin;
983  rc->minQP.qpInterP = ctx->qmin;
984  rc->minQP.qpIntra = ctx->qmin;
985 
986  qp_inter_p = ctx->qmin;
987  } else {
988  qp_inter_p = 26; // default to 26
989  }
990 
991  rc->enableInitialRCQP = 1;
992 
993  if (ctx->init_qp_p < 0) {
994  rc->initialRCQP.qpInterP = qp_inter_p;
995  } else {
996  rc->initialRCQP.qpInterP = ctx->init_qp_p;
997  }
998 
999  if (ctx->init_qp_i < 0) {
1000  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
1001  rc->initialRCQP.qpIntra = av_clip(
1002  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
1003  } else {
1004  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
1005  }
1006  } else {
1007  rc->initialRCQP.qpIntra = ctx->init_qp_i;
1008  }
1009 
1010  if (ctx->init_qp_b < 0) {
1011  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
1012  rc->initialRCQP.qpInterB = av_clip(
1013  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
1014  } else {
1015  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
1016  }
1017  } else {
1018  rc->initialRCQP.qpInterB = ctx->init_qp_b;
1019  }
1020 }
1021 
1023 {
1024  NvencContext *ctx = avctx->priv_data;
1025  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1026 
1027  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
1028  rc->constQP.qpInterB = 0;
1029  rc->constQP.qpInterP = 0;
1030  rc->constQP.qpIntra = 0;
1031 
1032  avctx->qmin = ctx->qmin = -1;
1033  avctx->qmax = ctx->qmax = -1;
1034 }
1035 
1037 {
1038  NvencContext *ctx = avctx->priv_data;
1039  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1040 
1041  switch (ctx->rc) {
1042  case NV_ENC_PARAMS_RC_CONSTQP:
1043  set_constqp(avctx);
1044  return;
1045 #ifndef NVENC_NO_DEPRECATED_RC
1046  case NV_ENC_PARAMS_RC_VBR_MINQP:
1047  if (avctx->qmin < 0 && ctx->qmin < 0) {
1048  av_log(avctx, AV_LOG_WARNING,
1049  "The variable bitrate rate-control requires "
1050  "the 'qmin' option set.\n");
1051  set_vbr(avctx);
1052  return;
1053  }
1054  /* fall through */
1055  case NV_ENC_PARAMS_RC_VBR_HQ:
1056 #endif
1057  case NV_ENC_PARAMS_RC_VBR:
1058  set_vbr(avctx);
1059  break;
1060  case NV_ENC_PARAMS_RC_CBR:
1061 #ifndef NVENC_NO_DEPRECATED_RC
1062  case NV_ENC_PARAMS_RC_CBR_HQ:
1063  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1064 #endif
1065  break;
1066  }
1067 
1068  rc->rateControlMode = ctx->rc;
1069 }
1070 
1072 {
1073  NvencContext *ctx = avctx->priv_data;
1074  // default minimum of 4 surfaces
1075  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1076  // another multiply by 2 to avoid blocking next PBB group
1077  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1078 
1079  // lookahead enabled
1080  if (ctx->rc_lookahead > 0) {
1081  // +1 is to account for lkd_bound calculation later
1082  // +4 is to allow sufficient pipelining with lookahead
1083  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1084  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1085  {
1086  av_log(avctx, AV_LOG_WARNING,
1087  "Defined rc_lookahead requires more surfaces, "
1088  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1089  }
1090  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1091  } else {
1092  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1093  {
1094  av_log(avctx, AV_LOG_WARNING,
1095  "Defined b-frame requires more surfaces, "
1096  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1097  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1098  }
1099  else if (ctx->nb_surfaces <= 0)
1100  ctx->nb_surfaces = nb_surfaces;
1101  // otherwise use user specified value
1102  }
1103 
1104  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1105  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1106 
1107  // Output in the worst case will only start when the surface buffer is completely full.
1108  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1109  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1110 
1111  return 0;
1112 }
1113 
1115 {
1116  NvencContext *ctx = avctx->priv_data;
1117 
1118  if (avctx->global_quality > 0)
1119  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1120 
1121  if (ctx->cqp < 0 && avctx->global_quality > 0)
1122  ctx->cqp = avctx->global_quality;
1123 
1124  if (avctx->bit_rate > 0) {
1125  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1126  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1127  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1128  }
1129 
1130  if (avctx->rc_max_rate > 0)
1131  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1132 
1133 #ifdef NVENC_HAVE_MULTIPASS
1134  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1135 
1136  if (ctx->flags & NVENC_ONE_PASS)
1137  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1138  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1139  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1140 
1141  if (ctx->rc < 0) {
1142  if (ctx->cbr) {
1143  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1144  } else if (ctx->cqp >= 0) {
1145  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1146  } else if (ctx->quality >= 0.0f) {
1147  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1148  }
1149  }
1150 #else
1151  if (ctx->rc < 0) {
1152  if (ctx->flags & NVENC_ONE_PASS)
1153  ctx->twopass = 0;
1154  if (ctx->flags & NVENC_TWO_PASSES)
1155  ctx->twopass = 1;
1156 
1157  if (ctx->twopass < 0)
1158  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1159 
1160  if (ctx->cbr) {
1161  if (ctx->twopass) {
1162  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1163  } else {
1164  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1165  }
1166  } else if (ctx->cqp >= 0) {
1167  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1168  } else if (ctx->twopass) {
1169  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1170  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1171  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1172  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1173  }
1174  }
1175 #endif
1176 
1177  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1178  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1179  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1180 
1181  ctx->rc &= ~RC_MODE_DEPRECATED;
1182  }
1183 
1184 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1185  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1186  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1187 
1188  if (avctx->codec->id == AV_CODEC_ID_AV1 &&
1189  ctx->qp_cr_offset != ctx->qp_cb_offset)
1190  av_log(avctx, AV_LOG_WARNING,
1191  "av1_nvenc: qp_cr_offset is currently ignored by the NVENC driver "
1192  "(deltaQ_v_ac is forced equal to deltaQ_u_ac); only qp_cb_offset "
1193  "takes effect.\n");
1194 #else
1195  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1196  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1197 #endif
1198 
1199 #ifdef NVENC_HAVE_LDKFS
1200  if (ctx->ldkfs)
1201  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1202 #endif
1203 
1204  if (ctx->flags & NVENC_LOSSLESS) {
1205  set_lossless(avctx);
1206  } else if (ctx->rc >= 0) {
1208  } else {
1209  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1210  set_vbr(avctx);
1211  }
1212 
1213  if (avctx->rc_buffer_size > 0) {
1214  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1215  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1216  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1217  }
1218 
1219  if (ctx->aq) {
1220  ctx->encode_config.rcParams.enableAQ = 1;
1221  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1222  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1223  }
1224 
1225  if (ctx->temporal_aq) {
1226  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1227  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1228  }
1229 
1230  if (ctx->rc_lookahead > 0) {
1231  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1232  ctx->encode_config.frameIntervalP - 4;
1233 
1234  if (lkd_bound < 0) {
1235  ctx->encode_config.rcParams.enableLookahead = 0;
1236  av_log(avctx, AV_LOG_WARNING,
1237  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1238  } else {
1239  ctx->encode_config.rcParams.enableLookahead = 1;
1240  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1241  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1242  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1243  av_log(avctx, AV_LOG_VERBOSE,
1244  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1245  ctx->encode_config.rcParams.lookaheadDepth,
1246  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1247  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1248  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1249  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1250  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1251 
1252 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1253  if (ctx->lookahead_level >= 0) {
1254  switch (ctx->lookahead_level) {
1255  case NV_ENC_LOOKAHEAD_LEVEL_0:
1256  case NV_ENC_LOOKAHEAD_LEVEL_1:
1257  case NV_ENC_LOOKAHEAD_LEVEL_2:
1258  case NV_ENC_LOOKAHEAD_LEVEL_3:
1259  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1260  break;
1261  default:
1262  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1263  return AVERROR(EINVAL);
1264  }
1265 
1266  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1267  }
1268 #endif
1269  }
1270  }
1271 
1272  if (ctx->strict_gop) {
1273  ctx->encode_config.rcParams.strictGOPTarget = 1;
1274  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1275  }
1276 
1277  if (ctx->nonref_p)
1278  ctx->encode_config.rcParams.enableNonRefP = 1;
1279 
1280  if (ctx->zerolatency)
1281  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1282 
1283  if (ctx->quality) {
1284  //convert from float to fixed point 8.8
1285  int tmp_quality = (int)(ctx->quality * 256.0f);
1286  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1287  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1288 
1289  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1290 
1291  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1292  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1293  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1294  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1295  }
1296 
1297  return 0;
1298 }
1299 
1301 {
1302  NvencContext *ctx = avctx->priv_data;
1303  NV_ENC_CONFIG *cc = &ctx->encode_config;
1304  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1305  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1306 
1307  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1308 
1309  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1310  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1311  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1312  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1313  vui->videoFullRangeFlag = 0;
1314  } else {
1315  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1316  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1317  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1318  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1319  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1320  }
1321 
1322  vui->colourDescriptionPresentFlag =
1323  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1324 
1325  vui->videoSignalTypePresentFlag =
1326  (vui->colourDescriptionPresentFlag
1327  || vui->videoFormat != 5
1328  || vui->videoFullRangeFlag != 0);
1329 
1330  if (ctx->max_slice_size > 0) {
1331  h264->sliceMode = 1;
1332  h264->sliceModeData = ctx->max_slice_size;
1333  } else {
1334  h264->sliceMode = 3;
1335  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1336  }
1337 
1338  if (ctx->intra_refresh) {
1339  h264->enableIntraRefresh = 1;
1340  h264->intraRefreshPeriod = cc->gopLength;
1341  h264->intraRefreshCnt = cc->gopLength - 1;
1342  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1343  h264->outputRecoveryPointSEI = 1;
1344 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1345  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1346 #endif
1347  }
1348 
1349  if (ctx->constrained_encoding)
1350  h264->enableConstrainedEncoding = 1;
1351 
1352  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1353  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1354  h264->outputAUD = ctx->aud;
1355 
1356  if (ctx->dpb_size >= 0) {
1357  /* 0 means "let the hardware decide" */
1358  h264->maxNumRefFrames = ctx->dpb_size;
1359  }
1360 
1361  h264->idrPeriod = cc->gopLength;
1362 
1363  if (IS_CBR(cc->rcParams.rateControlMode)) {
1364  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1365  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1366 
1367 #ifdef NVENC_HAVE_FILLER_DATA
1368  h264->enableFillerDataInsertion = ctx->cbr_padding;
1369 #endif
1370  }
1371 
1372  h264->outputPictureTimingSEI = 1;
1373 
1374 #ifndef NVENC_NO_DEPRECATED_RC
1375  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1376  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1377  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1378  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1379  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1380  }
1381 #endif
1382 
1383  if (ctx->flags & NVENC_LOSSLESS) {
1384  h264->qpPrimeYZeroTransformBypassFlag = 1;
1385  } else {
1386  switch(ctx->profile) {
1388  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1390  if (cc->frameIntervalP > 1) {
1391  av_log(avctx, AV_LOG_WARNING,
1392  "B-frames are not supported by H.264 Baseline profile, disabling.\n");
1393  cc->frameIntervalP = 1;
1394  }
1395  break;
1397  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1398  avctx->profile = AV_PROFILE_H264_MAIN;
1399  break;
1401  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1402  avctx->profile = AV_PROFILE_H264_HIGH;
1403  break;
1404 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1405  case NV_ENC_H264_PROFILE_HIGH_10:
1406  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1408  break;
1409 #endif
1410 #ifdef NVENC_HAVE_422_SUPPORT
1411  case NV_ENC_H264_PROFILE_HIGH_422:
1412  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1414  break;
1415 #endif
1417  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1419  break;
1420  }
1421  }
1422 
1423 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1424  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1425  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1426  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1428  }
1429 #endif
1430 
1431  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1432  if (IS_YUV444(ctx->data_pix_fmt)) {
1433  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1435  }
1436 
1437 #ifdef NVENC_HAVE_422_SUPPORT
1438  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1439  if (IS_YUV422(ctx->data_pix_fmt)) {
1440  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1442  }
1443 #endif
1444 
1445  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1446 
1447  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1448 
1449  h264->level = ctx->level;
1450 
1451 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1452  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1453  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1454 #endif
1455 
1456  if (ctx->coder >= 0)
1457  h264->entropyCodingMode = ctx->coder;
1458 
1459 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1460  if (ctx->b_ref_mode >= 0)
1461  h264->useBFramesAsRef = ctx->b_ref_mode;
1462 #endif
1463 
1464 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1465  h264->numRefL0 = avctx->refs;
1466  h264->numRefL1 = avctx->refs;
1467 #endif
1468 
1469 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1470  if (ctx->tf_level >= 0) {
1471  h264->tfLevel = ctx->tf_level;
1472 
1473  switch (ctx->tf_level)
1474  {
1475  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1476  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1477  break;
1478  default:
1479  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1480  return AVERROR(EINVAL);
1481  }
1482 
1483  if (ctx->encode_config.frameIntervalP < 5)
1484  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1485  }
1486 #endif
1487 
1488 #ifdef NVENC_HAVE_TIME_CODE
1489  if (ctx->s12m_tc)
1490  h264->enableTimeCode = 1;
1491 #endif
1492 
1493  return 0;
1494 }
1495 
1497 {
1498  NvencContext *ctx = avctx->priv_data;
1499  NV_ENC_CONFIG *cc = &ctx->encode_config;
1500  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1501  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1502 
1503  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1504 
1505  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1506  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1507  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1508  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1509  vui->videoFullRangeFlag = 0;
1510  } else {
1511  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1512  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1513  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1514  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1515  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1516  }
1517 
1518  vui->colourDescriptionPresentFlag =
1519  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1520 
1521  vui->videoSignalTypePresentFlag =
1522  (vui->colourDescriptionPresentFlag
1523  || vui->videoFormat != 5
1524  || vui->videoFullRangeFlag != 0);
1525 
1526  if (ctx->max_slice_size > 0) {
1527  hevc->sliceMode = 1;
1528  hevc->sliceModeData = ctx->max_slice_size;
1529  } else {
1530  hevc->sliceMode = 3;
1531  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1532  }
1533 
1534  if (ctx->intra_refresh) {
1535  hevc->enableIntraRefresh = 1;
1536  hevc->intraRefreshPeriod = cc->gopLength;
1537  hevc->intraRefreshCnt = cc->gopLength - 1;
1538  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1539 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1540  hevc->outputRecoveryPointSEI = 1;
1541 #endif
1542 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1543  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1544 #endif
1545  }
1546 
1547 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1548  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1549  avctx->nb_decoded_side_data,
1551  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1552  avctx->nb_decoded_side_data,
1554 #endif
1555 
1556 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1557  if (ctx->constrained_encoding)
1558  hevc->enableConstrainedEncoding = 1;
1559 #endif
1560 
1561  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1562  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1563  hevc->outputAUD = ctx->aud;
1564 
1565  if (ctx->dpb_size >= 0) {
1566  /* 0 means "let the hardware decide" */
1567  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1568  }
1569 
1570  hevc->idrPeriod = cc->gopLength;
1571 
1572  if (IS_CBR(cc->rcParams.rateControlMode)) {
1573  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1574  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1575 
1576 #ifdef NVENC_HAVE_FILLER_DATA
1577  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1578 #endif
1579  }
1580 
1581  hevc->outputPictureTimingSEI = 1;
1582 
1583 #ifdef NVENC_HAVE_MVHEVC
1584  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1587  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1588 
1589  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1590  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1591 
1592  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1593  stereo3d->type != AV_STEREO3D_2D &&
1594  stereo3d->type != AV_STEREO3D_UNSPEC &&
1595  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1596  {
1597  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1598  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1599  }
1600  }
1601 #endif
1602 
1603  switch (ctx->profile) {
1605  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1606  avctx->profile = AV_PROFILE_HEVC_MAIN;
1607  break;
1609  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1611  break;
1613  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1614  avctx->profile = AV_PROFILE_HEVC_REXT;
1615  break;
1616 #ifdef NVENC_HAVE_MVHEVC
1617  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1618  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1620  ctx->multiview = 1;
1621 
1622  hevc->enableMVHEVC = 1;
1623  hevc->outputHevc3DReferenceDisplayInfo = 1;
1624 
1625  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1626  break;
1627 #endif
1628  }
1629 
1630  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1631  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1632  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1634  }
1635 
1636  // force setting profile as rext if input is yuv444 or yuv422
1637  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1638  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1639  avctx->profile = AV_PROFILE_HEVC_REXT;
1640  }
1641 
1642 #ifdef NVENC_HAVE_MVHEVC
1643  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1644  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1645  return AVERROR(EINVAL);
1646  }
1647 #endif
1648 
1649  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1650 
1651 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1652  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1653  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1654 #else
1655  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1656 #endif
1657 
1658  hevc->level = ctx->level;
1659 
1660  hevc->tier = ctx->tier;
1661 
1662 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1663  if (ctx->b_ref_mode >= 0)
1664  hevc->useBFramesAsRef = ctx->b_ref_mode;
1665 #endif
1666 
1667 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1668  hevc->numRefL0 = avctx->refs;
1669  hevc->numRefL1 = avctx->refs;
1670 #endif
1671 
1672 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1673  if (ctx->tf_level >= 0) {
1674  hevc->tfLevel = ctx->tf_level;
1675 
1676  switch (ctx->tf_level)
1677  {
1678  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1679  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1680  break;
1681  default:
1682  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1683  return AVERROR(EINVAL);
1684  }
1685 
1686  if (ctx->encode_config.frameIntervalP < 5)
1687  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1688  }
1689 #endif
1690 
1691  return 0;
1692 }
1693 
1694 #if CONFIG_AV1_NVENC_ENCODER
1695 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1696 {
1697  NvencContext *ctx = avctx->priv_data;
1698  NV_ENC_CONFIG *cc = &ctx->encode_config;
1699  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1700 
1701  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1702 
1703  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1704  av1->matrixCoefficients = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1705  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1706  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1707  av1->colorRange = 0;
1708  } else {
1709  av1->matrixCoefficients = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1710  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1711  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1712  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1713  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1714  }
1715 
1716  if (IS_YUV444(ctx->data_pix_fmt)) {
1717  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1718  return AVERROR(ENOTSUP);
1719  } else {
1720  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1721  avctx->profile = AV_PROFILE_AV1_MAIN;
1722  }
1723 
1724  if (ctx->dpb_size >= 0) {
1725  /* 0 means "let the hardware decide" */
1726  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1727  }
1728 
1729  if (ctx->intra_refresh) {
1730  av1->enableIntraRefresh = 1;
1731  av1->intraRefreshPeriod = cc->gopLength;
1732  av1->intraRefreshCnt = cc->gopLength - 1;
1733  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1734  }
1735 
1736  av1->idrPeriod = cc->gopLength;
1737 
1738  if (IS_CBR(cc->rcParams.rateControlMode)) {
1739  av1->enableBitstreamPadding = ctx->cbr_padding;
1740  }
1741 
1742  if (ctx->tile_cols >= 0)
1743  av1->numTileColumns = ctx->tile_cols;
1744  if (ctx->tile_rows >= 0)
1745  av1->numTileRows = ctx->tile_rows;
1746 
1747  av1->outputAnnexBFormat = 0;
1748 
1749  av1->level = ctx->level;
1750  av1->tier = ctx->tier;
1751 
1752  av1->enableTimingInfo = ctx->timing_info;
1753 
1754  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1755  av1->disableSeqHdr = 0;
1756  av1->repeatSeqHdr = 1;
1757 
1758  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1759 
1760 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1761  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1762  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1763 #else
1764  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1765  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1766 #endif
1767 
1768 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1769  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1770  avctx->nb_decoded_side_data,
1772  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1773  avctx->nb_decoded_side_data,
1775 #endif
1776 
1777  if (ctx->b_ref_mode >= 0)
1778  av1->useBFramesAsRef = ctx->b_ref_mode;
1779 
1780  av1->numFwdRefs = avctx->refs;
1781  av1->numBwdRefs = avctx->refs;
1782 
1783 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1784  if (ctx->tf_level >= 0) {
1785  av1->tfLevel = ctx->tf_level;
1786 
1787  switch (ctx->tf_level)
1788  {
1789  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1790  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1791  break;
1792  default:
1793  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1794  return AVERROR(EINVAL);
1795  }
1796 
1797  if (ctx->encode_config.frameIntervalP < 5)
1798  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1799  }
1800 #endif
1801 
1802  return 0;
1803 }
1804 #endif
1805 
1807 {
1808  switch (avctx->codec->id) {
1809  case AV_CODEC_ID_H264:
1810  return nvenc_setup_h264_config(avctx);
1811  case AV_CODEC_ID_HEVC:
1812  return nvenc_setup_hevc_config(avctx);
1813 #if CONFIG_AV1_NVENC_ENCODER
1814  case AV_CODEC_ID_AV1:
1815  return nvenc_setup_av1_config(avctx);
1816 #endif
1817  /* Earlier switch/case will return if unknown codec is passed. */
1818  }
1819 
1820  return 0;
1821 }
1822 
1823 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1824  int sw, sh;
1825 
1826  sw = avctx->width;
1827  sh = avctx->height;
1828 
1829 #if CONFIG_AV1_NVENC_ENCODER
1830  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1831  /* For AV1 we actually need to calculate the render width/height, not the dar */
1832  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1833  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1834  {
1835  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1836  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1837  } else {
1838  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1839  }
1840  }
1841 
1842  *dw = sw;
1843  *dh = sh;
1844  return;
1845  }
1846 #endif
1847 
1848  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1849  sw *= avctx->sample_aspect_ratio.num;
1850  sh *= avctx->sample_aspect_ratio.den;
1851  }
1852 
1853  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1854 }
1855 
1857 {
1858  NvencContext *ctx = avctx->priv_data;
1859  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1860  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1861 
1862  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1863  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1864  AVCPBProperties *cpb_props;
1865  int res = 0;
1866  int dw, dh;
1867 
1868  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1869  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1870 
1871  ctx->init_encode_params.encodeHeight = avctx->height;
1872  ctx->init_encode_params.encodeWidth = avctx->width;
1873 
1874  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1875 
1876  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1877  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1878 
1879 #ifdef NVENC_HAVE_NEW_PRESETS
1880  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1881 
1882  if (ctx->flags & NVENC_LOSSLESS)
1883  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1884  else if (ctx->flags & NVENC_LOWLATENCY)
1885  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1886 
1887  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1888  ctx->init_encode_params.encodeGUID,
1889  ctx->init_encode_params.presetGUID,
1890  ctx->init_encode_params.tuningInfo,
1891  &preset_config);
1892 #else
1893  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1894  ctx->init_encode_params.encodeGUID,
1895  ctx->init_encode_params.presetGUID,
1896  &preset_config);
1897 #endif
1898  if (nv_status != NV_ENC_SUCCESS)
1899  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1900 
1901  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1902 
1903  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1904 
1905  compute_dar(avctx, &dw, &dh);
1906  ctx->init_encode_params.darHeight = dh;
1907  ctx->init_encode_params.darWidth = dw;
1908 
1909  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1910  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1911  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1912  } else {
1913  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1914  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1915  }
1916 
1917 #ifdef NVENC_HAVE_UNIDIR_B
1918  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1919 #endif
1920 
1921  ctx->init_encode_params.enableEncodeAsync = 0;
1922  ctx->init_encode_params.enablePTD = 1;
1923 
1924 #ifdef NVENC_HAVE_NEW_PRESETS
1925  /* If lookahead isn't set from CLI, use value from preset.
1926  * P6 & P7 presets may enable lookahead for better quality.
1927  * */
1928  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1929  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1930 #endif
1931 
1932  if (ctx->weighted_pred == 1)
1933  ctx->init_encode_params.enableWeightedPrediction = 1;
1934 
1935 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1936  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1937 
1938  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1939  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1940  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1941  }
1942 #endif
1943 
1944  if (ctx->bluray_compat) {
1945  ctx->aud = 1;
1946  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1947  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1948  switch (avctx->codec->id) {
1949  case AV_CODEC_ID_H264:
1950  /* maximum level depends on used resolution */
1951  break;
1952  case AV_CODEC_ID_HEVC:
1953  ctx->level = NV_ENC_LEVEL_HEVC_51;
1954  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1955  break;
1956  }
1957  }
1958 
1959  if (avctx->gop_size > 0) {
1960  // only overwrite preset if a GOP size was selected as input
1961  ctx->encode_config.gopLength = avctx->gop_size;
1962  } else if (avctx->gop_size == 0) {
1963  ctx->encode_config.frameIntervalP = 0;
1964  ctx->encode_config.gopLength = 1;
1965  }
1966 
1967  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1968  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1969  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1970  }
1971 
1972  /* force to enable intra refresh */
1973  if(ctx->single_slice_intra_refresh)
1974  ctx->intra_refresh = 1;
1975 
1976  nvenc_recalc_surfaces(avctx);
1977 
1978  res = nvenc_setup_rate_control(avctx);
1979  if (res < 0)
1980  return res;
1981 
1982  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1983  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1984  } else {
1985  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1986  }
1987 
1988  res = nvenc_setup_codec_config(avctx);
1989  if (res)
1990  return res;
1991 
1992  res = nvenc_push_context(avctx);
1993  if (res < 0)
1994  return res;
1995 
1996  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1997  if (nv_status != NV_ENC_SUCCESS) {
1998  nvenc_pop_context(avctx);
1999  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
2000  }
2001 
2002 #ifdef NVENC_HAVE_CUSTREAM_PTR
2003  if (ctx->cu_context) {
2004  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
2005  if (nv_status != NV_ENC_SUCCESS) {
2006  nvenc_pop_context(avctx);
2007  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
2008  }
2009  }
2010 #endif
2011 
2012  res = nvenc_pop_context(avctx);
2013  if (res < 0)
2014  return res;
2015 
2016  if (ctx->encode_config.frameIntervalP > 1)
2017  avctx->has_b_frames = 2;
2018 
2019  if (ctx->encode_config.rcParams.averageBitRate > 0)
2020  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
2021 
2022  cpb_props = ff_encode_add_cpb_side_data(avctx);
2023  if (!cpb_props)
2024  return AVERROR(ENOMEM);
2025  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
2026  cpb_props->avg_bitrate = avctx->bit_rate;
2027  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
2028 
2029  return 0;
2030 }
2031 
2032 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
2033 {
2034  switch (pix_fmt) {
2035  case AV_PIX_FMT_YUV420P:
2036  return NV_ENC_BUFFER_FORMAT_YV12;
2037  case AV_PIX_FMT_NV12:
2038  return NV_ENC_BUFFER_FORMAT_NV12;
2039  case AV_PIX_FMT_P010:
2040  case AV_PIX_FMT_P016:
2041  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
2042  case AV_PIX_FMT_GBRP:
2043  case AV_PIX_FMT_YUV444P:
2044  return NV_ENC_BUFFER_FORMAT_YUV444;
2045  case AV_PIX_FMT_GBRP16:
2046  case AV_PIX_FMT_GBRP10MSB:
2047  case AV_PIX_FMT_YUV444P16:
2049  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2050  case AV_PIX_FMT_0RGB32:
2051  case AV_PIX_FMT_RGB32:
2052  return NV_ENC_BUFFER_FORMAT_ARGB;
2053  case AV_PIX_FMT_0BGR32:
2054  case AV_PIX_FMT_BGR32:
2055  return NV_ENC_BUFFER_FORMAT_ABGR;
2056  case AV_PIX_FMT_X2RGB10:
2057  return NV_ENC_BUFFER_FORMAT_ARGB10;
2058  case AV_PIX_FMT_X2BGR10:
2059  return NV_ENC_BUFFER_FORMAT_ABGR10;
2060 #ifdef NVENC_HAVE_422_SUPPORT
2061  case AV_PIX_FMT_NV16:
2062  return NV_ENC_BUFFER_FORMAT_NV16;
2063  case AV_PIX_FMT_P210:
2064  case AV_PIX_FMT_P216:
2065  return NV_ENC_BUFFER_FORMAT_P210;
2066 #endif
2067  default:
2068  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2069  }
2070 }
2071 
2072 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2073 {
2074  NvencContext *ctx = avctx->priv_data;
2075  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2076  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2077  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2078 
2079  NVENCSTATUS nv_status;
2080  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2081  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2082 
2083  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2084  ctx->surfaces[idx].in_ref = av_frame_alloc();
2085  if (!ctx->surfaces[idx].in_ref)
2086  return AVERROR(ENOMEM);
2087  } else {
2088  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2089 
2090  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2091  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2092  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2093  av_get_pix_fmt_name(ctx->data_pix_fmt));
2094  return AVERROR(EINVAL);
2095  }
2096 
2097  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2098  allocSurf.width = avctx->width;
2099  allocSurf.height = avctx->height;
2100  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2101 
2102  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2103  if (nv_status != NV_ENC_SUCCESS) {
2104  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2105  }
2106 
2107  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2108  ctx->surfaces[idx].width = allocSurf.width;
2109  ctx->surfaces[idx].height = allocSurf.height;
2110  }
2111 
2112  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2113  if (nv_status != NV_ENC_SUCCESS) {
2114  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2115  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2116  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2117  av_frame_free(&ctx->surfaces[idx].in_ref);
2118  return err;
2119  }
2120 
2121  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2122 
2123  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2124 
2125  return 0;
2126 }
2127 
2129 {
2130  NvencContext *ctx = avctx->priv_data;
2131  int i, res = 0, res2;
2132 
2133  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2134  if (!ctx->surfaces)
2135  return AVERROR(ENOMEM);
2136 
2137  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2138  if (!ctx->frame_data_array)
2139  return AVERROR(ENOMEM);
2140 
2141  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2142  sizeof(int64_t), 0);
2143  if (!ctx->timestamp_list)
2144  return AVERROR(ENOMEM);
2145 
2146  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2147  if (!ctx->unused_surface_queue)
2148  return AVERROR(ENOMEM);
2149 
2150  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2151  if (!ctx->output_surface_queue)
2152  return AVERROR(ENOMEM);
2153  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2154  if (!ctx->output_surface_ready_queue)
2155  return AVERROR(ENOMEM);
2156 
2157  res = nvenc_push_context(avctx);
2158  if (res < 0)
2159  return res;
2160 
2161  for (i = 0; i < ctx->nb_surfaces; i++) {
2162  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2163  goto fail;
2164  }
2165 
2166 fail:
2167  res2 = nvenc_pop_context(avctx);
2168  if (res2 < 0)
2169  return res2;
2170 
2171  return res;
2172 }
2173 
2175 {
2176  NvencContext *ctx = avctx->priv_data;
2177  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2178  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2179 
2180  NVENCSTATUS nv_status;
2181  uint32_t outSize = 0;
2182  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2183 
2184  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2185  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2186 
2187  payload.spsppsBuffer = tmpHeader;
2188  payload.inBufferSize = sizeof(tmpHeader);
2189  payload.outSPSPPSPayloadSize = &outSize;
2190 
2191  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2192  if (nv_status != NV_ENC_SUCCESS) {
2193  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2194  }
2195 
2196  avctx->extradata_size = outSize;
2198 
2199  if (!avctx->extradata) {
2200  return AVERROR(ENOMEM);
2201  }
2202 
2203  memcpy(avctx->extradata, tmpHeader, outSize);
2204 
2205  return 0;
2206 }
2207 
2209 {
2210  NvencContext *ctx = avctx->priv_data;
2211  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2212  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2213  int i, res;
2214 
2215  /* the encoder has to be flushed before it can be closed */
2216  if (ctx->nvencoder) {
2217  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2218  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2219 
2220  res = nvenc_push_context(avctx);
2221  if (res < 0)
2222  return res;
2223 
2224  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2225  }
2226 
2227  av_fifo_freep2(&ctx->timestamp_list);
2228  av_fifo_freep2(&ctx->output_surface_ready_queue);
2229  av_fifo_freep2(&ctx->output_surface_queue);
2230  av_fifo_freep2(&ctx->unused_surface_queue);
2231 
2232  if (ctx->frame_data_array) {
2233  for (i = 0; i < ctx->frame_data_array_nb; i++)
2234  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2235  av_freep(&ctx->frame_data_array);
2236  }
2237 
2238  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2239  for (i = 0; i < ctx->nb_registered_frames; i++) {
2240  if (ctx->registered_frames[i].mapped)
2241  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2242  if (ctx->registered_frames[i].regptr)
2243  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2244  }
2245  ctx->nb_registered_frames = 0;
2246  }
2247 
2248  if (ctx->surfaces) {
2249  for (i = 0; i < ctx->nb_surfaces; ++i) {
2250  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2251  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2252  av_frame_free(&ctx->surfaces[i].in_ref);
2253  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2254  }
2255  }
2256  av_freep(&ctx->surfaces);
2257  ctx->nb_surfaces = 0;
2258 
2259  av_frame_free(&ctx->frame);
2260 
2261  av_freep(&ctx->sei_data);
2262 
2263  if (ctx->nvencoder) {
2264  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2265 
2266  res = nvenc_pop_context(avctx);
2267  if (res < 0)
2268  return res;
2269  }
2270  ctx->nvencoder = NULL;
2271 
2272  if (ctx->cu_context_internal)
2273  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2274  ctx->cu_context = ctx->cu_context_internal = NULL;
2275 
2276 #if CONFIG_D3D11VA
2277  if (ctx->d3d11_device) {
2278  ID3D11Device_Release(ctx->d3d11_device);
2279  ctx->d3d11_device = NULL;
2280  }
2281 #endif
2282 
2283  nvenc_free_functions(&dl_fn->nvenc_dl);
2284  cuda_free_functions(&dl_fn->cuda_dl);
2285 
2286  dl_fn->nvenc_device_count = 0;
2287 
2288  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2289 
2290  return 0;
2291 }
2292 
2294 {
2295  NvencContext *ctx = avctx->priv_data;
2296  int ret;
2297 
2298  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2299  AVHWFramesContext *frames_ctx;
2300  if (!avctx->hw_frames_ctx) {
2301  av_log(avctx, AV_LOG_ERROR,
2302  "hw_frames_ctx must be set when using GPU frames as input\n");
2303  return AVERROR(EINVAL);
2304  }
2305  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2306  if (frames_ctx->format != avctx->pix_fmt) {
2307  av_log(avctx, AV_LOG_ERROR,
2308  "hw_frames_ctx must match the GPU frame type\n");
2309  return AVERROR(EINVAL);
2310  }
2311  ctx->data_pix_fmt = frames_ctx->sw_format;
2312  } else {
2313  ctx->data_pix_fmt = avctx->pix_fmt;
2314  }
2315 
2316  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2317  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2318  return AVERROR(EINVAL);
2319  }
2320 
2321  ctx->frame = av_frame_alloc();
2322  if (!ctx->frame)
2323  return AVERROR(ENOMEM);
2324 
2325  if ((ret = nvenc_load_libraries(avctx)) < 0)
2326  return ret;
2327 
2328  if ((ret = nvenc_setup_device(avctx)) < 0)
2329  return ret;
2330 
2331  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2332  return ret;
2333 
2334  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2335  return ret;
2336 
2337  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2338  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2339  return ret;
2340  }
2341 
2342  return 0;
2343 }
2344 
2346 {
2347  NvencSurface *tmp_surf;
2348 
2349  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2350  // queue empty
2351  return NULL;
2352 
2353  return tmp_surf;
2354 }
2355 
2356 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2357  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2358 {
2359  int dst_linesize[4] = {
2360  lock_buffer_params->pitch,
2361  lock_buffer_params->pitch,
2362  lock_buffer_params->pitch,
2363  lock_buffer_params->pitch
2364  };
2365  uint8_t *dst_data[4];
2366  int ret;
2367 
2368  if (frame->format == AV_PIX_FMT_YUV420P)
2369  dst_linesize[1] = dst_linesize[2] >>= 1;
2370 
2371  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2372  lock_buffer_params->bufferDataPtr, dst_linesize);
2373  if (ret < 0)
2374  return ret;
2375 
2376  if (frame->format == AV_PIX_FMT_YUV420P)
2377  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2378 
2379  av_image_copy2(dst_data, dst_linesize,
2380  frame->data, frame->linesize, frame->format,
2381  avctx->width, avctx->height);
2382 
2383  return 0;
2384 }
2385 
2387 {
2388  NvencContext *ctx = avctx->priv_data;
2389  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2390  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2391  NVENCSTATUS nv_status;
2392 
2393  int i, first_round;
2394 
2395  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2396  for (first_round = 1; first_round >= 0; first_round--) {
2397  for (i = 0; i < ctx->nb_registered_frames; i++) {
2398  if (!ctx->registered_frames[i].mapped) {
2399  if (ctx->registered_frames[i].regptr) {
2400  if (first_round)
2401  continue;
2402  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2403  if (nv_status != NV_ENC_SUCCESS)
2404  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2405  ctx->registered_frames[i].ptr = NULL;
2406  ctx->registered_frames[i].regptr = NULL;
2407  }
2408  return i;
2409  }
2410  }
2411  }
2412  } else {
2413  return ctx->nb_registered_frames++;
2414  }
2415 
2416  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2417  return AVERROR(ENOMEM);
2418 }
2419 
2421 {
2422  NvencContext *ctx = avctx->priv_data;
2423  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2424  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2425 
2426  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2427  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2428  int i, idx, ret;
2429 
2430  for (i = 0; i < ctx->nb_registered_frames; i++) {
2431  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2432  return i;
2433  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2434  return i;
2435  }
2436 
2437  idx = nvenc_find_free_reg_resource(avctx);
2438  if (idx < 0)
2439  return idx;
2440 
2441  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2442  reg.width = frames_ctx->width;
2443  reg.height = frames_ctx->height;
2444  reg.pitch = frame->linesize[0];
2445  reg.resourceToRegister = frame->data[0];
2446 
2447  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2448  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2449  }
2450  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2451  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2452  reg.subResourceIndex = (intptr_t)frame->data[1];
2453  }
2454 
2455  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2456  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2457  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2458  av_get_pix_fmt_name(frames_ctx->sw_format));
2459  return AVERROR(EINVAL);
2460  }
2461 
2462  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2463  if (ret != NV_ENC_SUCCESS) {
2464  nvenc_print_error(avctx, ret, "Error registering an input resource");
2465  return AVERROR_UNKNOWN;
2466  }
2467 
2468  ctx->registered_frames[idx].ptr = frame->data[0];
2469  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2470  ctx->registered_frames[idx].regptr = reg.registeredResource;
2471  return idx;
2472 }
2473 
2475  NvencSurface *nvenc_frame)
2476 {
2477  NvencContext *ctx = avctx->priv_data;
2478  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2479  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2480 
2481  int res;
2482  NVENCSTATUS nv_status;
2483 
2484  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2485  int reg_idx = nvenc_register_frame(avctx, frame);
2486  if (reg_idx < 0) {
2487  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2488  return reg_idx;
2489  }
2490 
2491  res = av_frame_ref(nvenc_frame->in_ref, frame);
2492  if (res < 0)
2493  return res;
2494 
2495  if (!ctx->registered_frames[reg_idx].mapped) {
2496  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2497  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2498  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2499  if (nv_status != NV_ENC_SUCCESS) {
2500  av_frame_unref(nvenc_frame->in_ref);
2501  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2502  }
2503  }
2504 
2505  ctx->registered_frames[reg_idx].mapped += 1;
2506 
2507  nvenc_frame->reg_idx = reg_idx;
2508  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2509  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2510  nvenc_frame->pitch = frame->linesize[0];
2511 
2512  return 0;
2513  } else {
2514  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2515 
2516  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2517  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2518 
2519  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2520  if (nv_status != NV_ENC_SUCCESS) {
2521  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2522  }
2523 
2524  nvenc_frame->pitch = lockBufferParams.pitch;
2525  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2526 
2527  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2528  if (nv_status != NV_ENC_SUCCESS) {
2529  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2530  }
2531 
2532  return res;
2533  }
2534 }
2535 
2536 #ifdef NVENC_HAVE_TIME_CODE
2537 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2538 {
2540 
2541  if (sd) {
2542  uint32_t *tc = (uint32_t*)sd->data;
2543  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2544 
2545  switch (cnt) {
2546  case 0:
2547  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2548  time_code->skipClockTimestampInsertion = 1;
2549  break;
2550  case 2:
2551  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2552  break;
2553  case 3:
2554  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2555  break;
2556  default:
2557  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2558  break;
2559  }
2560 
2561  for (int i = 0; i < cnt; i++) {
2562  unsigned hh, mm, ss, ff, drop;
2563  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2564 
2565 #ifdef NVENC_NEW_COUNTING_TYPE
2566  time_code->clockTimestamp[i].countingTypeLSB = 0;
2567  time_code->clockTimestamp[i].countingTypeMSB = 0;
2568 #else
2569  time_code->clockTimestamp[i].countingType = 0;
2570 #endif
2571  time_code->clockTimestamp[i].discontinuityFlag = 0;
2572  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2573  time_code->clockTimestamp[i].nFrames = ff;
2574  time_code->clockTimestamp[i].secondsValue = ss;
2575  time_code->clockTimestamp[i].minutesValue = mm;
2576  time_code->clockTimestamp[i].hoursValue = hh;
2577  time_code->clockTimestamp[i].timeOffset = 0;
2578  }
2579  } else {
2580  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2581  time_code->skipClockTimestampInsertion = 1;
2582  }
2583 }
2584 #endif
2585 
2587  NV_ENC_PIC_PARAMS *params,
2588  NV_ENC_SEI_PAYLOAD *sei_data,
2589  int sei_count)
2590 {
2591  NvencContext *ctx = avctx->priv_data;
2592 
2593  switch (avctx->codec->id) {
2594  case AV_CODEC_ID_H264:
2595  params->codecPicParams.h264PicParams.sliceMode =
2596  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2597  params->codecPicParams.h264PicParams.sliceModeData =
2598  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2599  if (sei_count > 0) {
2600  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2601  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2602  }
2603 
2604 #ifdef NVENC_HAVE_TIME_CODE
2605  if (ctx->s12m_tc)
2606  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2607 #endif
2608 
2609  break;
2610  case AV_CODEC_ID_HEVC:
2611  params->codecPicParams.hevcPicParams.sliceMode =
2612  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2613  params->codecPicParams.hevcPicParams.sliceModeData =
2614  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2615  if (sei_count > 0) {
2616  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2617  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2618  }
2619 
2620  break;
2621 #if CONFIG_AV1_NVENC_ENCODER
2622  case AV_CODEC_ID_AV1:
2623  params->codecPicParams.av1PicParams.numTileColumns =
2624  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2625  params->codecPicParams.av1PicParams.numTileRows =
2626  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2627  if (sei_count > 0) {
2628  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2629  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2630  }
2631 
2632  break;
2633 #endif
2634  }
2635 }
2636 
2637 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2638 {
2639  av_fifo_write(queue, &timestamp, 1);
2640 }
2641 
2643 {
2644  int64_t timestamp = AV_NOPTS_VALUE;
2645  // The following call might fail if the queue is empty.
2646  av_fifo_read(queue, &timestamp, 1);
2647 
2648  return timestamp;
2649 }
2650 
2651 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2652 {
2653  int64_t timestamp = AV_NOPTS_VALUE;
2654  av_fifo_peek(queue, &timestamp, 1, index);
2655 
2656  return timestamp;
2657 }
2658 
2660  NV_ENC_LOCK_BITSTREAM *params,
2661  AVPacket *pkt)
2662 {
2663  NvencContext *ctx = avctx->priv_data;
2664  unsigned int delay;
2665  int64_t delay_time;
2666 
2667  pkt->pts = params->outputTimeStamp;
2668 
2669  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2670  pkt->dts = pkt->pts;
2671  return 0;
2672  }
2673 
2674  // This can be more than necessary, but we don't know the real reorder delay.
2675  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2676 #ifdef NVENC_HAVE_MVHEVC
2677  delay *= ctx->multiview ? 2 : 1;
2678 #endif
2679  if (ctx->output_frame_num >= delay) {
2680  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2681  ctx->output_frame_num++;
2682  return 0;
2683  }
2684 
2685  delay_time = ctx->initial_delay_time;
2686  if (!delay_time) {
2687  int64_t t1, t2, t3;
2688  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2689  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2690  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2691 
2692  if (t1 != AV_NOPTS_VALUE) {
2693  delay_time = t1 - t2;
2694  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2695  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2696  avctx->time_base);
2697  } else if (t3 != AV_NOPTS_VALUE) {
2698  delay_time = delay * (t3 - t2);
2699  } else {
2700  delay_time = delay;
2701  }
2702  ctx->initial_delay_time = delay_time;
2703  }
2704 
2705  /* The following method is simple, but doesn't guarantee monotonic with VFR
2706  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2707  *
2708  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2709  */
2710  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2711  ctx->output_frame_num++;
2712 
2713  return 0;
2714 }
2715 
2716 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2717 {
2718  NvencContext *ctx = avctx->priv_data;
2719  int res = 0;
2720 
2721  int idx = ctx->frame_data_array_pos;
2722  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2723 
2724  // in case the encoder got reconfigured, there might be leftovers
2726 
2727  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2730  return AVERROR(ENOMEM);
2731  }
2732 
2733  frame_data->duration = frame->duration;
2734  frame_data->frame_opaque = frame->opaque;
2735 
2736  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2737  pic_params->inputDuration = idx;
2738 
2739  return res;
2740 }
2741 
2742 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2743 {
2744  NvencContext *ctx = avctx->priv_data;
2745  int res = 0;
2746 
2747  int idx = lock_params->outputDuration;
2748  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2749 
2751 
2752  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2756  }
2757 
2759 
2760  return res;
2761 }
2762 
2764 {
2765  NvencContext *ctx = avctx->priv_data;
2766  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2767  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2768 
2769  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2770  NVENCSTATUS nv_status;
2771  int res = 0;
2772 
2773  enum AVPictureType pict_type;
2774 
2775  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2776 
2777  lock_params.doNotWait = 0;
2778  lock_params.outputBitstream = tmpoutsurf->output_surface;
2779 
2780  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2781  if (nv_status != NV_ENC_SUCCESS) {
2782  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2783  goto error;
2784  }
2785 
2786  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2787 
2788  if (res < 0) {
2789  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2790  goto error;
2791  }
2792 
2793  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2794 
2795  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2796  if (nv_status != NV_ENC_SUCCESS) {
2797  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2798  goto error;
2799  }
2800 
2801 
2802  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2803  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2804  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2805  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2806  if (nv_status != NV_ENC_SUCCESS) {
2807  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2808  goto error;
2809  }
2810  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2811  res = AVERROR_BUG;
2812  goto error;
2813  }
2814 
2815  av_frame_unref(tmpoutsurf->in_ref);
2816 
2817  tmpoutsurf->input_surface = NULL;
2818  }
2819 
2820  switch (lock_params.pictureType) {
2821  case NV_ENC_PIC_TYPE_IDR:
2824  case NV_ENC_PIC_TYPE_I:
2825  pict_type = AV_PICTURE_TYPE_I;
2826  break;
2827  case NV_ENC_PIC_TYPE_P:
2828  pict_type = AV_PICTURE_TYPE_P;
2829  break;
2830  case NV_ENC_PIC_TYPE_B:
2831  pict_type = AV_PICTURE_TYPE_B;
2832  break;
2833  case NV_ENC_PIC_TYPE_BI:
2834  pict_type = AV_PICTURE_TYPE_BI;
2835  break;
2836  default:
2837  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2838  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2839  res = AVERROR_EXTERNAL;
2840  goto error;
2841  }
2842 
2844  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2845 
2846  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2847  if (res < 0)
2848  goto error2;
2849 
2850  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2851  if (res < 0)
2852  goto error2;
2853 
2854  return 0;
2855 
2856 error:
2857  timestamp_queue_dequeue(ctx->timestamp_list);
2858 
2859 error2:
2860  return res;
2861 }
2862 
2863 static int output_ready(AVCodecContext *avctx, int flush)
2864 {
2865  NvencContext *ctx = avctx->priv_data;
2866  int nb_ready, nb_pending;
2867 
2868  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2869  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2870  if (flush)
2871  return nb_ready > 0;
2872  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2873 }
2874 
2876 {
2877  NvencContext *ctx = avctx->priv_data;
2878  int sei_count = 0;
2879  int i, res;
2880 
2882  void *a53_data = NULL;
2883  size_t a53_size = 0;
2884 
2885  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2886  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2887  }
2888 
2889  if (a53_data) {
2890  void *tmp = av_fast_realloc(ctx->sei_data,
2891  &ctx->sei_data_size,
2892  (sei_count + 1) * sizeof(*ctx->sei_data));
2893  if (!tmp) {
2894  av_free(a53_data);
2895  res = AVERROR(ENOMEM);
2896  goto error;
2897  } else {
2898  ctx->sei_data = tmp;
2899  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2900  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2901 
2902 #if CONFIG_AV1_NVENC_ENCODER
2903  if (avctx->codec->id == AV_CODEC_ID_AV1)
2904  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2905  else
2906 #endif
2907  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2908 
2909  sei_count++;
2910  }
2911  }
2912  }
2913 
2915  void *tc_data = NULL;
2916  size_t tc_size = 0;
2917 
2918  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2919  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2920  }
2921 
2922  if (tc_data) {
2923  void *tmp = av_fast_realloc(ctx->sei_data,
2924  &ctx->sei_data_size,
2925  (sei_count + 1) * sizeof(*ctx->sei_data));
2926  if (!tmp) {
2927  av_free(tc_data);
2928  res = AVERROR(ENOMEM);
2929  goto error;
2930  } else {
2931  ctx->sei_data = tmp;
2932  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2933  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2934 
2935 #if CONFIG_AV1_NVENC_ENCODER
2936  if (avctx->codec->id == AV_CODEC_ID_AV1)
2937  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2938  else
2939 #endif
2940  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2941 
2942  sei_count++;
2943  }
2944  }
2945  }
2946 
2947  if (!ctx->udu_sei)
2948  return sei_count;
2949 
2950  for (i = 0; i < frame->nb_side_data; i++) {
2951  AVFrameSideData *side_data = frame->side_data[i];
2952  void *tmp;
2953 
2954  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2955  continue;
2956 
2957  tmp = av_fast_realloc(ctx->sei_data,
2958  &ctx->sei_data_size,
2959  (sei_count + 1) * sizeof(*ctx->sei_data));
2960  if (!tmp) {
2961  res = AVERROR(ENOMEM);
2962  goto error;
2963  } else {
2964  ctx->sei_data = tmp;
2965  ctx->sei_data[sei_count].payloadSize = side_data->size;
2966  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2967  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2968 
2969  if (!ctx->sei_data[sei_count].payload) {
2970  res = AVERROR(ENOMEM);
2971  goto error;
2972  }
2973 
2974  sei_count++;
2975  }
2976  }
2977 
2978  return sei_count;
2979 
2980 error:
2981  for (i = 0; i < sei_count; i++)
2982  av_freep(&(ctx->sei_data[i].payload));
2983 
2984  return res;
2985 }
2986 
2987 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2988 {
2989  NvencContext *ctx = avctx->priv_data;
2990  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2991  NVENCSTATUS ret;
2992 
2993  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2994  int needs_reconfig = 0;
2995  int needs_encode_config = 0;
2996  int reconfig_bitrate = 0, reconfig_dar = 0;
2997  int dw, dh;
2998 
2999  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
3000  params.reInitEncodeParams = ctx->init_encode_params;
3001 
3002  compute_dar(avctx, &dw, &dh);
3003  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
3004  av_log(avctx, AV_LOG_VERBOSE,
3005  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
3006  ctx->init_encode_params.darWidth,
3007  ctx->init_encode_params.darHeight, dw, dh);
3008 
3009  params.reInitEncodeParams.darHeight = dh;
3010  params.reInitEncodeParams.darWidth = dw;
3011 
3012  needs_reconfig = 1;
3013  reconfig_dar = 1;
3014  }
3015 
3016  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
3017  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
3018  av_log(avctx, AV_LOG_VERBOSE,
3019  "avg bitrate change: %d -> %d\n",
3020  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
3021  (uint32_t)avctx->bit_rate);
3022 
3023  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
3024  reconfig_bitrate = 1;
3025  }
3026 
3027  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
3028  av_log(avctx, AV_LOG_VERBOSE,
3029  "max bitrate change: %d -> %d\n",
3030  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
3031  (uint32_t)avctx->rc_max_rate);
3032 
3033  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
3034  reconfig_bitrate = 1;
3035  }
3036 
3037  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
3038  av_log(avctx, AV_LOG_VERBOSE,
3039  "vbv buffer size change: %d -> %d\n",
3040  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
3041  avctx->rc_buffer_size);
3042 
3043  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
3044  reconfig_bitrate = 1;
3045  }
3046 
3047  if (reconfig_bitrate) {
3048  params.resetEncoder = 1;
3049  params.forceIDR = 1;
3050 
3051  needs_encode_config = 1;
3052  needs_reconfig = 1;
3053  }
3054  }
3055 
3056  if (!needs_encode_config)
3057  params.reInitEncodeParams.encodeConfig = NULL;
3058 
3059  if (needs_reconfig) {
3060  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3061  if (ret != NV_ENC_SUCCESS) {
3062  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3063  } else {
3064  if (reconfig_dar) {
3065  ctx->init_encode_params.darHeight = dh;
3066  ctx->init_encode_params.darWidth = dw;
3067  }
3068 
3069  if (reconfig_bitrate) {
3070  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3071  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3072  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3073  }
3074 
3075  }
3076  }
3077 }
3078 
3079 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3080 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3081  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3082 {
3083  NvencContext *ctx = avctx->priv_data;
3084 
3085  if (ctx->mdm || ctx->cll) {
3088  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3089  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3090  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3091 
3092  if (!sd_mdm)
3093  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3094  avctx->nb_decoded_side_data,
3096  if (!sd_cll)
3097  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3098  avctx->nb_decoded_side_data,
3100 
3101  if (sd_mdm) {
3103 
3104  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3105  mdm->display_primaries[0][0].den);
3106  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3107  mdm->display_primaries[0][1].den);
3108  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3109  mdm->display_primaries[1][0].den);
3110  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3111  mdm->display_primaries[1][1].den);
3112  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3113  mdm->display_primaries[2][0].den);
3114  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3115  mdm->display_primaries[2][1].den);
3116  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3117  mdm->white_point[0].den);
3118  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3119  mdm->white_point[1].den);
3120  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3121  mdm->max_luminance.den);
3122  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3123  mdm->min_luminance.den);
3124 
3125  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3126  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3127  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3128  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3129  else
3130  return AVERROR_BUG;
3131  }
3132  if (sd_cll) {
3133  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3134 
3135  content_light_level->maxContentLightLevel = cll->MaxCLL;
3136  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3137 
3138  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3139  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3140  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3141  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3142  else
3143  return AVERROR_BUG;
3144  }
3145  }
3146 
3147  return 0;
3148 }
3149 #endif
3150 
3151 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3152 {
3153  NVENCSTATUS nv_status;
3154  NvencSurface *tmp_out_surf, *in_surf;
3155  int res, res2;
3156  int sei_count = 0;
3157  int i;
3158 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3159  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3160  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3161 #endif
3162 #ifdef NVENC_HAVE_MVHEVC
3163  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3164 #endif
3165 
3166  NvencContext *ctx = avctx->priv_data;
3167  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3168  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3169 
3170  NV_ENC_PIC_PARAMS pic_params = { 0 };
3171  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3172 
3173  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3174  return AVERROR(EINVAL);
3175 
3176  if (frame && frame->buf[0]) {
3177  in_surf = get_free_frame(ctx);
3178  if (!in_surf)
3179  return AVERROR(EAGAIN);
3180 
3181  res = nvenc_push_context(avctx);
3182  if (res < 0)
3183  return res;
3184 
3185  reconfig_encoder(avctx, frame);
3186 
3187  res = nvenc_upload_frame(avctx, frame, in_surf);
3188 
3189  res2 = nvenc_pop_context(avctx);
3190  if (res2 < 0)
3191  return res2;
3192 
3193  if (res)
3194  return res;
3195 
3196  pic_params.inputBuffer = in_surf->input_surface;
3197  pic_params.bufferFmt = in_surf->format;
3198  pic_params.inputWidth = in_surf->width;
3199  pic_params.inputHeight = in_surf->height;
3200  pic_params.inputPitch = in_surf->pitch;
3201  pic_params.outputBitstream = in_surf->output_surface;
3202 
3203  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3204  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3205  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3206  else
3207  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3208  } else {
3209  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3210  }
3211 
3212  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3213  pic_params.encodePicFlags =
3214  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3215  } else {
3216  pic_params.encodePicFlags = 0;
3217  }
3218 
3219  pic_params.frameIdx = ctx->frame_idx_counter++;
3220  pic_params.inputTimeStamp = frame->pts;
3221 
3222  if (ctx->extra_sei) {
3223  res = prepare_sei_data_array(avctx, frame);
3224  if (res < 0)
3225  return res;
3226  sei_count = res;
3227  }
3228 
3229 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3230  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3231  if (res < 0)
3232  return res;
3233 #endif
3234 
3235 #ifdef NVENC_HAVE_MVHEVC
3236  if (ctx->multiview) {
3239 
3240  if (sd_view_id)
3241  ctx->next_view_id = *(int*)sd_view_id->data;
3242 
3243  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3244 
3245  if (sd_tdrdi) {
3247 
3248  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3249  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3250  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3251 
3252  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3253 
3254  for (i = 0; i < tdrdi->num_ref_displays &&
3255  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3256  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3257  ref_disp_info.leftViewId[i] = display->left_view_id;
3258  ref_disp_info.rightViewId[i] = display->right_view_id;
3259  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3260  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3261  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3262  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3263  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3264  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3265  }
3266 
3267  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3268  ctx->display_sei_sent = 1;
3269  } else if (!ctx->display_sei_sent) {
3270  ref_disp_info.precRefDisplayWidth = 31;
3271  ref_disp_info.leftViewId[0] = 0;
3272  ref_disp_info.rightViewId[0] = 1;
3273 
3274  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3275  ctx->display_sei_sent = 1;
3276  }
3277 
3278  ctx->next_view_id = !ctx->next_view_id;
3279  }
3280 #endif
3281 
3282  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3283  if (res < 0)
3284  return res;
3285 
3286  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3287  } else {
3288  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3289  }
3290 
3291  res = nvenc_push_context(avctx);
3292  if (res < 0)
3293  return res;
3294 
3295  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3296 
3297  for (i = 0; i < sei_count; i++)
3298  av_freep(&(ctx->sei_data[i].payload));
3299 
3300  res = nvenc_pop_context(avctx);
3301  if (res < 0)
3302  return res;
3303 
3304  if (nv_status != NV_ENC_SUCCESS &&
3305  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3306  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3307 
3308  if (frame && frame->buf[0]) {
3309  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3310 
3312  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3313  }
3314 
3315  /* all the pending buffers are now ready for output */
3316  if (nv_status == NV_ENC_SUCCESS) {
3317  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3318  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3319  }
3320 
3321  return 0;
3322 }
3323 
3325 {
3326  NvencSurface *tmp_out_surf;
3327  int res, res2;
3328 
3329  NvencContext *ctx = avctx->priv_data;
3330 
3331  AVFrame *frame = ctx->frame;
3332 
3333  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3334  return AVERROR(EINVAL);
3335 
3336  if (!frame->buf[0]) {
3337  res = ff_encode_get_frame(avctx, frame);
3338  if (res < 0 && res != AVERROR_EOF)
3339  return res;
3340  }
3341 
3342  res = nvenc_send_frame(avctx, frame);
3343  if (res < 0) {
3344  if (res != AVERROR(EAGAIN))
3345  return res;
3346  } else
3348 
3349  if (output_ready(avctx, avctx->internal->draining)) {
3350  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3351 
3352  res = nvenc_push_context(avctx);
3353  if (res < 0)
3354  return res;
3355 
3356  res = process_output_surface(avctx, pkt, tmp_out_surf);
3357 
3358  res2 = nvenc_pop_context(avctx);
3359  if (res2 < 0)
3360  return res2;
3361 
3362  if (res)
3363  return res;
3364 
3365  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3366  } else if (avctx->internal->draining) {
3367  return AVERROR_EOF;
3368  } else {
3369  return AVERROR(EAGAIN);
3370  }
3371 
3372  return 0;
3373 }
3374 
3376 {
3377  NvencContext *ctx = avctx->priv_data;
3378 
3379  nvenc_send_frame(avctx, NULL);
3380  av_fifo_reset2(ctx->timestamp_list);
3381  ctx->output_frame_num = 0;
3382  ctx->initial_delay_time = 0;
3383 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:85
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:88
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:205
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:201
level
uint8_t level
Definition: svq3.c:208
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:671
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1942
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:659
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:513
GUIDTuple
Definition: nvenc.c:200
GUIDTuple::flags
int flags
Definition: nvenc.c:202
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3456
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:204
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:396
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:200
AVPictureType
AVPictureType
Definition: avutil.h:276
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2863
NvencContext
Definition: nvenc.h:218
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1722
av_cold
#define av_cold
Definition: attributes.h:119
int64_t
long long int64_t
Definition: coverity.c:34
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:554
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:123
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:64
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2716
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:466
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:664
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:189
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2659
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:777
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:603
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:797
NvencFrameData
Definition: nvenc.h:133
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2987
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:208
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:701
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2651
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:59
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:213
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:907
NvencSurface
Definition: nvenc.h:120
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:621
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:188
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:180
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1259
nverr
NVENCSTATUS nverr
Definition: nvenc.c:133
NONE
#define NONE
Definition: vf_drawvg.c:262
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:1022
PRESET
#define PRESET(name,...)
Definition: nvenc.c:208
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:658
dummy
static int dummy
Definition: ffplay.c:3751
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3375
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:694
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1823
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:177
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:563
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:706
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2474
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:147
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:806
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:945
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:165
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:452
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:639
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:481
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:130
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1114
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:701
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:210
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:500
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2356
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:128
ff_encode_add_stats_side_data
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition: encode.c:972
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:264
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:498
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:63
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:52
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:657
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:324
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
to_nv_color_pri
#define to_nv_color_pri(n)
Definition: nvenc.c:348
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
P2
#define P2
Definition: cavsdsp.c:36
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:527
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:709
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2293
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1235
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:175
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:552
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1465
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:201
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1943
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:516
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:141
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
ctx
static AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2174
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2637
P1
#define P1
Definition: cavsdsp.c:37
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1288
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2642
av_mallocz
#define av_mallocz(s)
Definition: tableprint_vlc.h:31
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:628
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:144
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:282
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:127
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
AVCodecContext::codec_id
enum AVCodecID codec_id
Definition: avcodec.h:453
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:122
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1273
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:49
fail
#define fail
Definition: test.h:478
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:561
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:98
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:213
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:124
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:124
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:681
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:478
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:493
av_fallthrough
#define av_fallthrough
Definition: attributes.h:67
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2208
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:820
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:581
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:143
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:209
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1300
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:547
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:614
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:135
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:407
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1021
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:278
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:445
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:88
i
#define i(width, name, range_min, range_max)
Definition: cbs_h264.c:63
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:974
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2072
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:202
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:323
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:716
nvenc_errors
static const struct @229 nvenc_errors[]
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2420
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:477
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3324
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:602
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:511
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1036
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:609
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:190
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:620
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:622
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:297
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:616
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2345
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:790
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:419
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
av_malloc
#define av_malloc(s)
Definition: ops_asmgen.c:44
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:596
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:526
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2763
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:352
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1071
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:109
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:287
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2875
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:496
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:613
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1493
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:116
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:52
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:604
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:643
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:47
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:2032
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:604
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1471
NvencSurface::width
int width
Definition: nvenc.h:125
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:176
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:118
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:75
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1856
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:134
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:515
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:137
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:303
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AVCodecContext
main external API structure.
Definition: avcodec.h:443
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:105
NvencSurface::height
int height
Definition: nvenc.h:126
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1252
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1636
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2128
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:813
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:322
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:129
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2386
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:199
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2586
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:602
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:146
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:781
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:217
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:321
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1037
to_nv_color_matrix
#define to_nv_color_matrix(n)
Definition: nvenc.c:347
DEFAULT
#define DEFAULT
Definition: avdct.c:30
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:580
to_nv_color_trc
#define to_nv_color_trc(n)
Definition: nvenc.c:349
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:470
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:791
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1190
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:604
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:568
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:200
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:941
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:184
pkt
static AVPacket * pkt
Definition: demux_decode.c:55
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1806
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:628
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1496
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3151
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3376
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2742