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nvenc.c
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1/*
2 * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3 * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include "config.h"
23#include "config_components.h"
24
25#include "nvenc.h"
26#include "hevc/sei.h"
27#if CONFIG_AV1_NVENC_ENCODER
28#include "av1.h"
29#endif
30
32#include "libavutil/hwcontext.h"
34#include "libavutil/imgutils.h"
35#include "libavutil/mem.h"
36#include "libavutil/pixdesc.h"
40#include "libavutil/stereo3d.h"
41#include "libavutil/tdrdi.h"
42#include "atsc_a53.h"
43#include "codec_desc.h"
44#include "encode.h"
45#include "internal.h"
46
47#define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48
49#define NVENC_CAP 0x30
50
51#define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
52
58 AV_PIX_FMT_P012, // Truncated to 10bits
60 AV_PIX_FMT_P016, // Truncated to 10bits
61#ifdef NVENC_HAVE_422_SUPPORT
64 AV_PIX_FMT_P212, // Truncated to 10bits
66#endif
68 AV_PIX_FMT_YUV444P12MSB, // Truncated to 10bits
69 AV_PIX_FMT_YUV444P16, // Truncated to 10bits
71 AV_PIX_FMT_P412, // Truncated to 10bits
72 AV_PIX_FMT_P416, // Truncated to 10bits
81 AV_PIX_FMT_GBRP16, // Truncated to 10bits
83#ifdef NVENC_HAVE_CUDA_ARRAY_INPUT_SUPPORT
85#endif
86#if CONFIG_D3D11VA
88#endif
90};
91
93 HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
94#ifdef NVENC_HAVE_CUDA_ARRAY_INPUT_SUPPORT
95 HW_CONFIG_ENCODER_FRAMES(CUARRAY, CUDA),
96#endif
98#if CONFIG_D3D11VA
99 HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
101#endif
102 NULL,
103};
104
105#define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
106 pix_fmt == AV_PIX_FMT_P012 || \
107 pix_fmt == AV_PIX_FMT_P016 || \
108 pix_fmt == AV_PIX_FMT_P210 || \
109 pix_fmt == AV_PIX_FMT_P212 || \
110 pix_fmt == AV_PIX_FMT_P216 || \
111 pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
112 pix_fmt == AV_PIX_FMT_YUV444P12MSB || \
113 pix_fmt == AV_PIX_FMT_YUV444P16 || \
114 pix_fmt == AV_PIX_FMT_P410 || \
115 pix_fmt == AV_PIX_FMT_P412 || \
116 pix_fmt == AV_PIX_FMT_P416 || \
117 pix_fmt == AV_PIX_FMT_X2RGB10 || \
118 pix_fmt == AV_PIX_FMT_X2BGR10 || \
119 pix_fmt == AV_PIX_FMT_GBRP10MSB || \
120 pix_fmt == AV_PIX_FMT_GBRP16)
121
122#define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
123 pix_fmt == AV_PIX_FMT_RGB32 || \
124 pix_fmt == AV_PIX_FMT_0BGR32 || \
125 pix_fmt == AV_PIX_FMT_BGR32 || \
126 pix_fmt == AV_PIX_FMT_X2RGB10 || \
127 pix_fmt == AV_PIX_FMT_X2BGR10)
128
129#define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
130 pix_fmt == AV_PIX_FMT_NV24 || \
131 pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
132 pix_fmt == AV_PIX_FMT_YUV444P12MSB || \
133 pix_fmt == AV_PIX_FMT_YUV444P16 || \
134 pix_fmt == AV_PIX_FMT_P410 || \
135 pix_fmt == AV_PIX_FMT_P412 || \
136 pix_fmt == AV_PIX_FMT_P416 || \
137 pix_fmt == AV_PIX_FMT_GBRP || \
138 pix_fmt == AV_PIX_FMT_GBRP10MSB || \
139 pix_fmt == AV_PIX_FMT_GBRP16 || \
140 (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
141
142#define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
143 pix_fmt == AV_PIX_FMT_P210 || \
144 pix_fmt == AV_PIX_FMT_P212 || \
145 pix_fmt == AV_PIX_FMT_P216)
146
147#define IS_HWACCEL(pix_fmt) (pix_fmt == AV_PIX_FMT_CUDA || \
148 pix_fmt == AV_PIX_FMT_CUARRAY || \
149 pix_fmt == AV_PIX_FMT_D3D11)
150
151#define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
152 pix_fmt == AV_PIX_FMT_GBRP10MSB || \
153 pix_fmt == AV_PIX_FMT_GBRP16)
154
155static const struct {
156 NVENCSTATUS nverr;
157 int averr;
158 const char *desc;
159} nvenc_errors[] = {
160 { NV_ENC_SUCCESS, 0, "success" },
161 { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
162 { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
163 { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
164 { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
165 { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
166 { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
167 { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
168 { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
169 { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
170 { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
171 { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
172 { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
173 { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
174 { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
175 { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
176 { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
177 { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
178 { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
179 { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
180 { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
181 { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
182 { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
183 { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
184 { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
185 { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
187
188static int nvenc_map_error(NVENCSTATUS err, const char **desc)
189{
190 int i;
191 for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
192 if (nvenc_errors[i].nverr == err) {
193 if (desc)
194 *desc = nvenc_errors[i].desc;
195 return nvenc_errors[i].averr;
196 }
197 }
198 if (desc)
199 *desc = "unknown error";
200 return AVERROR_UNKNOWN;
201}
202
203static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
204 const char *error_string)
205{
206 NvencContext *ctx = avctx->priv_data;
207 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
208 const char *desc;
209 const char *details = "(no details)";
210 int ret = nvenc_map_error(err, &desc);
211
212 if (p_nvenc && ctx->nvencoder)
213 details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
214
215 av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
216
217 return ret;
218}
219
220typedef struct GUIDTuple {
221 const GUID guid;
222 int flags;
223} GUIDTuple;
224
225#define PRESET_ALIAS(alias, name, ...) \
226 [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
227
228#define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
229
231{
232 GUIDTuple presets[] = {
233 PRESET(P1),
234 PRESET(P2),
235 PRESET(P3),
236 PRESET(P4),
237 PRESET(P5),
238 PRESET(P6),
239 PRESET(P7),
243 };
244
245 GUIDTuple *t = &presets[ctx->preset];
246
247 ctx->init_encode_params.presetGUID = t->guid;
248 ctx->flags = t->flags;
249
250 if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
251 ctx->flags |= NVENC_LOSSLESS;
252}
253
254#undef PRESET
255#undef PRESET_ALIAS
256
258{
259#if NVENCAPI_CHECK_VERSION(13, 2)
260 const char *minver = "(unknown)";
261#elif NVENCAPI_CHECK_VERSION(13, 1)
262 const char *minver = "610.00";
263#elif NVENCAPI_CHECK_VERSION(13, 0)
264 const char *minver = "570.0";
265#elif NVENCAPI_CHECK_VERSION(12, 2)
266# if defined(_WIN32) || defined(__CYGWIN__)
267 const char *minver = "551.76";
268# else
269 const char *minver = "550.54.14";
270# endif
271#elif NVENCAPI_CHECK_VERSION(12, 1)
272# if defined(_WIN32) || defined(__CYGWIN__)
273 const char *minver = "531.61";
274# else
275 const char *minver = "530.41.03";
276# endif
277#elif NVENCAPI_CHECK_VERSION(12, 0)
278# if defined(_WIN32) || defined(__CYGWIN__)
279 const char *minver = "522.25";
280# else
281 const char *minver = "520.56.06";
282# endif
283#else
284# if defined(_WIN32) || defined(__CYGWIN__)
285 const char *minver = "471.41";
286# else
287 const char *minver = "470.57.02";
288# endif
289#endif
290 av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
291}
292
293#if NVENCAPI_CHECK_VERSION(12, 0)
294#define to_nv_color_matrix(n) (NV_ENC_VUI_MATRIX_COEFFS)(n)
295#define to_nv_color_pri(n) (NV_ENC_VUI_COLOR_PRIMARIES)(n)
296#define to_nv_color_trc(n) (NV_ENC_VUI_TRANSFER_CHARACTERISTIC)(n)
297#else
298#define to_nv_color_matrix(n) (uint32_t)(n)
299#define to_nv_color_pri(n) (uint32_t)(n)
300#define to_nv_color_trc(n) (uint32_t)(n)
301#endif
302
304{
305 NvencContext *ctx = avctx->priv_data;
306 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
307 NVENCSTATUS err;
308 uint32_t nvenc_max_ver;
309 int ret;
310
311 ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
312 if (ret < 0)
313 return ret;
314
315 ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
316 if (ret < 0) {
318 return ret;
319 }
320
321 err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
322 if (err != NV_ENC_SUCCESS)
323 return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
324
325 av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
326
327 if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
328 av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
329 "Required: %d.%d Found: %d.%d\n",
330 NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
331 nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
333 return AVERROR(ENOSYS);
334 }
335
336 dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
337
338 err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
339 if (err != NV_ENC_SUCCESS)
340 return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
341
342 av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
343
344 return 0;
345}
346
348{
349 NvencContext *ctx = avctx->priv_data;
350 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
351
352 if (ctx->d3d11_device)
353 return 0;
354
355 return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
356}
357
359{
360 NvencContext *ctx = avctx->priv_data;
361 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
362 CUcontext dummy;
363
364 if (ctx->d3d11_device)
365 return 0;
366
367 return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
368}
369
371{
372 NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
373 NvencContext *ctx = avctx->priv_data;
374 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
375 NVENCSTATUS ret;
376
377 params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
378 params.apiVersion = NVENCAPI_VERSION;
379 if (ctx->d3d11_device) {
380 params.device = ctx->d3d11_device;
381 params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
382 } else {
383 params.device = ctx->cu_context;
384 params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
385 }
386
387 ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
388 if (ret != NV_ENC_SUCCESS) {
389 ctx->nvencoder = NULL;
390 return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
391 }
392
393 return 0;
394}
395
397{
398 NvencContext *ctx = avctx->priv_data;
399 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
400 int i, ret, count = 0;
401 GUID *guids = NULL;
402
403 ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
404
405 if (ret != NV_ENC_SUCCESS || !count)
406 return AVERROR(ENOSYS);
407
408 guids = av_malloc(count * sizeof(GUID));
409 if (!guids)
410 return AVERROR(ENOMEM);
411
412 ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
413 if (ret != NV_ENC_SUCCESS) {
414 ret = AVERROR(ENOSYS);
415 goto fail;
416 }
417
418 ret = AVERROR(ENOSYS);
419 for (i = 0; i < count; i++) {
420 if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
421 ret = 0;
422 break;
423 }
424 }
425
426fail:
427 av_free(guids);
428
429 return ret;
430}
431
432static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
433{
434 NvencContext *ctx = avctx->priv_data;
435 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
436 NV_ENC_CAPS_PARAM params = { 0 };
437 int ret, val = 0;
438
439 params.version = NV_ENC_CAPS_PARAM_VER;
440 params.capsToQuery = cap;
441
442 ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
443
444 if (ret == NV_ENC_SUCCESS)
445 return val;
446 return 0;
447}
448
450{
451 NvencContext *ctx = avctx->priv_data;
452 int tmp, ret;
453
454 ret = nvenc_check_codec_support(avctx);
455 if (ret < 0) {
456 av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
457 return ret;
458 }
459
460 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
461 if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
462 av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
463 return AVERROR(ENOSYS);
464 }
465
466#ifdef NVENC_HAVE_422_SUPPORT
467 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
468#else
469 ret = 0;
470#endif
471 if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
472 av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
473 return AVERROR(ENOSYS);
474 }
475
476 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
477 if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
478 av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
479 return AVERROR(ENOSYS);
480 }
481
482 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
483 if (ret < avctx->width) {
484 av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
485 avctx->width, ret);
486 return AVERROR(ENOSYS);
487 }
488
489 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
490 if (ret < avctx->height) {
491 av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
492 avctx->height, ret);
493 return AVERROR(ENOSYS);
494 }
495
496 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
497 if (ret < avctx->max_b_frames) {
498 av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
499 avctx->max_b_frames, ret);
500
501 return AVERROR(ENOSYS);
502 }
503
504 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
505 if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
506 av_log(avctx, AV_LOG_WARNING,
507 "Interlaced encoding is not supported. Supported level: %d\n",
508 ret);
509 return AVERROR(ENOSYS);
510 }
511
512 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
513 if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
514 av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
515 return AVERROR(ENOSYS);
516 }
517
518 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
519 if (ctx->rc_lookahead > 0 && ret <= 0) {
520 av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
521 return AVERROR(ENOSYS);
522 }
523
524 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
525 if (ctx->temporal_aq > 0 && ret <= 0) {
526 av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
527 return AVERROR(ENOSYS);
528 }
529
530 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
531 if (ctx->weighted_pred > 0 && ret <= 0) {
532 av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
533 return AVERROR(ENOSYS);
534 }
535
536 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
537 if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
538 av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
539 return AVERROR(ENOSYS);
540 }
541
542 tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
543 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
544 switch (tmp) {
545 case NV_ENC_BFRAME_REF_MODE_DISABLED:
546 break;
547 case NV_ENC_BFRAME_REF_MODE_EACH:
548 if (!(ret & 1)) {
549 av_log(avctx, AV_LOG_WARNING, "Each B frame reference mode is not supported\n");
550 return AVERROR(ENOSYS);
551 }
552 break;
553 case NV_ENC_BFRAME_REF_MODE_MIDDLE:
554 if (!(ret & 2)) {
555 av_log(avctx, AV_LOG_WARNING, "Middle B frame reference mode is not supported\n");
556 return AVERROR(ENOSYS);
557 }
558 break;
559#ifdef NVENC_HAVE_AV1_HGOP_SUPPORT
560 case NV_ENC_BFRAME_REF_MODE_HIERARCHICAL:
561 if (!(ret & 4)) {
562 av_log(avctx, AV_LOG_WARNING, "Hierarchical B frame reference mode is not supported\n");
563 return AVERROR(ENOSYS);
564 }
565 break;
566#endif
567 default:
568 av_log(avctx, AV_LOG_ERROR, "Invalid b_ref_mode value %d\n", tmp);
569 return AVERROR(EINVAL);
570 }
571
572 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
573 if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
574 av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
575 return AVERROR(ENOSYS);
576 }
577
578 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
579 if(ctx->single_slice_intra_refresh && ret <= 0) {
580 av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
581 return AVERROR(ENOSYS);
582 }
583
584 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
585 if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
586 av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
587 return AVERROR(ENOSYS);
588 }
589
590 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
591 if(ctx->constrained_encoding && ret <= 0) {
592 av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
593 return AVERROR(ENOSYS);
594 }
595
596#if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
597 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
598 if(ctx->tf_level > 0 && ret <= 0) {
599 av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
600 return AVERROR(ENOSYS);
601 }
602#endif
603
604#ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
605 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
606 if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
607 ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
608 ctx->lookahead_level > ret)
609 {
610 av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
611 return AVERROR(ENOSYS);
612 }
613#endif
614
615#ifdef NVENC_HAVE_UNIDIR_B
616 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
617 if(ctx->unidir_b && ret <= 0) {
618 av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
619 return AVERROR(ENOSYS);
620 }
621#endif
622
623 ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
624
625#ifdef NVENC_HAVE_MVHEVC
626 ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
627 if (avctx->codec_id == AV_CODEC_ID_HEVC &&
628 ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN &&
629 !ctx->multiview_supported) {
630 av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
631 return AVERROR(ENOSYS);
632 }
633#endif
634
635 return 0;
636}
637
638static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
639{
640 NvencContext *ctx = avctx->priv_data;
641 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
642 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
643 char name[128] = { 0};
644 int major, minor, ret;
645 CUdevice cu_device;
646 int loglevel = AV_LOG_VERBOSE;
647
648 if (ctx->device == LIST_DEVICES)
649 loglevel = AV_LOG_INFO;
650
651 ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
652 if (ret < 0)
653 return ret;
654
655 ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
656 if (ret < 0)
657 return ret;
658
659 ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
660 if (ret < 0)
661 return ret;
662
663 av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
664 if (((major << 4) | minor) < NVENC_CAP) {
665 av_log(avctx, loglevel, "does not support NVENC\n");
666 goto fail;
667 }
668
669 if (ctx->device != idx && ctx->device != ANY_DEVICE)
670 return -1;
671
672 ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
673 if (ret < 0)
674 goto fail;
675
676 ctx->cu_context = ctx->cu_context_internal;
677 ctx->cu_stream = NULL;
678
679 if ((ret = nvenc_pop_context(avctx)) < 0)
680 goto fail2;
681
682 if ((ret = nvenc_open_session(avctx)) < 0)
683 goto fail2;
684
685 if ((ret = nvenc_check_capabilities(avctx)) < 0)
686 goto fail3;
687
688 av_log(avctx, loglevel, "supports NVENC\n");
689
690 dl_fn->nvenc_device_count++;
691
692 if (ctx->device == idx || ctx->device == ANY_DEVICE)
693 return 0;
694
695fail3:
696 if ((ret = nvenc_push_context(avctx)) < 0)
697 return ret;
698
699 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
700 ctx->nvencoder = NULL;
701
702 if ((ret = nvenc_pop_context(avctx)) < 0)
703 return ret;
704
705fail2:
706 CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
707 ctx->cu_context_internal = NULL;
708
709fail:
710 return AVERROR(ENOSYS);
711}
712
714{
715 NvencContext *ctx = avctx->priv_data;
716 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
717
718 switch (avctx->codec->id) {
719 case AV_CODEC_ID_H264:
720 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
721 break;
722 case AV_CODEC_ID_HEVC:
723 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
724 break;
725#if CONFIG_AV1_NVENC_ENCODER
726 case AV_CODEC_ID_AV1:
727 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
728 break;
729#endif
730 default:
731 return AVERROR_BUG;
732 }
733
735
736 if (IS_HWACCEL(avctx->pix_fmt) ||
737 avctx->hw_frames_ctx || avctx->hw_device_ctx) {
738 AVHWFramesContext *frames_ctx;
739 AVHWDeviceContext *hwdev_ctx;
740 AVCUDADeviceContext *cuda_device_hwctx = NULL;
741#if CONFIG_D3D11VA
742 AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
743#endif
744 int ret;
745
746 if (avctx->hw_frames_ctx) {
747 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
748 if (frames_ctx->format == AV_PIX_FMT_CUDA || frames_ctx->format == AV_PIX_FMT_CUARRAY)
749 cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
750#if CONFIG_D3D11VA
751 else if (frames_ctx->format == AV_PIX_FMT_D3D11)
752 d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
753#endif
754 else
755 return AVERROR(EINVAL);
756 } else if (avctx->hw_device_ctx) {
757 hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
758 if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
759 cuda_device_hwctx = hwdev_ctx->hwctx;
760#if CONFIG_D3D11VA
761 else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
762 d3d11_device_hwctx = hwdev_ctx->hwctx;
763#endif
764 else
765 return AVERROR(EINVAL);
766 } else {
767 return AVERROR(EINVAL);
768 }
769
770 if (cuda_device_hwctx) {
771 ctx->cu_context = cuda_device_hwctx->cuda_ctx;
772 ctx->cu_stream = cuda_device_hwctx->stream;
773 }
774#if CONFIG_D3D11VA
775 else if (d3d11_device_hwctx) {
776 ctx->d3d11_device = d3d11_device_hwctx->device;
777 ID3D11Device_AddRef(ctx->d3d11_device);
778 }
779#endif
780
781 ret = nvenc_open_session(avctx);
782 if (ret < 0)
783 return ret;
784
785 ret = nvenc_check_capabilities(avctx);
786 if (ret < 0) {
787 av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
788 return ret;
789 }
790 } else {
791 int i, nb_devices = 0;
792
793 if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
794 return AVERROR_UNKNOWN;
795
796 if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
797 return AVERROR_UNKNOWN;
798
799 if (!nb_devices) {
800 av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
801 return AVERROR_EXTERNAL;
802 }
803
804 av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
805
806 dl_fn->nvenc_device_count = 0;
807 for (i = 0; i < nb_devices; ++i) {
808 if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
809 return 0;
810 }
811
812 if (ctx->device == LIST_DEVICES)
813 return AVERROR_EXIT;
814
815 if (!dl_fn->nvenc_device_count) {
816 av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
817 return AVERROR_EXTERNAL;
818 }
819
820 av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
821 return AVERROR(EINVAL);
822 }
823
824 return 0;
825}
826
828{
829 NvencContext *ctx = avctx->priv_data;
830 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
831#if CONFIG_AV1_NVENC_ENCODER
832 int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
833#else
834 int qmax = 51;
835#endif
836
837 rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
838
839 if (ctx->init_qp_p >= 0) {
840 rc->constQP.qpInterP = ctx->init_qp_p;
841 if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
842 rc->constQP.qpIntra = ctx->init_qp_i;
843 rc->constQP.qpInterB = ctx->init_qp_b;
844 } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
845 rc->constQP.qpIntra = av_clip(
846 rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
847 rc->constQP.qpInterB = av_clip(
848 rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
849 } else {
850 rc->constQP.qpIntra = rc->constQP.qpInterP;
851 rc->constQP.qpInterB = rc->constQP.qpInterP;
852 }
853 } else if (ctx->cqp >= 0) {
854 rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
855 if (avctx->b_quant_factor != 0.0)
856 rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
857 if (avctx->i_quant_factor != 0.0)
858 rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
859 }
860
861 avctx->qmin = ctx->qmin = -1;
862 avctx->qmax = ctx->qmax = -1;
863}
864
865static av_cold void set_vbr(AVCodecContext *avctx)
866{
867 NvencContext *ctx = avctx->priv_data;
868 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
869 int qp_inter_p;
870#if CONFIG_AV1_NVENC_ENCODER
871 int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
872#else
873 int qmax = 51;
874#endif
875
876 if (avctx->qmin >= 0 || avctx->qmax >= 0)
877 av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
878
879 if (avctx->qmin >= 0 && ctx->qmin < 0)
880 ctx->qmin = avctx->qmin;
881 if (avctx->qmax >= 0 && ctx->qmax < 0)
882 ctx->qmax = avctx->qmax;
883 avctx->qmin = ctx->qmin;
884 avctx->qmax = ctx->qmax;
885
886 if (ctx->qmin >= 0 && ctx->qmax >= 0) {
887 rc->enableMinQP = 1;
888 rc->enableMaxQP = 1;
889
890 rc->minQP.qpInterB = ctx->qmin;
891 rc->minQP.qpInterP = ctx->qmin;
892 rc->minQP.qpIntra = ctx->qmin;
893
894 rc->maxQP.qpInterB = ctx->qmax;
895 rc->maxQP.qpInterP = ctx->qmax;
896 rc->maxQP.qpIntra = ctx->qmax;
897
898 qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
899 } else if (ctx->qmin >= 0) {
900 rc->enableMinQP = 1;
901
902 rc->minQP.qpInterB = ctx->qmin;
903 rc->minQP.qpInterP = ctx->qmin;
904 rc->minQP.qpIntra = ctx->qmin;
905
906 qp_inter_p = ctx->qmin;
907 } else {
908 qp_inter_p = 26; // default to 26
909 }
910
911 rc->enableInitialRCQP = 1;
912
913 if (ctx->init_qp_p < 0) {
914 rc->initialRCQP.qpInterP = qp_inter_p;
915 } else {
916 rc->initialRCQP.qpInterP = ctx->init_qp_p;
917 }
918
919 if (ctx->init_qp_i < 0) {
920 if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
921 rc->initialRCQP.qpIntra = av_clip(
922 rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
923 } else {
924 rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
925 }
926 } else {
927 rc->initialRCQP.qpIntra = ctx->init_qp_i;
928 }
929
930 if (ctx->init_qp_b < 0) {
931 if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
932 rc->initialRCQP.qpInterB = av_clip(
933 rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
934 } else {
935 rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
936 }
937 } else {
938 rc->initialRCQP.qpInterB = ctx->init_qp_b;
939 }
940}
941
943{
944 NvencContext *ctx = avctx->priv_data;
945 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
946
947 rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
948 rc->constQP.qpInterB = 0;
949 rc->constQP.qpInterP = 0;
950 rc->constQP.qpIntra = 0;
951
952 avctx->qmin = ctx->qmin = -1;
953 avctx->qmax = ctx->qmax = -1;
954}
955
957{
958 NvencContext *ctx = avctx->priv_data;
959 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
960
961 switch (ctx->rc) {
962 case NV_ENC_PARAMS_RC_CONSTQP:
963 set_constqp(avctx);
964 return;
965 case NV_ENC_PARAMS_RC_VBR:
966 set_vbr(avctx);
967 break;
968 case NV_ENC_PARAMS_RC_CBR:
969 break;
970 }
971
972 rc->rateControlMode = ctx->rc;
973}
974
976{
977 NvencContext *ctx = avctx->priv_data;
978 // default minimum of 4 surfaces
979 // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
980 // another multiply by 2 to avoid blocking next PBB group
981 int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
982
983 // lookahead enabled
984 if (ctx->rc_lookahead > 0) {
985 // +1 is to account for lkd_bound calculation later
986 // +4 is to allow sufficient pipelining with lookahead
987 nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
988 if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
989 {
990 av_log(avctx, AV_LOG_WARNING,
991 "Defined rc_lookahead requires more surfaces, "
992 "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
993 }
994 ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
995 } else {
996 if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
997 {
998 av_log(avctx, AV_LOG_WARNING,
999 "Defined b-frame requires more surfaces, "
1000 "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1001 ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1002 }
1003 else if (ctx->nb_surfaces <= 0)
1004 ctx->nb_surfaces = nb_surfaces;
1005 // otherwise use user specified value
1006 }
1007
1008 ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1009 ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1010
1011 // Output in the worst case will only start when the surface buffer is completely full.
1012 // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1013 ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1014
1015 return 0;
1016}
1017
1019{
1020 NvencContext *ctx = avctx->priv_data;
1021
1022 if (avctx->global_quality > 0) {
1023 av_log(avctx, AV_LOG_ERROR, "Using global_quality with nvenc is not supported. Use qp instead.\n");
1024 return AVERROR(EINVAL);
1025 }
1026
1027 if (avctx->bit_rate > 0) {
1028 ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1029 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1030 ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1031 }
1032
1033 if (avctx->rc_max_rate > 0)
1034 ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1035
1036 ctx->encode_config.rcParams.multiPass = ctx->multipass;
1037
1038 if (ctx->flags & NVENC_ONE_PASS)
1039 ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1040 if (ctx->flags & NVENC_TWO_PASSES)
1041 ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1042
1043 if (ctx->rc < 0) {
1044 if (ctx->cqp >= 0) {
1045 ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1046 } else if (ctx->quality >= 0.0f) {
1047 ctx->rc = NV_ENC_PARAMS_RC_VBR;
1048 }
1049 }
1050
1051 ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1052 ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1053
1054 if (avctx->codec->id == AV_CODEC_ID_AV1 &&
1055 ctx->qp_cr_offset != ctx->qp_cb_offset)
1056 av_log(avctx, AV_LOG_WARNING,
1057 "av1_nvenc: qp_cr_offset is currently ignored by the NVENC driver "
1058 "(deltaQ_v_ac is forced equal to deltaQ_u_ac); only qp_cb_offset "
1059 "takes effect.\n");
1060
1061 if (ctx->ldkfs)
1062 ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1063
1064 if (ctx->flags & NVENC_LOSSLESS) {
1065 set_lossless(avctx);
1066 } else if (ctx->rc >= 0) {
1068 } else {
1069 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1070 set_vbr(avctx);
1071 }
1072
1073 if (avctx->rc_buffer_size > 0) {
1074 ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1075 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1076 avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1077 }
1078
1079 if (ctx->aq) {
1080 ctx->encode_config.rcParams.enableAQ = 1;
1081 ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1082 av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1083 }
1084
1085 if (ctx->temporal_aq) {
1086 ctx->encode_config.rcParams.enableTemporalAQ = 1;
1087 av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1088 }
1089
1090 if (ctx->rc_lookahead > 0) {
1091 int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1092 ctx->encode_config.frameIntervalP - 4;
1093
1094 if (lkd_bound < 0) {
1095 ctx->encode_config.rcParams.enableLookahead = 0;
1096 av_log(avctx, AV_LOG_WARNING,
1097 "Lookahead not enabled. Increase buffer delay (-delay).\n");
1098 } else {
1099 ctx->encode_config.rcParams.enableLookahead = 1;
1100 ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1101 ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1102 ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1103 av_log(avctx, AV_LOG_VERBOSE,
1104 "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1105 ctx->encode_config.rcParams.lookaheadDepth,
1106 ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1107 ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1108 if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1109 av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1110 ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1111
1112#ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1113 if (ctx->lookahead_level >= 0) {
1114 switch (ctx->lookahead_level) {
1115 case NV_ENC_LOOKAHEAD_LEVEL_0:
1116 case NV_ENC_LOOKAHEAD_LEVEL_1:
1117 case NV_ENC_LOOKAHEAD_LEVEL_2:
1118 case NV_ENC_LOOKAHEAD_LEVEL_3:
1119 case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1120 break;
1121 default:
1122 av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1123 return AVERROR(EINVAL);
1124 }
1125
1126 ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1127 }
1128#endif
1129 }
1130 }
1131
1132 if (ctx->strict_gop) {
1133 ctx->encode_config.rcParams.strictGOPTarget = 1;
1134 av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1135 }
1136
1137 if (ctx->nonref_p)
1138 ctx->encode_config.rcParams.enableNonRefP = 1;
1139
1140 if (ctx->zerolatency)
1141 ctx->encode_config.rcParams.zeroReorderDelay = 1;
1142
1143 if (ctx->quality) {
1144 //convert from float to fixed point 8.8
1145 int tmp_quality = (int)(ctx->quality * 256.0f);
1146 ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1147 ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1148
1149 av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1150
1151 // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1152 ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1153 ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1154 ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1155 }
1156
1157 return 0;
1158}
1159
1161{
1162 NvencContext *ctx = avctx->priv_data;
1163 NV_ENC_CONFIG *cc = &ctx->encode_config;
1164 NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1165 NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1166
1167 const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1168
1169 if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1170 vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1171 vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1172 vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1173 vui->videoFullRangeFlag = 0;
1174 } else {
1175 vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1176 vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1177 vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1178 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1179 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1180 }
1181
1182 vui->colourDescriptionPresentFlag =
1183 (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1184
1185 vui->videoSignalTypePresentFlag =
1186 (vui->colourDescriptionPresentFlag
1187 || vui->videoFormat != 5
1188 || vui->videoFullRangeFlag != 0);
1189
1190 if (ctx->max_slice_size > 0) {
1191 h264->sliceMode = 1;
1192 h264->sliceModeData = ctx->max_slice_size;
1193 } else {
1194 h264->sliceMode = 3;
1195 h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1196 }
1197
1198 if (ctx->intra_refresh) {
1199 h264->enableIntraRefresh = 1;
1200 h264->intraRefreshPeriod = cc->gopLength;
1201 h264->intraRefreshCnt = cc->gopLength - 1;
1202 cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1203 h264->outputRecoveryPointSEI = 1;
1204 h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1205 }
1206
1207 if (ctx->constrained_encoding)
1208 h264->enableConstrainedEncoding = 1;
1209
1210 h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1211 h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1212 h264->outputAUD = ctx->aud;
1213
1214 if (ctx->dpb_size >= 0) {
1215 /* 0 means "let the hardware decide" */
1216 h264->maxNumRefFrames = ctx->dpb_size;
1217 }
1218
1219 h264->idrPeriod = cc->gopLength;
1220
1221 if (IS_CBR(cc->rcParams.rateControlMode)) {
1222 /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1223 h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1224
1225 h264->enableFillerDataInsertion = ctx->cbr_padding;
1226 }
1227
1228 h264->outputPictureTimingSEI = 1;
1229
1230 if (ctx->flags & NVENC_LOSSLESS) {
1231 h264->qpPrimeYZeroTransformBypassFlag = 1;
1232 } else {
1233 switch(ctx->profile) {
1235 cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1237 if (cc->frameIntervalP > 1) {
1238 av_log(avctx, AV_LOG_WARNING,
1239 "B-frames are not supported by H.264 Baseline profile, disabling.\n");
1240 cc->frameIntervalP = 1;
1241 }
1242 break;
1244 cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1246 break;
1248 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1250 break;
1251#ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1252 case NV_ENC_H264_PROFILE_HIGH_10:
1253 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1255 break;
1256#endif
1257#ifdef NVENC_HAVE_422_SUPPORT
1258 case NV_ENC_H264_PROFILE_HIGH_422:
1259 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1261 break;
1262#endif
1264 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1266 break;
1267 }
1268 }
1269
1270#ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1271 // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1272 if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1273 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1275 }
1276#endif
1277
1278 // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1279 if (IS_YUV444(ctx->data_pix_fmt)) {
1280 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1282 }
1283
1284#ifdef NVENC_HAVE_422_SUPPORT
1285 // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1286 if (IS_YUV422(ctx->data_pix_fmt)) {
1287 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1289 }
1290#endif
1291
1292 vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1293
1294 h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1295
1296 h264->level = ctx->level;
1297
1298#ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1299 h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1300 h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1301#endif
1302
1303 if (ctx->coder >= 0)
1304 h264->entropyCodingMode = ctx->coder;
1305
1306 if (ctx->b_ref_mode >= 0)
1307 h264->useBFramesAsRef = ctx->b_ref_mode;
1308
1309 h264->numRefL0 = avctx->refs;
1310 h264->numRefL1 = avctx->refs;
1311
1312#ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1313 if (ctx->tf_level >= 0) {
1314 h264->tfLevel = ctx->tf_level;
1315
1316 switch (ctx->tf_level)
1317 {
1318 case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1319 case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1320 break;
1321 default:
1322 av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1323 return AVERROR(EINVAL);
1324 }
1325
1326 if (ctx->encode_config.frameIntervalP < 5)
1327 av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1328 }
1329#endif
1330
1331#ifdef NVENC_HAVE_TIME_CODE
1332 if (ctx->s12m_tc)
1333 h264->enableTimeCode = 1;
1334#endif
1335
1336 return 0;
1337}
1338
1340{
1341 NvencContext *ctx = avctx->priv_data;
1342 NV_ENC_CONFIG *cc = &ctx->encode_config;
1343 NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1344 NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1345
1346 const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1347
1348 if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1349 vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1350 vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1351 vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1352 vui->videoFullRangeFlag = 0;
1353 } else {
1354 vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1355 vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1356 vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1357 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1358 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1359 }
1360
1361 vui->colourDescriptionPresentFlag =
1362 (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1363
1364 vui->videoSignalTypePresentFlag =
1365 (vui->colourDescriptionPresentFlag
1366 || vui->videoFormat != 5
1367 || vui->videoFullRangeFlag != 0);
1368
1369 if (ctx->max_slice_size > 0) {
1370 hevc->sliceMode = 1;
1371 hevc->sliceModeData = ctx->max_slice_size;
1372 } else {
1373 hevc->sliceMode = 3;
1374 hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1375 }
1376
1377 if (ctx->intra_refresh) {
1378 hevc->enableIntraRefresh = 1;
1379 hevc->intraRefreshPeriod = cc->gopLength;
1380 hevc->intraRefreshCnt = cc->gopLength - 1;
1381 cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1382#ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1383 hevc->outputRecoveryPointSEI = 1;
1384#endif
1385 hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1386 }
1387
1388#ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1389 ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1390 avctx->nb_decoded_side_data,
1392 ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1393 avctx->nb_decoded_side_data,
1395#endif
1396
1397 if (ctx->constrained_encoding)
1398 hevc->enableConstrainedEncoding = 1;
1399
1400 hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1401 hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1402 hevc->outputAUD = ctx->aud;
1403
1404 if (ctx->dpb_size >= 0) {
1405 /* 0 means "let the hardware decide" */
1406 hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1407 }
1408
1409 hevc->idrPeriod = cc->gopLength;
1410
1411 if (IS_CBR(cc->rcParams.rateControlMode)) {
1412 /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1413 hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1414
1415 hevc->enableFillerDataInsertion = ctx->cbr_padding;
1416 }
1417
1418 hevc->outputPictureTimingSEI = 1;
1419
1420#ifdef NVENC_HAVE_MVHEVC
1421 if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1424 const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1425
1426 if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1427 ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1428
1429 if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1430 stereo3d->type != AV_STEREO3D_2D &&
1431 stereo3d->type != AV_STEREO3D_UNSPEC &&
1432 stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1433 {
1434 av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1435 ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1436 }
1437 }
1438#endif
1439
1440 switch (ctx->profile) {
1442 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1444 break;
1446 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1448 break;
1450 cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1452 break;
1453#ifdef NVENC_HAVE_MVHEVC
1454 case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1455 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1457 ctx->multiview = 1;
1458
1459 hevc->enableMVHEVC = 1;
1460 hevc->outputHevc3DReferenceDisplayInfo = 1;
1461
1462 av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1463 break;
1464#endif
1465 }
1466
1467 // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1468 if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1469 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1471 }
1472
1473 // force setting profile as rext if input is yuv444 or yuv422
1474 if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1475 cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1477 }
1478
1479#ifdef NVENC_HAVE_MVHEVC
1480 if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1481 av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1482 return AVERROR(EINVAL);
1483 }
1484#endif
1485
1486 hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1487
1488#ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1489 hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1490 hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1491#else
1492 hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1493#endif
1494
1495 hevc->level = ctx->level;
1496
1497 hevc->tier = ctx->tier;
1498
1499 if (ctx->b_ref_mode >= 0)
1500 hevc->useBFramesAsRef = ctx->b_ref_mode;
1501
1502 hevc->numRefL0 = avctx->refs;
1503 hevc->numRefL1 = avctx->refs;
1504
1505#ifdef NVENC_HAVE_TEMPORAL_FILTER
1506 if (ctx->tf_level >= 0) {
1507 hevc->tfLevel = ctx->tf_level;
1508
1509 switch (ctx->tf_level)
1510 {
1511 case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1512 case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1513 break;
1514 default:
1515 av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1516 return AVERROR(EINVAL);
1517 }
1518
1519 if (ctx->encode_config.frameIntervalP < 5)
1520 av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1521 }
1522#endif
1523
1524 return 0;
1525}
1526
1527#if CONFIG_AV1_NVENC_ENCODER
1528static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1529{
1530 NvencContext *ctx = avctx->priv_data;
1531 NV_ENC_CONFIG *cc = &ctx->encode_config;
1532 NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1533
1534 const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1535
1536 if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1537 av1->matrixCoefficients = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1538 av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1539 av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1540 av1->colorRange = 0;
1541 } else {
1542 av1->matrixCoefficients = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1543 av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1544 av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1545 av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1546 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1547 }
1548
1549 if (IS_YUV444(ctx->data_pix_fmt)) {
1550 av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1551 return AVERROR(ENOTSUP);
1552 } else {
1553 cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1555 }
1556
1557 if (ctx->dpb_size >= 0) {
1558 /* 0 means "let the hardware decide" */
1559 av1->maxNumRefFramesInDPB = ctx->dpb_size;
1560 }
1561
1562 if (ctx->intra_refresh) {
1563 av1->enableIntraRefresh = 1;
1564 av1->intraRefreshPeriod = cc->gopLength;
1565 av1->intraRefreshCnt = cc->gopLength - 1;
1566 cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1567 }
1568
1569 av1->idrPeriod = cc->gopLength;
1570
1571 if (IS_CBR(cc->rcParams.rateControlMode)) {
1572 av1->enableBitstreamPadding = ctx->cbr_padding;
1573 }
1574
1575 if (ctx->tile_cols >= 0)
1576 av1->numTileColumns = ctx->tile_cols;
1577 if (ctx->tile_rows >= 0)
1578 av1->numTileRows = ctx->tile_rows;
1579
1580 av1->outputAnnexBFormat = 0;
1581
1582 av1->level = ctx->level;
1583 av1->tier = ctx->tier;
1584
1585 av1->enableTimingInfo = ctx->timing_info;
1586
1587 /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1588 av1->disableSeqHdr = 0;
1589 av1->repeatSeqHdr = 1;
1590
1591 av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1592
1593#ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1594 av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1595 av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1596#else
1597 av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1598 av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1599#endif
1600
1601#ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1602 ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1603 avctx->nb_decoded_side_data,
1605 ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1606 avctx->nb_decoded_side_data,
1608#endif
1609
1610 if (ctx->b_ref_mode >= 0)
1611 av1->useBFramesAsRef = ctx->b_ref_mode;
1612
1613 av1->numFwdRefs = avctx->refs;
1614 av1->numBwdRefs = avctx->refs;
1615
1616#ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1617 if (ctx->tf_level >= 0) {
1618 av1->tfLevel = ctx->tf_level;
1619
1620 switch (ctx->tf_level)
1621 {
1622 case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1623 case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1624 break;
1625 default:
1626 av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1627 return AVERROR(EINVAL);
1628 }
1629
1630 if (ctx->encode_config.frameIntervalP < 5)
1631 av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1632 }
1633#endif
1634
1635 return 0;
1636}
1637#endif
1638
1640{
1641 switch (avctx->codec->id) {
1642 case AV_CODEC_ID_H264:
1643 return nvenc_setup_h264_config(avctx);
1644 case AV_CODEC_ID_HEVC:
1645 return nvenc_setup_hevc_config(avctx);
1646#if CONFIG_AV1_NVENC_ENCODER
1647 case AV_CODEC_ID_AV1:
1648 return nvenc_setup_av1_config(avctx);
1649#endif
1650 /* Earlier switch/case will return if unknown codec is passed. */
1651 }
1652
1653 return 0;
1654}
1655
1656static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1657 int sw, sh;
1658
1659 sw = avctx->width;
1660 sh = avctx->height;
1661
1662#if CONFIG_AV1_NVENC_ENCODER
1663 if (avctx->codec->id == AV_CODEC_ID_AV1) {
1664 /* For AV1 we actually need to calculate the render width/height, not the dar */
1665 if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1666 && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1667 {
1668 if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1669 sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1670 } else {
1671 sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1672 }
1673 }
1674
1675 *dw = sw;
1676 *dh = sh;
1677 return;
1678 }
1679#endif
1680
1681 if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1682 sw *= avctx->sample_aspect_ratio.num;
1683 sh *= avctx->sample_aspect_ratio.den;
1684 }
1685
1686 av_reduce(dw, dh, sw, sh, 1024 * 1024);
1687}
1688
1690{
1691 NvencContext *ctx = avctx->priv_data;
1692 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1693 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1694
1695 NV_ENC_PRESET_CONFIG preset_config = { 0 };
1696 NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1697 AVCPBProperties *cpb_props;
1698 int res = 0;
1699 int dw, dh;
1700
1701 ctx->encode_config.version = NV_ENC_CONFIG_VER;
1702 ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1703
1704 ctx->init_encode_params.encodeHeight = avctx->height;
1705 ctx->init_encode_params.encodeWidth = avctx->width;
1706
1707 ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1708
1709 preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1710 preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1711
1712 ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1713
1714 if (ctx->flags & NVENC_LOSSLESS)
1715 ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1716 else if (ctx->flags & NVENC_LOWLATENCY)
1717 ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1718
1719 nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1720 ctx->init_encode_params.encodeGUID,
1721 ctx->init_encode_params.presetGUID,
1722 ctx->init_encode_params.tuningInfo,
1723 &preset_config);
1724 if (nv_status != NV_ENC_SUCCESS)
1725 return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1726
1727 memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1728
1729 ctx->encode_config.version = NV_ENC_CONFIG_VER;
1730
1731 compute_dar(avctx, &dw, &dh);
1732 ctx->init_encode_params.darHeight = dh;
1733 ctx->init_encode_params.darWidth = dw;
1734
1735 if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1736 ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1737 ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1738 } else {
1739 ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1740 ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1741 }
1742
1743#ifdef NVENC_HAVE_UNIDIR_B
1744 ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1745#endif
1746
1747 ctx->init_encode_params.enableEncodeAsync = 0;
1748 ctx->init_encode_params.enablePTD = 1;
1749
1750 /* If lookahead isn't set from CLI, use value from preset.
1751 * P6 & P7 presets may enable lookahead for better quality.
1752 * */
1753 if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1754 ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1755
1756 if (ctx->weighted_pred == 1)
1757 ctx->init_encode_params.enableWeightedPrediction = 1;
1758
1759#ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1760 ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1761
1762 if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1763 if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1764 av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1765 }
1766#endif
1767
1768 if (ctx->bluray_compat) {
1769 ctx->aud = 1;
1770 ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1771 avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1772 switch (avctx->codec->id) {
1773 case AV_CODEC_ID_H264:
1774 /* maximum level depends on used resolution */
1775 break;
1776 case AV_CODEC_ID_HEVC:
1777 ctx->level = NV_ENC_LEVEL_HEVC_51;
1778 ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1779 break;
1780 }
1781 }
1782
1783 if (avctx->gop_size > 0) {
1784 // only overwrite preset if a GOP size was selected as input
1785 ctx->encode_config.gopLength = avctx->gop_size;
1786 } else if (avctx->gop_size == 0) {
1787 ctx->encode_config.frameIntervalP = 0;
1788 ctx->encode_config.gopLength = 1;
1789 }
1790
1791 if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1792 /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1793 ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1794 }
1795
1796 /* force to enable intra refresh */
1797 if(ctx->single_slice_intra_refresh)
1798 ctx->intra_refresh = 1;
1799
1800 nvenc_recalc_surfaces(avctx);
1801
1802 res = nvenc_setup_rate_control(avctx);
1803 if (res < 0)
1804 return res;
1805
1806 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1807 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1808 } else {
1809 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1810 }
1811
1812 res = nvenc_setup_codec_config(avctx);
1813 if (res)
1814 return res;
1815
1816 res = nvenc_push_context(avctx);
1817 if (res < 0)
1818 return res;
1819
1820 nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1821 if (nv_status != NV_ENC_SUCCESS) {
1822 nvenc_pop_context(avctx);
1823 return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1824 }
1825
1826 if (ctx->cu_context) {
1827 nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1828 if (nv_status != NV_ENC_SUCCESS) {
1829 nvenc_pop_context(avctx);
1830 return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1831 }
1832 }
1833
1834 res = nvenc_pop_context(avctx);
1835 if (res < 0)
1836 return res;
1837
1838 if (ctx->encode_config.frameIntervalP > 1)
1839 avctx->has_b_frames = 2;
1840
1841 if (ctx->encode_config.rcParams.averageBitRate > 0)
1842 avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1843
1844 cpb_props = ff_encode_add_cpb_side_data(avctx);
1845 if (!cpb_props)
1846 return AVERROR(ENOMEM);
1847 cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1848 cpb_props->avg_bitrate = avctx->bit_rate;
1849 cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1850
1851 return 0;
1852}
1853
1854static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1855{
1856 switch (pix_fmt) {
1857 case AV_PIX_FMT_YUV420P:
1858 return NV_ENC_BUFFER_FORMAT_YV12;
1859 case AV_PIX_FMT_NV12:
1860 return NV_ENC_BUFFER_FORMAT_NV12;
1861 case AV_PIX_FMT_P010:
1862 case AV_PIX_FMT_P012:
1863 case AV_PIX_FMT_P016:
1864 return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1865 case AV_PIX_FMT_GBRP:
1866 case AV_PIX_FMT_YUV444P:
1867 return NV_ENC_BUFFER_FORMAT_YUV444;
1868 case AV_PIX_FMT_GBRP16:
1873 return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1874 case AV_PIX_FMT_0RGB32:
1875 case AV_PIX_FMT_RGB32:
1876 return NV_ENC_BUFFER_FORMAT_ARGB;
1877 case AV_PIX_FMT_0BGR32:
1878 case AV_PIX_FMT_BGR32:
1879 return NV_ENC_BUFFER_FORMAT_ABGR;
1880 case AV_PIX_FMT_X2RGB10:
1881 return NV_ENC_BUFFER_FORMAT_ARGB10;
1882 case AV_PIX_FMT_X2BGR10:
1883 return NV_ENC_BUFFER_FORMAT_ABGR10;
1884#ifdef NVENC_HAVE_422_SUPPORT
1885 case AV_PIX_FMT_NV16:
1886 return NV_ENC_BUFFER_FORMAT_NV16;
1887 case AV_PIX_FMT_P210:
1888 case AV_PIX_FMT_P212:
1889 case AV_PIX_FMT_P216:
1890 return NV_ENC_BUFFER_FORMAT_P210;
1891#endif
1892 default:
1893 return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1894 }
1895}
1896
1897static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1898{
1899 NvencContext *ctx = avctx->priv_data;
1900 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1901 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1902 NvencSurface* tmp_surface = &ctx->surfaces[idx];
1903
1904 NVENCSTATUS nv_status;
1905 NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1906 allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1907
1908 if (IS_HWACCEL(avctx->pix_fmt)) {
1909 ctx->surfaces[idx].in_ref = av_frame_alloc();
1910 if (!ctx->surfaces[idx].in_ref)
1911 return AVERROR(ENOMEM);
1912 } else {
1913 NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1914
1915 ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1916 if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1917 av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1918 av_get_pix_fmt_name(ctx->data_pix_fmt));
1919 return AVERROR(EINVAL);
1920 }
1921
1922 allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1923 allocSurf.width = avctx->width;
1924 allocSurf.height = avctx->height;
1925 allocSurf.bufferFmt = ctx->surfaces[idx].format;
1926
1927 nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1928 if (nv_status != NV_ENC_SUCCESS) {
1929 return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1930 }
1931
1932 ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1933 ctx->surfaces[idx].width = allocSurf.width;
1934 ctx->surfaces[idx].height = allocSurf.height;
1935 }
1936
1937 nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1938 if (nv_status != NV_ENC_SUCCESS) {
1939 int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1940 if (!IS_HWACCEL(avctx->pix_fmt))
1941 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1942 av_frame_free(&ctx->surfaces[idx].in_ref);
1943 return err;
1944 }
1945
1946 ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1947
1948 av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1949
1950 return 0;
1951}
1952
1954{
1955 NvencContext *ctx = avctx->priv_data;
1956 int i, res = 0, res2;
1957
1958 ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1959 if (!ctx->surfaces)
1960 return AVERROR(ENOMEM);
1961
1962 ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
1963 if (!ctx->frame_data_array)
1964 return AVERROR(ENOMEM);
1965
1966 ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
1967 sizeof(int64_t), 0);
1968 if (!ctx->timestamp_list)
1969 return AVERROR(ENOMEM);
1970
1971 ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1972 if (!ctx->unused_surface_queue)
1973 return AVERROR(ENOMEM);
1974
1975 ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1976 if (!ctx->output_surface_queue)
1977 return AVERROR(ENOMEM);
1978 ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1979 if (!ctx->output_surface_ready_queue)
1980 return AVERROR(ENOMEM);
1981
1982 res = nvenc_push_context(avctx);
1983 if (res < 0)
1984 return res;
1985
1986 for (i = 0; i < ctx->nb_surfaces; i++) {
1987 if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1988 goto fail;
1989 }
1990
1991fail:
1992 res2 = nvenc_pop_context(avctx);
1993 if (res2 < 0)
1994 return res2;
1995
1996 return res;
1997}
1998
2000{
2001 NvencContext *ctx = avctx->priv_data;
2002 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2003 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2004
2005 NVENCSTATUS nv_status;
2006 uint32_t outSize = 0;
2007 char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2008
2009 NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2010 payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2011
2012 payload.spsppsBuffer = tmpHeader;
2013 payload.inBufferSize = sizeof(tmpHeader);
2014 payload.outSPSPPSPayloadSize = &outSize;
2015
2016 nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2017 if (nv_status != NV_ENC_SUCCESS) {
2018 return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2019 }
2020
2021 avctx->extradata_size = outSize;
2023
2024 if (!avctx->extradata) {
2025 return AVERROR(ENOMEM);
2026 }
2027
2028 memcpy(avctx->extradata, tmpHeader, outSize);
2029
2030 return 0;
2031}
2032
2034{
2035 NvencContext *ctx = avctx->priv_data;
2036 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2037 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2038 int i, res;
2039
2040 /* the encoder has to be flushed before it can be closed */
2041 if (ctx->nvencoder) {
2042 NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2043 .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2044
2045 res = nvenc_push_context(avctx);
2046 if (res < 0)
2047 return res;
2048
2049 p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2050 }
2051
2052 av_fifo_freep2(&ctx->timestamp_list);
2053 av_fifo_freep2(&ctx->output_surface_ready_queue);
2054 av_fifo_freep2(&ctx->output_surface_queue);
2055 av_fifo_freep2(&ctx->unused_surface_queue);
2056
2057 if (ctx->frame_data_array) {
2058 for (i = 0; i < ctx->frame_data_array_nb; i++)
2059 av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2060 av_freep(&ctx->frame_data_array);
2061 }
2062
2063 if (ctx->surfaces && IS_HWACCEL(avctx->pix_fmt)) {
2064 for (i = 0; i < ctx->nb_registered_frames; i++) {
2065 if (ctx->registered_frames[i].mapped)
2066 p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2067 if (ctx->registered_frames[i].regptr)
2068 p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2069 }
2070 ctx->nb_registered_frames = 0;
2071 }
2072
2073 if (ctx->surfaces) {
2074 for (i = 0; i < ctx->nb_surfaces; ++i) {
2075 if (!IS_HWACCEL(avctx->pix_fmt))
2076 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2077 av_frame_free(&ctx->surfaces[i].in_ref);
2078 p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2079 }
2080 }
2081 av_freep(&ctx->surfaces);
2082 ctx->nb_surfaces = 0;
2083
2084 av_frame_free(&ctx->frame);
2085
2086 av_freep(&ctx->sei_data);
2087
2088 if (ctx->nvencoder) {
2089 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2090
2091 res = nvenc_pop_context(avctx);
2092 if (res < 0)
2093 return res;
2094 }
2095 ctx->nvencoder = NULL;
2096
2097 if (ctx->cu_context_internal)
2098 CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2099 ctx->cu_context = ctx->cu_context_internal = NULL;
2100
2101#if CONFIG_D3D11VA
2102 if (ctx->d3d11_device) {
2103 ID3D11Device_Release(ctx->d3d11_device);
2104 ctx->d3d11_device = NULL;
2105 }
2106#endif
2107
2108 nvenc_free_functions(&dl_fn->nvenc_dl);
2109 cuda_free_functions(&dl_fn->cuda_dl);
2110
2111 dl_fn->nvenc_device_count = 0;
2112
2113 av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2114
2115 return 0;
2116}
2117
2119{
2120 NvencContext *ctx = avctx->priv_data;
2121 int ret;
2122
2123 if (IS_HWACCEL(avctx->pix_fmt)) {
2124 AVHWFramesContext *frames_ctx;
2125 if (!avctx->hw_frames_ctx) {
2126 av_log(avctx, AV_LOG_ERROR,
2127 "hw_frames_ctx must be set when using GPU frames as input\n");
2128 return AVERROR(EINVAL);
2129 }
2130 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2131 if (frames_ctx->format != avctx->pix_fmt) {
2132 av_log(avctx, AV_LOG_ERROR,
2133 "hw_frames_ctx must match the GPU frame type\n");
2134 return AVERROR(EINVAL);
2135 }
2136 ctx->data_pix_fmt = frames_ctx->sw_format;
2137 } else {
2138 ctx->data_pix_fmt = avctx->pix_fmt;
2139 }
2140
2141 if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2142 av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2143 return AVERROR(EINVAL);
2144 }
2145
2146 ctx->frame = av_frame_alloc();
2147 if (!ctx->frame)
2148 return AVERROR(ENOMEM);
2149
2150 if ((ret = nvenc_load_libraries(avctx)) < 0)
2151 return ret;
2152
2153 if ((ret = nvenc_setup_device(avctx)) < 0)
2154 return ret;
2155
2156 if ((ret = nvenc_setup_encoder(avctx)) < 0)
2157 return ret;
2158
2159 if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2160 return ret;
2161
2162 if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2163 if ((ret = nvenc_setup_extradata(avctx)) < 0)
2164 return ret;
2165 }
2166
2167 return 0;
2168}
2169
2171{
2172 NvencSurface *tmp_surf;
2173
2174 if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2175 // queue empty
2176 return NULL;
2177
2178 return tmp_surf;
2179}
2180
2181static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2182 NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2183{
2184 int dst_linesize[4] = {
2185 lock_buffer_params->pitch,
2186 lock_buffer_params->pitch,
2187 lock_buffer_params->pitch,
2188 lock_buffer_params->pitch
2189 };
2190 uint8_t *dst_data[4];
2191 int ret;
2192
2193 if (frame->format == AV_PIX_FMT_YUV420P)
2194 dst_linesize[1] = dst_linesize[2] >>= 1;
2195
2196 ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2197 lock_buffer_params->bufferDataPtr, dst_linesize);
2198 if (ret < 0)
2199 return ret;
2200
2201 if (frame->format == AV_PIX_FMT_YUV420P)
2202 FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2203
2204 av_image_copy2(dst_data, dst_linesize,
2205 frame->data, frame->linesize, frame->format,
2206 avctx->width, avctx->height);
2207
2208 return 0;
2209}
2210
2212{
2213 NvencContext *ctx = avctx->priv_data;
2214 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2215 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2216 NVENCSTATUS nv_status;
2217
2218 int i, first_round;
2219
2220 if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2221 for (first_round = 1; first_round >= 0; first_round--) {
2222 for (i = 0; i < ctx->nb_registered_frames; i++) {
2223 if (!ctx->registered_frames[i].mapped) {
2224 if (ctx->registered_frames[i].regptr) {
2225 if (first_round)
2226 continue;
2227 nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2228 if (nv_status != NV_ENC_SUCCESS)
2229 return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2230 ctx->registered_frames[i].ptr = NULL;
2231 ctx->registered_frames[i].regptr = NULL;
2232 }
2233 return i;
2234 }
2235 }
2236 }
2237 } else {
2238 return ctx->nb_registered_frames++;
2239 }
2240
2241 av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2242 return AVERROR(ENOMEM);
2243}
2244
2246{
2247 NvencContext *ctx = avctx->priv_data;
2248 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2249 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2250
2251 AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2252 NV_ENC_REGISTER_RESOURCE reg = { 0 };
2253 int i, idx, ret;
2254
2255 for (i = 0; i < ctx->nb_registered_frames; i++) {
2256 if ((avctx->pix_fmt == AV_PIX_FMT_CUDA ||
2257 avctx->pix_fmt == AV_PIX_FMT_CUARRAY) &&
2258 ctx->registered_frames[i].ptr == frame->data[0])
2259 return i;
2260 else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2261 return i;
2262 }
2263
2264 idx = nvenc_find_free_reg_resource(avctx);
2265 if (idx < 0)
2266 return idx;
2267
2268 reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2269 reg.width = frames_ctx->width;
2270 reg.height = frames_ctx->height;
2271 reg.pitch = frame->linesize[0];
2272 reg.resourceToRegister = frame->data[0];
2273
2274 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2275 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2276#ifdef NVENC_HAVE_CUDA_ARRAY_INPUT_SUPPORT
2277 } else if (avctx->pix_fmt == AV_PIX_FMT_CUARRAY) {
2279 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDAARRAY;
2280 reg.pitch = frames_ctx->width * (desc && desc->comp[0].depth > 8 ? 2 : 1);
2281#endif
2282 }
2283 else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2284 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2285 reg.subResourceIndex = (intptr_t)frame->data[1];
2286 }
2287
2288 reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2289#ifdef NVENC_HAVE_CUDA_ARRAY_INPUT_SUPPORT
2290 if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED &&
2291 reg.resourceType == NV_ENC_INPUT_RESOURCE_TYPE_CUDAARRAY) {
2292 switch (frames_ctx->sw_format) {
2293 case AV_PIX_FMT_NV24:
2294 reg.bufferFormat = NV_ENC_BUFFER_FORMAT_YUV444;
2295 break;
2296 case AV_PIX_FMT_P410:
2297 case AV_PIX_FMT_P412:
2298 case AV_PIX_FMT_P416:
2299 reg.bufferFormat = NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2300 break;
2301 default:
2302 break;
2303 }
2304 }
2305#endif
2306 if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2307 av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2308 av_get_pix_fmt_name(frames_ctx->sw_format));
2309 return AVERROR(EINVAL);
2310 }
2311
2312 ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2313 if (ret != NV_ENC_SUCCESS) {
2314 nvenc_print_error(avctx, ret, "Error registering an input resource");
2315 return AVERROR_UNKNOWN;
2316 }
2317
2318 ctx->registered_frames[idx].ptr = frame->data[0];
2319 ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2320 ctx->registered_frames[idx].regptr = reg.registeredResource;
2321
2322 return idx;
2323}
2324
2326 NvencSurface *nvenc_frame)
2327{
2328 NvencContext *ctx = avctx->priv_data;
2329 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2330 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2331
2332 int res;
2333 NVENCSTATUS nv_status;
2334
2335 if (IS_HWACCEL(avctx->pix_fmt)) {
2336 int reg_idx = nvenc_register_frame(avctx, frame);
2337 if (reg_idx < 0) {
2338 av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2339 return reg_idx;
2340 }
2341
2342 res = av_frame_ref(nvenc_frame->in_ref, frame);
2343 if (res < 0)
2344 return res;
2345
2346 if (!ctx->registered_frames[reg_idx].mapped) {
2347 ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2348 ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2349 nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2350 if (nv_status != NV_ENC_SUCCESS) {
2351 av_frame_unref(nvenc_frame->in_ref);
2352 return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2353 }
2354 }
2355
2356 ctx->registered_frames[reg_idx].mapped += 1;
2357
2358 nvenc_frame->reg_idx = reg_idx;
2359 nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2360 nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2361 nvenc_frame->pitch = frame->linesize[0];
2362
2363 return 0;
2364 } else {
2365 NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2366
2367 lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2368 lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2369
2370 nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2371 if (nv_status != NV_ENC_SUCCESS) {
2372 return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2373 }
2374
2375 nvenc_frame->pitch = lockBufferParams.pitch;
2376 res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2377
2378 nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2379 if (nv_status != NV_ENC_SUCCESS) {
2380 return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2381 }
2382
2383 return res;
2384 }
2385}
2386
2387#ifdef NVENC_HAVE_TIME_CODE
2388static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2389{
2391
2392 if (sd) {
2393 uint32_t *tc = (uint32_t*)sd->data;
2394 int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2395
2396 switch (cnt) {
2397 case 0:
2398 time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2399 time_code->skipClockTimestampInsertion = 1;
2400 break;
2401 case 2:
2402 time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2403 break;
2404 case 3:
2405 time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2406 break;
2407 default:
2408 time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2409 break;
2410 }
2411
2412 for (int i = 0; i < cnt; i++) {
2413 unsigned hh, mm, ss, ff, drop;
2414 ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2415
2416#ifdef NVENC_NEW_COUNTING_TYPE
2417 time_code->clockTimestamp[i].countingTypeLSB = 0;
2418 time_code->clockTimestamp[i].countingTypeMSB = 0;
2419#else
2420 time_code->clockTimestamp[i].countingType = 0;
2421#endif
2422 time_code->clockTimestamp[i].discontinuityFlag = 0;
2423 time_code->clockTimestamp[i].cntDroppedFrames = drop;
2424 time_code->clockTimestamp[i].nFrames = ff;
2425 time_code->clockTimestamp[i].secondsValue = ss;
2426 time_code->clockTimestamp[i].minutesValue = mm;
2427 time_code->clockTimestamp[i].hoursValue = hh;
2428 time_code->clockTimestamp[i].timeOffset = 0;
2429 }
2430 } else {
2431 time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2432 time_code->skipClockTimestampInsertion = 1;
2433 }
2434}
2435#endif
2436
2438 NV_ENC_PIC_PARAMS *params,
2439 NV_ENC_SEI_PAYLOAD *sei_data,
2440 int sei_count)
2441{
2442 NvencContext *ctx = avctx->priv_data;
2443
2444 switch (avctx->codec->id) {
2445 case AV_CODEC_ID_H264:
2446 params->codecPicParams.h264PicParams.sliceMode =
2447 ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2448 params->codecPicParams.h264PicParams.sliceModeData =
2449 ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2450 if (sei_count > 0) {
2451 params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2452 params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2453 }
2454
2455#ifdef NVENC_HAVE_TIME_CODE
2456 if (ctx->s12m_tc)
2457 nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2458#endif
2459
2460 break;
2461 case AV_CODEC_ID_HEVC:
2462 params->codecPicParams.hevcPicParams.sliceMode =
2463 ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2464 params->codecPicParams.hevcPicParams.sliceModeData =
2465 ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2466 if (sei_count > 0) {
2467 params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2468 params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2469 }
2470
2471 break;
2472#if CONFIG_AV1_NVENC_ENCODER
2473 case AV_CODEC_ID_AV1:
2474 params->codecPicParams.av1PicParams.numTileColumns =
2475 ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2476 params->codecPicParams.av1PicParams.numTileRows =
2477 ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2478 if (sei_count > 0) {
2479 params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2480 params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2481 }
2482
2483 break;
2484#endif
2485 }
2486}
2487
2488static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2489{
2490 av_fifo_write(queue, &timestamp, 1);
2491}
2492
2494{
2495 int64_t timestamp = AV_NOPTS_VALUE;
2496 // The following call might fail if the queue is empty.
2497 av_fifo_read(queue, &timestamp, 1);
2498
2499 return timestamp;
2500}
2501
2502static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2503{
2504 int64_t timestamp = AV_NOPTS_VALUE;
2505 av_fifo_peek(queue, &timestamp, 1, index);
2506
2507 return timestamp;
2508}
2509
2511 NV_ENC_LOCK_BITSTREAM *params,
2512 AVPacket *pkt)
2513{
2514 NvencContext *ctx = avctx->priv_data;
2515 unsigned int delay;
2516 int64_t delay_time;
2517
2518 pkt->pts = params->outputTimeStamp;
2519
2520 if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2521 pkt->dts = pkt->pts;
2522 return 0;
2523 }
2524
2525 // This can be more than necessary, but we don't know the real reorder delay.
2526 delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2527#ifdef NVENC_HAVE_MVHEVC
2528 delay *= ctx->multiview ? 2 : 1;
2529#endif
2530 if (ctx->output_frame_num >= delay) {
2531 pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2532 ctx->output_frame_num++;
2533 return 0;
2534 }
2535
2536 delay_time = ctx->initial_delay_time;
2537 if (!delay_time) {
2538 int64_t t1, t2, t3;
2539 t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2540 t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2541 t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2542
2543 if (t1 != AV_NOPTS_VALUE) {
2544 delay_time = t1 - t2;
2545 } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2546 delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2547 avctx->time_base);
2548 } else if (t3 != AV_NOPTS_VALUE) {
2549 delay_time = delay * (t3 - t2);
2550 } else {
2551 delay_time = delay;
2552 }
2553 ctx->initial_delay_time = delay_time;
2554 }
2555
2556 /* The following method is simple, but doesn't guarantee monotonic with VFR
2557 * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2558 *
2559 * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2560 */
2561 pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2562 ctx->output_frame_num++;
2563
2564 return 0;
2565}
2566
2567static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2568{
2569 NvencContext *ctx = avctx->priv_data;
2570 int res = 0;
2571
2572 int idx = ctx->frame_data_array_pos;
2573 NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2574
2575 // in case the encoder got reconfigured, there might be leftovers
2576 av_buffer_unref(&frame_data->frame_opaque_ref);
2577
2578 if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2579 frame_data->frame_opaque_ref = av_buffer_ref(frame->opaque_ref);
2580 if (!frame_data->frame_opaque_ref)
2581 return AVERROR(ENOMEM);
2582 }
2583
2584 frame_data->duration = frame->duration;
2585 frame_data->frame_opaque = frame->opaque;
2586
2587 ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2588 pic_params->inputDuration = idx;
2589
2590 return res;
2591}
2592
2593static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2594{
2595 NvencContext *ctx = avctx->priv_data;
2596 int res = 0;
2597
2598 int idx = lock_params->outputDuration;
2599 NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2600
2601 pkt->duration = frame_data->duration;
2602
2603 if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2604 pkt->opaque = frame_data->frame_opaque;
2605 pkt->opaque_ref = frame_data->frame_opaque_ref;
2606 frame_data->frame_opaque_ref = NULL;
2607 }
2608
2609 av_buffer_unref(&frame_data->frame_opaque_ref);
2610
2611 return res;
2612}
2613
2615{
2616 NvencContext *ctx = avctx->priv_data;
2617 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2618 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2619
2620 NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2621 NVENCSTATUS nv_status;
2622 int res = 0;
2623
2624 enum AVPictureType pict_type;
2625
2626 lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2627
2628 lock_params.doNotWait = 0;
2629 lock_params.outputBitstream = tmpoutsurf->output_surface;
2630
2631 nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2632 if (nv_status != NV_ENC_SUCCESS) {
2633 res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2634 goto error;
2635 }
2636
2637 res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2638
2639 if (res < 0) {
2640 p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2641 goto error;
2642 }
2643
2644 memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2645
2646 nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2647 if (nv_status != NV_ENC_SUCCESS) {
2648 res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2649 goto error;
2650 }
2651
2652
2653 if (IS_HWACCEL(avctx->pix_fmt)) {
2654 ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2655 if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2656 nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2657 if (nv_status != NV_ENC_SUCCESS) {
2658 res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2659 goto error;
2660 }
2661 } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2662 res = AVERROR_BUG;
2663 goto error;
2664 }
2665
2666 av_frame_unref(tmpoutsurf->in_ref);
2667
2668 tmpoutsurf->input_surface = NULL;
2669 }
2670
2671 switch (lock_params.pictureType) {
2672 case NV_ENC_PIC_TYPE_IDR:
2673 pkt->flags |= AV_PKT_FLAG_KEY;
2675 case NV_ENC_PIC_TYPE_I:
2676 pict_type = AV_PICTURE_TYPE_I;
2677 break;
2678 case NV_ENC_PIC_TYPE_P:
2679 pict_type = AV_PICTURE_TYPE_P;
2680 break;
2681 case NV_ENC_PIC_TYPE_B:
2682 pict_type = AV_PICTURE_TYPE_B;
2683 break;
2684 case NV_ENC_PIC_TYPE_BI:
2685 pict_type = AV_PICTURE_TYPE_BI;
2686 break;
2687 default:
2688 av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2689 av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2690 res = AVERROR_EXTERNAL;
2691 goto error;
2692 }
2693
2695 (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2696
2697 res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2698 if (res < 0)
2699 goto error2;
2700
2701 res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2702 if (res < 0)
2703 goto error2;
2704
2705 return 0;
2706
2707error:
2708 timestamp_queue_dequeue(ctx->timestamp_list);
2709
2710error2:
2711 return res;
2712}
2713
2714static int output_ready(AVCodecContext *avctx, int flush)
2715{
2716 NvencContext *ctx = avctx->priv_data;
2717 int nb_ready, nb_pending;
2718
2719 nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2720 nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2721 if (flush)
2722 return nb_ready > 0;
2723 return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2724}
2725
2727{
2728 NvencContext *ctx = avctx->priv_data;
2729 int sei_count = 0;
2730 int i, res;
2731
2733 void *a53_data = NULL;
2734 size_t a53_size = 0;
2735
2736 if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2737 av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2738 }
2739
2740 if (a53_data) {
2741 void *tmp = av_fast_realloc(ctx->sei_data,
2742 &ctx->sei_data_size,
2743 (sei_count + 1) * sizeof(*ctx->sei_data));
2744 if (!tmp) {
2745 av_free(a53_data);
2746 res = AVERROR(ENOMEM);
2747 goto error;
2748 } else {
2749 ctx->sei_data = tmp;
2750 ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2751 ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2752
2753#if CONFIG_AV1_NVENC_ENCODER
2754 if (avctx->codec->id == AV_CODEC_ID_AV1)
2755 ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2756 else
2757#endif
2758 ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2759
2760 sei_count++;
2761 }
2762 }
2763 }
2764
2766 void *tc_data = NULL;
2767 size_t tc_size = 0;
2768
2769 if ((avctx->codec->id == AV_CODEC_ID_AV1 ?
2770 ff_alloc_timecode_metadata_av1(frame, avctx->framerate, &tc_data, &tc_size) :
2771 ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size)) < 0) {
2772 av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode, skipping\n");
2773 }
2774
2775 if (tc_data) {
2776 void *tmp = av_fast_realloc(ctx->sei_data,
2777 &ctx->sei_data_size,
2778 (sei_count + 1) * sizeof(*ctx->sei_data));
2779 if (!tmp) {
2780 av_free(tc_data);
2781 res = AVERROR(ENOMEM);
2782 goto error;
2783 } else {
2784 ctx->sei_data = tmp;
2785 ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2786 ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2787
2788#if CONFIG_AV1_NVENC_ENCODER
2789 if (avctx->codec->id == AV_CODEC_ID_AV1)
2790 ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2791 else
2792#endif
2793 ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2794
2795 sei_count++;
2796 }
2797 }
2798 }
2799
2800 if (!ctx->udu_sei)
2801 return sei_count;
2802
2803 for (i = 0; i < frame->nb_side_data; i++) {
2804 AVFrameSideData *side_data = frame->side_data[i];
2805 void *tmp;
2806
2807 if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2808 continue;
2809
2810 tmp = av_fast_realloc(ctx->sei_data,
2811 &ctx->sei_data_size,
2812 (sei_count + 1) * sizeof(*ctx->sei_data));
2813 if (!tmp) {
2814 res = AVERROR(ENOMEM);
2815 goto error;
2816 } else {
2817 ctx->sei_data = tmp;
2818 ctx->sei_data[sei_count].payloadSize = side_data->size;
2819 ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2820 ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2821
2822 if (!ctx->sei_data[sei_count].payload) {
2823 res = AVERROR(ENOMEM);
2824 goto error;
2825 }
2826
2827 sei_count++;
2828 }
2829 }
2830
2831 return sei_count;
2832
2833error:
2834 for (i = 0; i < sei_count; i++)
2835 av_freep(&(ctx->sei_data[i].payload));
2836
2837 return res;
2838}
2839
2841{
2842 NvencContext *ctx = avctx->priv_data;
2843 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2844 NVENCSTATUS ret;
2845
2846 NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2847 int needs_reconfig = 0;
2848 int needs_encode_config = 0;
2849 int reconfig_bitrate = 0, reconfig_dar = 0;
2850 int dw, dh;
2851
2852 params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2853 params.reInitEncodeParams = ctx->init_encode_params;
2854
2855 compute_dar(avctx, &dw, &dh);
2856 if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2857 av_log(avctx, AV_LOG_VERBOSE,
2858 "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2859 ctx->init_encode_params.darWidth,
2860 ctx->init_encode_params.darHeight, dw, dh);
2861
2862 params.reInitEncodeParams.darHeight = dh;
2863 params.reInitEncodeParams.darWidth = dw;
2864
2865 needs_reconfig = 1;
2866 reconfig_dar = 1;
2867 }
2868
2869 if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2870 if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2871 av_log(avctx, AV_LOG_VERBOSE,
2872 "avg bitrate change: %d -> %d\n",
2873 params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2874 (uint32_t)avctx->bit_rate);
2875
2876 params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2877 reconfig_bitrate = 1;
2878 }
2879
2880 if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2881 av_log(avctx, AV_LOG_VERBOSE,
2882 "max bitrate change: %d -> %d\n",
2883 params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2884 (uint32_t)avctx->rc_max_rate);
2885
2886 params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2887 reconfig_bitrate = 1;
2888 }
2889
2890 if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2891 av_log(avctx, AV_LOG_VERBOSE,
2892 "vbv buffer size change: %d -> %d\n",
2893 params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2894 avctx->rc_buffer_size);
2895
2896 params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2897 reconfig_bitrate = 1;
2898 }
2899
2900 if (reconfig_bitrate) {
2901 params.resetEncoder = 1;
2902 params.forceIDR = 1;
2903
2904 needs_encode_config = 1;
2905 needs_reconfig = 1;
2906 }
2907 }
2908
2909 if (!needs_encode_config)
2910 params.reInitEncodeParams.encodeConfig = NULL;
2911
2912 if (needs_reconfig) {
2913 ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2914 if (ret != NV_ENC_SUCCESS) {
2915 nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2916 } else {
2917 if (reconfig_dar) {
2918 ctx->init_encode_params.darHeight = dh;
2919 ctx->init_encode_params.darWidth = dw;
2920 }
2921
2922 if (reconfig_bitrate) {
2923 ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2924 ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2925 ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2926 }
2927
2928 }
2929 }
2930}
2931
2932#ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
2933static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
2934 MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
2935{
2936 NvencContext *ctx = avctx->priv_data;
2937
2938 if (ctx->mdm || ctx->cll) {
2941 const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
2942 const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
2943 const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
2944
2945 if (!sd_mdm)
2947 avctx->nb_decoded_side_data,
2949 if (!sd_cll)
2951 avctx->nb_decoded_side_data,
2953
2954 if (sd_mdm) {
2956
2957 mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
2958 mdm->display_primaries[0][0].den);
2959 mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
2960 mdm->display_primaries[0][1].den);
2961 mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
2962 mdm->display_primaries[1][0].den);
2963 mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
2964 mdm->display_primaries[1][1].den);
2965 mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
2966 mdm->display_primaries[2][0].den);
2967 mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
2968 mdm->display_primaries[2][1].den);
2969 mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
2970 mdm->white_point[0].den);
2971 mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
2972 mdm->white_point[1].den);
2973 mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
2974 mdm->max_luminance.den);
2975 mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
2976 mdm->min_luminance.den);
2977
2978 if (avctx->codec->id == AV_CODEC_ID_HEVC)
2979 pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
2980 else if (avctx->codec->id == AV_CODEC_ID_AV1)
2981 pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
2982 else
2983 return AVERROR_BUG;
2984 }
2985 if (sd_cll) {
2986 const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
2987
2988 content_light_level->maxContentLightLevel = cll->MaxCLL;
2989 content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
2990
2991 if (avctx->codec->id == AV_CODEC_ID_HEVC)
2992 pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
2993 else if (avctx->codec->id == AV_CODEC_ID_AV1)
2994 pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
2995 else
2996 return AVERROR_BUG;
2997 }
2998 }
2999
3000 return 0;
3001}
3002#endif
3003
3005{
3006 NVENCSTATUS nv_status;
3007 NvencSurface *tmp_out_surf, *in_surf;
3008 int res, res2;
3009 int sei_count = 0;
3010 int i;
3011#ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3012 MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3013 CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3014#endif
3015#ifdef NVENC_HAVE_MVHEVC
3016 HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3017#endif
3018
3019 NvencContext *ctx = avctx->priv_data;
3020 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3021 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3022
3023 NV_ENC_PIC_PARAMS pic_params = { 0 };
3024 pic_params.version = NV_ENC_PIC_PARAMS_VER;
3025
3026 if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3027 return AVERROR(EINVAL);
3028
3029 if (frame && frame->buf[0]) {
3030 in_surf = get_free_frame(ctx);
3031 if (!in_surf)
3032 return AVERROR(EAGAIN);
3033
3034 res = nvenc_push_context(avctx);
3035 if (res < 0)
3036 return res;
3037
3038 reconfig_encoder(avctx, frame);
3039
3040 res = nvenc_upload_frame(avctx, frame, in_surf);
3041
3042 res2 = nvenc_pop_context(avctx);
3043 if (res2 < 0)
3044 return res2;
3045
3046 if (res)
3047 return res;
3048
3049 pic_params.inputBuffer = in_surf->input_surface;
3050 pic_params.bufferFmt = in_surf->format;
3051 pic_params.inputWidth = in_surf->width;
3052 pic_params.inputHeight = in_surf->height;
3053 pic_params.inputPitch = in_surf->pitch;
3054 pic_params.outputBitstream = in_surf->output_surface;
3055
3056 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3058 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3059 else
3060 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3061 } else {
3062 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3063 }
3064
3065 if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3066 pic_params.encodePicFlags =
3067 ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3068 } else {
3069 pic_params.encodePicFlags = 0;
3070 }
3071
3072 pic_params.frameIdx = ctx->frame_idx_counter++;
3073 pic_params.inputTimeStamp = frame->pts;
3074
3075 if (ctx->extra_sei) {
3076 res = prepare_sei_data_array(avctx, frame);
3077 if (res < 0)
3078 return res;
3079 sei_count = res;
3080 }
3081
3082#ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3083 res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3084 if (res < 0)
3085 return res;
3086#endif
3087
3088#ifdef NVENC_HAVE_MVHEVC
3089 if (ctx->multiview) {
3092
3093 if (sd_view_id)
3094 ctx->next_view_id = *(int*)sd_view_id->data;
3095
3096 pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3097
3098 if (sd_tdrdi) {
3100
3101 ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3102 ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3103 ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3104
3105 ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3106
3107 for (i = 0; i < tdrdi->num_ref_displays &&
3108 i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3109 const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3110 ref_disp_info.leftViewId[i] = display->left_view_id;
3111 ref_disp_info.rightViewId[i] = display->right_view_id;
3112 ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3113 ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3114 ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3115 ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3116 ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3117 ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3118 }
3119
3120 pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3121 ctx->display_sei_sent = 1;
3122 } else if (!ctx->display_sei_sent) {
3123 ref_disp_info.precRefDisplayWidth = 31;
3124 ref_disp_info.leftViewId[0] = 0;
3125 ref_disp_info.rightViewId[0] = 1;
3126
3127 pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3128 ctx->display_sei_sent = 1;
3129 }
3130
3131 ctx->next_view_id = !ctx->next_view_id;
3132 }
3133#endif
3134
3135 res = nvenc_store_frame_data(avctx, &pic_params, frame);
3136 if (res < 0)
3137 return res;
3138
3139 nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3140 } else {
3141 pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3142 }
3143
3144 res = nvenc_push_context(avctx);
3145 if (res < 0)
3146 return res;
3147
3148 nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3149
3150 for (i = 0; i < sei_count; i++)
3151 av_freep(&(ctx->sei_data[i].payload));
3152
3153 res = nvenc_pop_context(avctx);
3154 if (res < 0)
3155 return res;
3156
3157 if (nv_status != NV_ENC_SUCCESS &&
3158 nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3159 return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3160
3161 if (frame && frame->buf[0]) {
3162 av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3163
3165 timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3166 }
3167
3168 /* all the pending buffers are now ready for output */
3169 if (nv_status == NV_ENC_SUCCESS) {
3170 while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3171 av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3172 }
3173
3174 return 0;
3175}
3176
3178{
3179 NvencSurface *tmp_out_surf;
3180 int res, res2;
3181
3182 NvencContext *ctx = avctx->priv_data;
3183
3184 AVFrame *frame = ctx->frame;
3185
3186 if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3187 return AVERROR(EINVAL);
3188
3189 if (!frame->buf[0]) {
3190 res = ff_encode_get_frame(avctx, frame);
3191 if (res < 0 && res != AVERROR_EOF)
3192 return res;
3193 }
3194
3195 res = nvenc_send_frame(avctx, frame);
3196 if (res < 0) {
3197 if (res != AVERROR(EAGAIN))
3198 return res;
3199 } else
3201
3202 if (output_ready(avctx, avctx->internal->draining)) {
3203 av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3204
3205 res = nvenc_push_context(avctx);
3206 if (res < 0)
3207 return res;
3208
3209 res = process_output_surface(avctx, pkt, tmp_out_surf);
3210
3211 res2 = nvenc_pop_context(avctx);
3212 if (res2 < 0)
3213 return res2;
3214
3215 if (res)
3216 return res;
3217
3218 av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3219 } else if (avctx->internal->draining) {
3220 return AVERROR_EOF;
3221 } else {
3222 return AVERROR(EAGAIN);
3223 }
3224
3225 return 0;
3226}
3227
3229{
3230 NvencContext *ctx = avctx->priv_data;
3231
3232 nvenc_send_frame(avctx, NULL);
3233 av_fifo_reset2(ctx->timestamp_list);
3234 ctx->output_frame_num = 0;
3235 ctx->initial_delay_time = 0;
3236}
SwsAArch64OpImplParams params
Definition ops.c:51
static double val(void *priv, double ch)
Definition aeval.c:77
static AVFormatContext * ctx
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition atsc_a53.c:26
#define flags(name, subs,...)
Definition cbs_h264.c:74
#define i(width, name, range_min, range_max)
Definition cbs_h264.c:63
#define ss(width, name, subs,...)
Definition cbs_vp9.c:202
#define av_clip
Definition common.h:100
#define NULL
Definition coverity.c:32
long long int64_t
Definition coverity.c:34
static __device__ float fabs(float a)
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition defs.h:163
#define AV_PROFILE_H264_MAIN
Definition defs.h:112
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition defs.h:122
#define AV_PROFILE_HEVC_REXT
Definition defs.h:162
#define AV_PROFILE_HEVC_MAIN
Definition defs.h:159
#define AV_PROFILE_HEVC_MAIN_10
Definition defs.h:160
#define AV_PROFILE_H264_HIGH
Definition defs.h:114
#define AV_PROFILE_H264_HIGH_10
Definition defs.h:115
#define AV_PROFILE_AV1_MAIN
Definition defs.h:169
#define AV_PROFILE_H264_HIGH_422
Definition defs.h:118
#define AV_PROFILE_H264_BASELINE
Definition defs.h:110
static AVPacket * pkt
static enum AVPixelFormat pix_fmt
static AVFrame * frame
void(* flush)(AVBSFContext *ctx)
Definition dts2pts.c:610
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition encode.c:106
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition encode.c:218
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition encode.c:1039
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition encode.c:1070
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition ffmpeg.c:491
static int dummy
Definition ffplay.c:3754
#define P7
#define P5
#define P6
#define P4
#define fail
Definition test.h:479
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition avcodec.h:310
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition avcodec.h:318
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition avcodec.h:279
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition codec_desc.h:92
@ AV_CODEC_ID_H264
Definition codec_id.h:77
@ AV_CODEC_ID_AV1
Definition codec_id.h:275
@ AV_CODEC_ID_HEVC
Definition codec_id.h:223
#define AV_INPUT_BUFFER_PADDING_SIZE
Required number of additionally allocated bytes at the end of the input bitstream for decoding.
Definition defs.h:40
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition packet.h:650
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition buffer.c:139
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition buffer.c:103
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition avutil.h:226
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition error.h:58
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition error.h:73
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition error.h:53
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition error.h:59
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition error.h:52
#define AVERROR_EOF
End of file.
Definition error.h:57
#define AVERROR(e)
Definition error.h:45
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition fifo.c:47
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition fifo.c:286
void av_fifo_reset2(AVFifo *f)
Definition fifo.c:280
size_t av_fifo_can_read(const AVFifo *f)
Definition fifo.c:87
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition fifo.c:255
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition fifo.c:188
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition fifo.c:240
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition frame.h:700
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition frame.c:496
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition frame.c:659
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition frame.c:278
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition frame.c:64
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition frame.c:52
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition frame.h:1196
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition frame.h:245
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition frame.h:137
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition frame.h:59
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition frame.h:178
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition frame.h:120
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition frame.h:256
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition frame.h:152
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition frame.h:64
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition log.h:216
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition log.h:204
#define AV_LOG_VERBOSE
Detailed information.
Definition log.h:226
#define AV_LOG_INFO
Standard information.
Definition log.h:221
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition log.h:210
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition rational.c:35
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition mem.c:495
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition mem.c:302
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition imgutils.c:145
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition imgutils.h:184
AVPictureType
Definition avutil.h:276
@ AV_PICTURE_TYPE_I
Intra.
Definition avutil.h:278
@ AV_PICTURE_TYPE_BI
BI type.
Definition avutil.h:284
@ AV_PICTURE_TYPE_P
Predicted.
Definition avutil.h:279
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition avutil.h:280
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition avutil.h:247
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition tdrdi.h:145
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition stereo3d.h:52
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition stereo3d.h:143
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition stereo3d.h:89
int index
Definition gxfenc.c:90
#define P3
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition hwconfig.h:97
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition hwconfig.h:100
@ AV_HWDEVICE_TYPE_D3D11VA
Definition hwcontext.h:35
@ AV_HWDEVICE_TYPE_CUDA
Definition hwcontext.h:30
An API-specific header for AV_HWDEVICE_TYPE_CUDA.
misc image utilities
AV1 common definitions.
@ AV1_METADATA_TYPE_TIMECODE
Definition av1.h:48
@ AV1_METADATA_TYPE_ITUT_T35
Definition av1.h:47
#define P1
Definition cavsdsp.c:37
#define P2
Definition cavsdsp.c:36
common internal api header.
int ff_alloc_timecode_metadata_av1(const AVFrame *frame, AVRational rate, void **data, size_t *size)
Definition utils.c:1044
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition utils.c:1005
#define av_fallthrough
Definition attributes.h:67
#define av_cold
Definition attributes.h:117
Stereoscopic video.
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
const char * desc
Definition libsvtav1.c:83
#define FFSWAP(type, a, b)
Definition macros.h:52
#define FFMIN(a, b)
Definition macros.h:49
#define FFMAX(a, b)
Definition macros.h:47
void * av_calloc(size_t nmemb, size_t size)
Definition mem.c:264
Memory handling functions.
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition nvenc.c:956
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition nvenc.c:303
static av_cold void set_constqp(AVCodecContext *avctx)
Definition nvenc.c:827
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition nvenc.c:1339
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition nvenc.c:432
static int nvenc_push_context(AVCodecContext *avctx)
Definition nvenc.c:347
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition nvenc.c:2118
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition nvenc.c:2170
#define to_nv_color_trc(n)
Definition nvenc.c:300
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition nvenc.c:638
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition nvenc.c:2211
#define to_nv_color_matrix(n)
Definition nvenc.c:298
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition nvenc.c:3177
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition nvenc.c:3004
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition nvenc.c:2437
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition nvenc.c:2840
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition nvenc.c:2614
#define IS_RGB(pix_fmt)
Definition nvenc.c:122
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition nvenc.c:2245
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition nvenc.c:975
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition nvenc.c:449
#define IS_GBRP(pix_fmt)
Definition nvenc.c:151
#define IS_YUV444(pix_fmt)
Definition nvenc.c:129
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition nvenc.c:92
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition nvenc.c:1999
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition nvenc.c:2488
NVENCSTATUS nverr
Definition nvenc.c:156
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition nvenc.c:1018
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition nvenc.c:2510
#define PRESET_ALIAS(alias, name,...)
Definition nvenc.c:225
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition nvenc.c:1854
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition nvenc.c:1639
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition nvenc.c:53
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition nvenc.c:1656
#define IS_YUV422(pix_fmt)
Definition nvenc.c:142
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition nvenc.c:188
static const struct @221142305270013126041350255341237163020260275372 nvenc_errors[]
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition nvenc.c:203
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition nvenc.c:370
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition nvenc.c:1953
static void nvenc_map_preset(NvencContext *ctx)
Definition nvenc.c:230
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition nvenc.c:2567
#define to_nv_color_pri(n)
Definition nvenc.c:299
#define IS_10BIT(pix_fmt)
Definition nvenc.c:105
static av_cold void set_lossless(AVCodecContext *avctx)
Definition nvenc.c:942
#define CHECK_CU(x)
Definition nvenc.c:47
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition nvenc.c:1897
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition nvenc.c:2502
#define IS_CBR(rc)
Definition nvenc.c:51
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition nvenc.c:2593
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition nvenc.c:2325
#define NVENC_CAP
Definition nvenc.c:49
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition nvenc.c:2033
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition nvenc.c:257
int averr
Definition nvenc.c:157
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition nvenc.c:396
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition nvenc.c:2181
static int nvenc_pop_context(AVCodecContext *avctx)
Definition nvenc.c:358
static av_cold void set_vbr(AVCodecContext *avctx)
Definition nvenc.c:865
#define PRESET(name,...)
Definition nvenc.c:228
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition nvenc.c:1160
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition nvenc.c:2493
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition nvenc.c:713
static int output_ready(AVCodecContext *avctx, int flush)
Definition nvenc.c:2714
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition nvenc.c:1689
#define IS_HWACCEL(pix_fmt)
Definition nvenc.c:147
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition nvenc.c:3228
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition nvenc.c:2726
@ NVENC_TWO_PASSES
Definition nvenc.h:155
@ NVENC_LOSSLESS
Definition nvenc.h:153
@ NVENC_LOWLATENCY
Definition nvenc.h:152
@ NVENC_ONE_PASS
Definition nvenc.h:154
@ NVENC_RGB_MODE_DISABLED
Definition nvenc.h:164
@ NV_ENC_H264_PROFILE_MAIN
Definition nvenc.h:129
@ NV_ENC_H264_PROFILE_HIGH
Definition nvenc.h:130
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition nvenc.h:137
@ NV_ENC_H264_PROFILE_BASELINE
Definition nvenc.h:128
@ LIST_DEVICES
Definition nvenc.h:159
@ ANY_DEVICE
Definition nvenc.h:160
@ NV_ENC_HEVC_PROFILE_REXT
Definition nvenc.h:143
@ NV_ENC_HEVC_PROFILE_MAIN
Definition nvenc.h:141
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition nvenc.h:142
#define MAX_REGISTERED_FRAMES
Definition nvenc.h:41
#define av_malloc(s)
Definition ops_static.c:52
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition pixdesc.c:3380
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition pixdesc.c:3460
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition pixdesc.h:136
#define AV_PIX_FMT_0RGB32
Definition pixfmt.h:521
#define AV_PIX_FMT_P212
Definition pixfmt.h:624
#define AV_PIX_FMT_P412
Definition pixfmt.h:625
@ AVCOL_RANGE_JPEG
Full range content.
Definition pixfmt.h:783
#define AV_PIX_FMT_P210
Definition pixfmt.h:622
#define AV_PIX_FMT_P012
Definition pixfmt.h:609
#define AV_PIX_FMT_P216
Definition pixfmt.h:626
#define AV_PIX_FMT_P010
Definition pixfmt.h:608
#define AV_PIX_FMT_P016
Definition pixfmt.h:610
#define AV_PIX_FMT_YUV444P12MSB
Definition pixfmt.h:561
#define AV_PIX_FMT_BGR32
Definition pixfmt.h:519
#define AV_PIX_FMT_X2RGB10
Definition pixfmt.h:619
#define AV_PIX_FMT_P410
Definition pixfmt.h:623
AVPixelFormat
Pixel format.
Definition pixfmt.h:71
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition pixfmt.h:96
@ AV_PIX_FMT_NONE
Definition pixfmt.h:72
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition pixfmt.h:73
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition pixfmt.h:260
@ AV_PIX_FMT_NV24
planar YUV 4:4:4, 24bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition pixfmt.h:371
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition pixfmt.h:198
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition pixfmt.h:78
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition pixfmt.h:336
@ AV_PIX_FMT_CUARRAY
hardware decoding through openharmony
Definition pixfmt.h:506
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition pixfmt.h:86
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition pixfmt.h:165
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition pixfmt.h:87
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition pixfmt.h:85
#define AV_PIX_FMT_P416
Definition pixfmt.h:627
#define AV_PIX_FMT_X2BGR10
Definition pixfmt.h:620
#define AV_PIX_FMT_GBRP16
Definition pixfmt.h:567
#define AV_PIX_FMT_GBRP10MSB
Definition pixfmt.h:574
#define AV_PIX_FMT_YUV444P16
Definition pixfmt.h:558
#define AV_PIX_FMT_YUV444P10MSB
Definition pixfmt.h:560
#define AV_PIX_FMT_0BGR32
Definition pixfmt.h:522
#define AV_PIX_FMT_RGB32
Definition pixfmt.h:517
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition pixfmt.h:712
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition pixfmt.h:707
const char * name
Definition qsvenc.c:142
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition sei.h:34
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition sei.h:35
@ SEI_TYPE_TIME_CODE
Definition sei.h:95
#define FF_ARRAY_ELEMS(a)
Data structure for single deference display information.
Definition tdrdi.h:100
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition tdrdi.h:135
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition tdrdi.h:129
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition tdrdi.h:104
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition tdrdi.h:141
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition tdrdi.h:119
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition tdrdi.h:114
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition tdrdi.h:109
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition tdrdi.h:124
This structure describes information about the reference display width(s) and reference viewing dista...
Definition tdrdi.h:53
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition tdrdi.h:72
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition tdrdi.h:58
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition tdrdi.h:65
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition tdrdi.h:78
uint8_t * data
The data buffer.
Definition buffer.h:90
This structure describes the bitrate properties of an encoded bitstream.
Definition defs.h:282
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition defs.h:297
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition defs.h:287
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition defs.h:303
This struct is allocated as AVHWDeviceContext.hwctx.
main external API structure.
Definition avcodec.h:443
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition avcodec.h:643
int width
picture width / height.
Definition avcodec.h:604
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition avcodec.h:1709
int rc_buffer_size
decoder bitstream buffer size
Definition avcodec.h:1273
int global_quality
Global quality for codecs which cannot change it per frame.
Definition avcodec.h:1235
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition avcodec.h:681
float b_quant_offset
qscale offset between IP and B-frames
Definition avcodec.h:797
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition avcodec.h:657
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition avcodec.h:1471
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition avcodec.h:781
int qmin
minimum quantizer
Definition avcodec.h:1252
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition avcodec.h:790
AVRational framerate
Definition avcodec.h:563
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition avcodec.h:628
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition avcodec.h:709
int64_t bit_rate
the average bitrate
Definition avcodec.h:493
const struct AVCodec * codec
Definition avcodec.h:452
int profile
profile
Definition avcodec.h:1636
int nb_decoded_side_data
Definition avcodec.h:1930
enum AVColorSpace colorspace
YUV colorspace type.
Definition avcodec.h:671
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition avcodec.h:1021
int refs
number of reference frames
Definition avcodec.h:701
int64_t rc_max_rate
maximum bitrate
Definition avcodec.h:1288
int qmax
maximum quantizer
Definition avcodec.h:1259
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition avcodec.h:664
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition avcodec.h:547
int flags
AV_CODEC_FLAG_*.
Definition avcodec.h:500
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition avcodec.h:1929
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition avcodec.h:526
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition avcodec.h:1493
enum AVCodecID codec_id
Definition avcodec.h:453
int extradata_size
Definition avcodec.h:527
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition avcodec.h:806
struct AVCodecInternal * internal
Private context used for internal data.
Definition avcodec.h:478
void * priv_data
Definition avcodec.h:470
float i_quant_offset
qscale offset between P and I-frames
Definition avcodec.h:813
int slices
Number of slices.
Definition avcodec.h:1037
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition codec_desc.h:54
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition internal.h:139
enum AVCodecID id
Definition codec.h:189
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
This struct is allocated as AVHWDeviceContext.hwctx.
ID3D11Device * device
Device used for texture creation and access.
Definition fifo.c:35
Structure to hold side data for an AVFrame.
Definition frame.h:327
enum AVFrameSideDataType type
Definition frame.h:328
size_t size
Definition frame.h:330
uint8_t * data
Definition frame.h:329
This structure describes decoded (raw) audio or video data.
Definition frame.h:472
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition hwcontext.h:63
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition hwcontext.h:88
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition hwcontext.h:75
This struct describes a set or pool of "hardware" frames (i.e.
Definition hwcontext.h:118
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition hwcontext.h:200
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition hwcontext.h:213
int width
The allocated dimensions of the frames in this pool.
Definition hwcontext.h:220
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition hwcontext.h:137
Mastering display metadata capable of representing the color volume of the display used to master the...
This structure stores compressed data.
Definition packet.h:580
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition pixdesc.h:69
uint64_t flags
Combination of AV_PIX_FMT_FLAG_... flags.
Definition pixdesc.h:94
Rational number (pair of numerator and denominator).
Definition rational.h:58
int num
Numerator.
Definition rational.h:59
int den
Denominator.
Definition rational.h:60
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition stereo3d.h:203
enum AVStereo3DType type
How views are packed within the video.
Definition stereo3d.h:207
const GUID guid
Definition nvenc.c:221
int flags
Definition nvenc.c:222
NvencFunctions * nvenc_dl
Definition nvenc.h:108
CudaFunctions * cuda_dl
Definition nvenc.h:107
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition nvenc.h:110
NV_ENC_OUTPUT_PTR output_surface
Definition nvenc.h:93
int width
Definition nvenc.h:89
AVFrame * in_ref
Definition nvenc.h:87
NV_ENC_BUFFER_FORMAT format
Definition nvenc.h:94
int reg_idx
Definition nvenc.h:88
int height
Definition nvenc.h:90
NV_ENC_INPUT_PTR input_surface
Definition nvenc.h:86
int pitch
Definition nvenc.h:91
uint8_t level
Definition svq3.c:208
#define av_free(p)
#define av_mallocz(s)
#define av_freep(p)
#define av_log(a,...)
static void error(const char *err)
Spherical video.
static uint8_t tmp[40]
Definition aes_ctr.c:52
#define height
Definition dsp.h:89
#define width
Definition dsp.h:89
Timecode helpers header.
#define NONE
Definition vf_drawvg.c:262
@ FAST
Definition vf_guided.c:32
static const Preset presets[]