FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 #include "hevc_sei.h"
26 
28 #include "libavutil/hwcontext.h"
29 #include "libavutil/cuda_check.h"
30 #include "libavutil/imgutils.h"
31 #include "libavutil/avassert.h"
32 #include "libavutil/mem.h"
33 #include "libavutil/pixdesc.h"
34 #include "atsc_a53.h"
35 #include "encode.h"
36 #include "internal.h"
37 #include "packet_internal.h"
38 
39 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
40 
41 #define NVENC_CAP 0x30
42 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
43  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
44  rc == NV_ENC_PARAMS_RC_CBR_HQ)
45 
51  AV_PIX_FMT_P016, // Truncated to 10bits
52  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
56  AV_PIX_FMT_GBRP16, // Truncated to 10bits
58 #if CONFIG_D3D11VA
60 #endif
62 };
63 
65  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
67 #if CONFIG_D3D11VA
68  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
70 #endif
71  NULL,
72 };
73 
74 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
75  pix_fmt == AV_PIX_FMT_P016 || \
76  pix_fmt == AV_PIX_FMT_YUV444P16 || \
77  pix_fmt == AV_PIX_FMT_GBRP16)
78 
79 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
80  pix_fmt == AV_PIX_FMT_YUV444P16 || \
81  pix_fmt == AV_PIX_FMT_GBRP || \
82  pix_fmt == AV_PIX_FMT_GBRP16)
83 
84 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
85  pix_fmt == AV_PIX_FMT_GBRP16)
86 
87 static const struct {
88  NVENCSTATUS nverr;
89  int averr;
90  const char *desc;
91 } nvenc_errors[] = {
92  { NV_ENC_SUCCESS, 0, "success" },
93  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
94  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
95  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
96  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
97  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
98  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
99  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
100  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
101  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
102  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
103  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
104  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
105  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
106  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
107  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
108  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
109  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
110  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
111  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
112  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
113  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
114  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
115  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
116  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
117  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
118 };
119 
120 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
121 {
122  int i;
123  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
124  if (nvenc_errors[i].nverr == err) {
125  if (desc)
126  *desc = nvenc_errors[i].desc;
127  return nvenc_errors[i].averr;
128  }
129  }
130  if (desc)
131  *desc = "unknown error";
132  return AVERROR_UNKNOWN;
133 }
134 
135 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
136  const char *error_string)
137 {
138  const char *desc;
139  const char *details = "(no details)";
140  int ret = nvenc_map_error(err, &desc);
141 
142 #ifdef NVENC_HAVE_GETLASTERRORSTRING
143  NvencContext *ctx = avctx->priv_data;
144  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
145 
146  if (p_nvenc && ctx->nvencoder)
147  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
148 #endif
149 
150  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
151 
152  return ret;
153 }
154 
156 {
157 #if NVENCAPI_CHECK_VERSION(11, 1)
158  const char *minver = "(unknown)";
159 #elif NVENCAPI_CHECK_VERSION(11, 0)
160 # if defined(_WIN32) || defined(__CYGWIN__)
161  const char *minver = "456.71";
162 # else
163  const char *minver = "455.28";
164 # endif
165 #elif NVENCAPI_CHECK_VERSION(10, 0)
166 # if defined(_WIN32) || defined(__CYGWIN__)
167  const char *minver = "450.51";
168 # else
169  const char *minver = "445.87";
170 # endif
171 #elif NVENCAPI_CHECK_VERSION(9, 1)
172 # if defined(_WIN32) || defined(__CYGWIN__)
173  const char *minver = "436.15";
174 # else
175  const char *minver = "435.21";
176 # endif
177 #elif NVENCAPI_CHECK_VERSION(9, 0)
178 # if defined(_WIN32) || defined(__CYGWIN__)
179  const char *minver = "418.81";
180 # else
181  const char *minver = "418.30";
182 # endif
183 #elif NVENCAPI_CHECK_VERSION(8, 2)
184 # if defined(_WIN32) || defined(__CYGWIN__)
185  const char *minver = "397.93";
186 # else
187  const char *minver = "396.24";
188 #endif
189 #elif NVENCAPI_CHECK_VERSION(8, 1)
190 # if defined(_WIN32) || defined(__CYGWIN__)
191  const char *minver = "390.77";
192 # else
193  const char *minver = "390.25";
194 # endif
195 #else
196 # if defined(_WIN32) || defined(__CYGWIN__)
197  const char *minver = "378.66";
198 # else
199  const char *minver = "378.13";
200 # endif
201 #endif
202  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
203 }
204 
206 {
207  NvencContext *ctx = avctx->priv_data;
209  NVENCSTATUS err;
210  uint32_t nvenc_max_ver;
211  int ret;
212 
213  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
214  if (ret < 0)
215  return ret;
216 
217  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
218  if (ret < 0) {
220  return ret;
221  }
222 
223  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
224  if (err != NV_ENC_SUCCESS)
225  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
226 
227  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
228 
229  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
230  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
231  "Required: %d.%d Found: %d.%d\n",
232  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
233  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
235  return AVERROR(ENOSYS);
236  }
237 
238  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
239 
240  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
241  if (err != NV_ENC_SUCCESS)
242  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
243 
244  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
245 
246  return 0;
247 }
248 
250 {
251  NvencContext *ctx = avctx->priv_data;
253 
254  if (ctx->d3d11_device)
255  return 0;
256 
257  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
258 }
259 
261 {
262  NvencContext *ctx = avctx->priv_data;
264  CUcontext dummy;
265 
266  if (ctx->d3d11_device)
267  return 0;
268 
269  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
270 }
271 
273 {
274  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
275  NvencContext *ctx = avctx->priv_data;
276  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
277  NVENCSTATUS ret;
278 
279  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
280  params.apiVersion = NVENCAPI_VERSION;
281  if (ctx->d3d11_device) {
282  params.device = ctx->d3d11_device;
283  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
284  } else {
285  params.device = ctx->cu_context;
286  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
287  }
288 
289  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
290  if (ret != NV_ENC_SUCCESS) {
291  ctx->nvencoder = NULL;
292  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
293  }
294 
295  return 0;
296 }
297 
299 {
300  NvencContext *ctx = avctx->priv_data;
301  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
302  int i, ret, count = 0;
303  GUID *guids = NULL;
304 
305  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
306 
307  if (ret != NV_ENC_SUCCESS || !count)
308  return AVERROR(ENOSYS);
309 
310  guids = av_malloc(count * sizeof(GUID));
311  if (!guids)
312  return AVERROR(ENOMEM);
313 
314  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
315  if (ret != NV_ENC_SUCCESS) {
316  ret = AVERROR(ENOSYS);
317  goto fail;
318  }
319 
320  ret = AVERROR(ENOSYS);
321  for (i = 0; i < count; i++) {
322  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
323  ret = 0;
324  break;
325  }
326  }
327 
328 fail:
329  av_free(guids);
330 
331  return ret;
332 }
333 
334 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
335 {
336  NvencContext *ctx = avctx->priv_data;
337  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
338  NV_ENC_CAPS_PARAM params = { 0 };
339  int ret, val = 0;
340 
341  params.version = NV_ENC_CAPS_PARAM_VER;
342  params.capsToQuery = cap;
343 
344  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
345 
346  if (ret == NV_ENC_SUCCESS)
347  return val;
348  return 0;
349 }
350 
352 {
353  NvencContext *ctx = avctx->priv_data;
354  int ret;
355 
356  ret = nvenc_check_codec_support(avctx);
357  if (ret < 0) {
358  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
359  return ret;
360  }
361 
362  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
363  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
364  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
365  return AVERROR(ENOSYS);
366  }
367 
368  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
369  if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
370  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
371  return AVERROR(ENOSYS);
372  }
373 
374  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
375  if (ret < avctx->width) {
376  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
377  avctx->width, ret);
378  return AVERROR(ENOSYS);
379  }
380 
381  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
382  if (ret < avctx->height) {
383  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
384  avctx->height, ret);
385  return AVERROR(ENOSYS);
386  }
387 
388  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
389  if (ret < avctx->max_b_frames) {
390  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
391  avctx->max_b_frames, ret);
392 
393  return AVERROR(ENOSYS);
394  }
395 
396  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
397  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
398  av_log(avctx, AV_LOG_WARNING,
399  "Interlaced encoding is not supported. Supported level: %d\n",
400  ret);
401  return AVERROR(ENOSYS);
402  }
403 
404  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
405  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
406  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
407  return AVERROR(ENOSYS);
408  }
409 
410  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
411  if (ctx->rc_lookahead > 0 && ret <= 0) {
412  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
413  return AVERROR(ENOSYS);
414  }
415 
416  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
417  if (ctx->temporal_aq > 0 && ret <= 0) {
418  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
419  return AVERROR(ENOSYS);
420  }
421 
422  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
423  if (ctx->weighted_pred > 0 && ret <= 0) {
424  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
425  return AVERROR(ENOSYS);
426  }
427 
428  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
429  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
430  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
431  return AVERROR(ENOSYS);
432  }
433 
434 #ifdef NVENC_HAVE_BFRAME_REF_MODE
435  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
436  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
437  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
438  return AVERROR(ENOSYS);
439  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
440  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
441  return AVERROR(ENOSYS);
442  }
443 #else
444  if (ctx->b_ref_mode != 0) {
445  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
446  return AVERROR(ENOSYS);
447  }
448 #endif
449 
450 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
451  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
452  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
453  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
454  return AVERROR(ENOSYS);
455  }
456 #else
457  if(avctx->refs != 0) {
458  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
459  return AVERROR(ENOSYS);
460  }
461 #endif
462 
463  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
464 
465  return 0;
466 }
467 
468 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
469 {
470  NvencContext *ctx = avctx->priv_data;
472  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
473  char name[128] = { 0};
474  int major, minor, ret;
475  CUdevice cu_device;
476  int loglevel = AV_LOG_VERBOSE;
477 
478  if (ctx->device == LIST_DEVICES)
479  loglevel = AV_LOG_INFO;
480 
481  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
482  if (ret < 0)
483  return ret;
484 
485  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
486  if (ret < 0)
487  return ret;
488 
489  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
490  if (ret < 0)
491  return ret;
492 
493  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
494  if (((major << 4) | minor) < NVENC_CAP) {
495  av_log(avctx, loglevel, "does not support NVENC\n");
496  goto fail;
497  }
498 
499  if (ctx->device != idx && ctx->device != ANY_DEVICE)
500  return -1;
501 
502  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
503  if (ret < 0)
504  goto fail;
505 
506  ctx->cu_context = ctx->cu_context_internal;
507  ctx->cu_stream = NULL;
508 
509  if ((ret = nvenc_pop_context(avctx)) < 0)
510  goto fail2;
511 
512  if ((ret = nvenc_open_session(avctx)) < 0)
513  goto fail2;
514 
515  if ((ret = nvenc_check_capabilities(avctx)) < 0)
516  goto fail3;
517 
518  av_log(avctx, loglevel, "supports NVENC\n");
519 
520  dl_fn->nvenc_device_count++;
521 
522  if (ctx->device == idx || ctx->device == ANY_DEVICE)
523  return 0;
524 
525 fail3:
526  if ((ret = nvenc_push_context(avctx)) < 0)
527  return ret;
528 
529  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
530  ctx->nvencoder = NULL;
531 
532  if ((ret = nvenc_pop_context(avctx)) < 0)
533  return ret;
534 
535 fail2:
536  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
537  ctx->cu_context_internal = NULL;
538 
539 fail:
540  return AVERROR(ENOSYS);
541 }
542 
544 {
545  NvencContext *ctx = avctx->priv_data;
547 
548  switch (avctx->codec->id) {
549  case AV_CODEC_ID_H264:
550  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
551  break;
552  case AV_CODEC_ID_HEVC:
553  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
554  break;
555  default:
556  return AVERROR_BUG;
557  }
558 
559  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
560  AVHWFramesContext *frames_ctx;
561  AVHWDeviceContext *hwdev_ctx;
562  AVCUDADeviceContext *cuda_device_hwctx = NULL;
563 #if CONFIG_D3D11VA
564  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
565 #endif
566  int ret;
567 
568  if (avctx->hw_frames_ctx) {
569  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
570  if (frames_ctx->format == AV_PIX_FMT_CUDA)
571  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
572 #if CONFIG_D3D11VA
573  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
574  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
575 #endif
576  else
577  return AVERROR(EINVAL);
578  } else if (avctx->hw_device_ctx) {
579  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
580  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
581  cuda_device_hwctx = hwdev_ctx->hwctx;
582 #if CONFIG_D3D11VA
583  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
584  d3d11_device_hwctx = hwdev_ctx->hwctx;
585 #endif
586  else
587  return AVERROR(EINVAL);
588  } else {
589  return AVERROR(EINVAL);
590  }
591 
592  if (cuda_device_hwctx) {
593  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
594  ctx->cu_stream = cuda_device_hwctx->stream;
595  }
596 #if CONFIG_D3D11VA
597  else if (d3d11_device_hwctx) {
598  ctx->d3d11_device = d3d11_device_hwctx->device;
599  ID3D11Device_AddRef(ctx->d3d11_device);
600  }
601 #endif
602 
603  ret = nvenc_open_session(avctx);
604  if (ret < 0)
605  return ret;
606 
607  ret = nvenc_check_capabilities(avctx);
608  if (ret < 0) {
609  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
610  return ret;
611  }
612  } else {
613  int i, nb_devices = 0;
614 
615  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
616  return AVERROR_UNKNOWN;
617 
618  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
619  return AVERROR_UNKNOWN;
620 
621  if (!nb_devices) {
622  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
623  return AVERROR_EXTERNAL;
624  }
625 
626  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
627 
628  dl_fn->nvenc_device_count = 0;
629  for (i = 0; i < nb_devices; ++i) {
630  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
631  return 0;
632  }
633 
634  if (ctx->device == LIST_DEVICES)
635  return AVERROR_EXIT;
636 
637  if (!dl_fn->nvenc_device_count) {
638  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
639  return AVERROR_EXTERNAL;
640  }
641 
642  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
643  return AVERROR(EINVAL);
644  }
645 
646  return 0;
647 }
648 
649 typedef struct GUIDTuple {
650  const GUID guid;
651  int flags;
652 } GUIDTuple;
653 
654 #define PRESET_ALIAS(alias, name, ...) \
655  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
656 
657 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
658 
660 {
661  GUIDTuple presets[] = {
662 #ifdef NVENC_HAVE_NEW_PRESETS
663  PRESET(P1),
664  PRESET(P2),
665  PRESET(P3),
666  PRESET(P4),
667  PRESET(P5),
668  PRESET(P6),
669  PRESET(P7),
670  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
671  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
673  // Compat aliases
678  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
681  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
683 #else
684  PRESET(DEFAULT),
685  PRESET(HP),
686  PRESET(HQ),
687  PRESET(BD),
688  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
689  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
690  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
691  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
692  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
693  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
694  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
695  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
696 #endif
697  };
698 
699  GUIDTuple *t = &presets[ctx->preset];
700 
701  ctx->init_encode_params.presetGUID = t->guid;
702  ctx->flags = t->flags;
703 }
704 
705 #undef PRESET
706 #undef PRESET_ALIAS
707 
708 static av_cold void set_constqp(AVCodecContext *avctx)
709 {
710  NvencContext *ctx = avctx->priv_data;
711  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
712 
713  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
714 
715  if (ctx->init_qp_p >= 0) {
716  rc->constQP.qpInterP = ctx->init_qp_p;
717  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
718  rc->constQP.qpIntra = ctx->init_qp_i;
719  rc->constQP.qpInterB = ctx->init_qp_b;
720  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
721  rc->constQP.qpIntra = av_clip(
722  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
723  rc->constQP.qpInterB = av_clip(
724  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
725  } else {
726  rc->constQP.qpIntra = rc->constQP.qpInterP;
727  rc->constQP.qpInterB = rc->constQP.qpInterP;
728  }
729  } else if (ctx->cqp >= 0) {
730  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
731  if (avctx->b_quant_factor != 0.0)
732  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
733  if (avctx->i_quant_factor != 0.0)
734  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
735  }
736 
737  avctx->qmin = -1;
738  avctx->qmax = -1;
739 }
740 
741 static av_cold void set_vbr(AVCodecContext *avctx)
742 {
743  NvencContext *ctx = avctx->priv_data;
744  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
745  int qp_inter_p;
746 
747  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
748  rc->enableMinQP = 1;
749  rc->enableMaxQP = 1;
750 
751  rc->minQP.qpInterB = avctx->qmin;
752  rc->minQP.qpInterP = avctx->qmin;
753  rc->minQP.qpIntra = avctx->qmin;
754 
755  rc->maxQP.qpInterB = avctx->qmax;
756  rc->maxQP.qpInterP = avctx->qmax;
757  rc->maxQP.qpIntra = avctx->qmax;
758 
759  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
760  } else if (avctx->qmin >= 0) {
761  rc->enableMinQP = 1;
762 
763  rc->minQP.qpInterB = avctx->qmin;
764  rc->minQP.qpInterP = avctx->qmin;
765  rc->minQP.qpIntra = avctx->qmin;
766 
767  qp_inter_p = avctx->qmin;
768  } else {
769  qp_inter_p = 26; // default to 26
770  }
771 
772  rc->enableInitialRCQP = 1;
773 
774  if (ctx->init_qp_p < 0) {
775  rc->initialRCQP.qpInterP = qp_inter_p;
776  } else {
777  rc->initialRCQP.qpInterP = ctx->init_qp_p;
778  }
779 
780  if (ctx->init_qp_i < 0) {
781  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
782  rc->initialRCQP.qpIntra = av_clip(
783  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
784  } else {
785  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
786  }
787  } else {
788  rc->initialRCQP.qpIntra = ctx->init_qp_i;
789  }
790 
791  if (ctx->init_qp_b < 0) {
792  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
793  rc->initialRCQP.qpInterB = av_clip(
794  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
795  } else {
796  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
797  }
798  } else {
799  rc->initialRCQP.qpInterB = ctx->init_qp_b;
800  }
801 }
802 
804 {
805  NvencContext *ctx = avctx->priv_data;
806  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
807 
808  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
809  rc->constQP.qpInterB = 0;
810  rc->constQP.qpInterP = 0;
811  rc->constQP.qpIntra = 0;
812 
813  avctx->qmin = -1;
814  avctx->qmax = -1;
815 }
816 
818 {
819  NvencContext *ctx = avctx->priv_data;
820  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
821 
822  switch (ctx->rc) {
823  case NV_ENC_PARAMS_RC_CONSTQP:
824  set_constqp(avctx);
825  return;
826  case NV_ENC_PARAMS_RC_VBR_MINQP:
827  if (avctx->qmin < 0) {
828  av_log(avctx, AV_LOG_WARNING,
829  "The variable bitrate rate-control requires "
830  "the 'qmin' option set.\n");
831  set_vbr(avctx);
832  return;
833  }
834  /* fall through */
835  case NV_ENC_PARAMS_RC_VBR_HQ:
836  case NV_ENC_PARAMS_RC_VBR:
837  set_vbr(avctx);
838  break;
839  case NV_ENC_PARAMS_RC_CBR:
840  case NV_ENC_PARAMS_RC_CBR_HQ:
841  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
842  break;
843  }
844 
845  rc->rateControlMode = ctx->rc;
846 }
847 
849 {
850  NvencContext *ctx = avctx->priv_data;
851  // default minimum of 4 surfaces
852  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
853  // another multiply by 2 to avoid blocking next PBB group
854  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
855 
856  // lookahead enabled
857  if (ctx->rc_lookahead > 0) {
858  // +1 is to account for lkd_bound calculation later
859  // +4 is to allow sufficient pipelining with lookahead
860  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
861  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
862  {
863  av_log(avctx, AV_LOG_WARNING,
864  "Defined rc_lookahead requires more surfaces, "
865  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
866  }
867  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
868  } else {
869  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
870  {
871  av_log(avctx, AV_LOG_WARNING,
872  "Defined b-frame requires more surfaces, "
873  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
874  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
875  }
876  else if (ctx->nb_surfaces <= 0)
877  ctx->nb_surfaces = nb_surfaces;
878  // otherwise use user specified value
879  }
880 
882  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
883 
884  return 0;
885 }
886 
888 {
889  NvencContext *ctx = avctx->priv_data;
890 
891  if (avctx->global_quality > 0)
892  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
893 
894  if (ctx->cqp < 0 && avctx->global_quality > 0)
895  ctx->cqp = avctx->global_quality;
896 
897  if (avctx->bit_rate > 0) {
898  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
899  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
900  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
901  }
902 
903  if (avctx->rc_max_rate > 0)
904  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
905 
906 #ifdef NVENC_HAVE_MULTIPASS
907  ctx->encode_config.rcParams.multiPass = ctx->multipass;
908 
909  if (ctx->flags & NVENC_ONE_PASS)
910  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
911  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
912  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
913 
914  if (ctx->rc < 0) {
915  if (ctx->cbr) {
916  ctx->rc = NV_ENC_PARAMS_RC_CBR;
917  } else if (ctx->cqp >= 0) {
918  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
919  } else if (ctx->quality >= 0.0f) {
920  ctx->rc = NV_ENC_PARAMS_RC_VBR;
921  }
922  }
923 #else
924  if (ctx->rc < 0) {
925  if (ctx->flags & NVENC_ONE_PASS)
926  ctx->twopass = 0;
927  if (ctx->flags & NVENC_TWO_PASSES)
928  ctx->twopass = 1;
929 
930  if (ctx->twopass < 0)
931  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
932 
933  if (ctx->cbr) {
934  if (ctx->twopass) {
935  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
936  } else {
937  ctx->rc = NV_ENC_PARAMS_RC_CBR;
938  }
939  } else if (ctx->cqp >= 0) {
940  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
941  } else if (ctx->twopass) {
942  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
943  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
944  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
945  }
946  }
947 #endif
948 
949  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
950  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
951  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
952 
953  ctx->rc &= ~RC_MODE_DEPRECATED;
954  }
955 
956 #ifdef NVENC_HAVE_LDKFS
957  if (ctx->ldkfs)
958  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
959 #endif
960 
961  if (ctx->flags & NVENC_LOSSLESS) {
962  set_lossless(avctx);
963  } else if (ctx->rc >= 0) {
965  } else {
966  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
967  set_vbr(avctx);
968  }
969 
970  if (avctx->rc_buffer_size > 0) {
971  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
972  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
973  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
974  }
975 
976  if (ctx->aq) {
977  ctx->encode_config.rcParams.enableAQ = 1;
978  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
979  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
980  }
981 
982  if (ctx->temporal_aq) {
983  ctx->encode_config.rcParams.enableTemporalAQ = 1;
984  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
985  }
986 
987  if (ctx->rc_lookahead > 0) {
988  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
989  ctx->encode_config.frameIntervalP - 4;
990 
991  if (lkd_bound < 0) {
992  av_log(avctx, AV_LOG_WARNING,
993  "Lookahead not enabled. Increase buffer delay (-delay).\n");
994  } else {
995  ctx->encode_config.rcParams.enableLookahead = 1;
996  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
997  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
998  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
999  av_log(avctx, AV_LOG_VERBOSE,
1000  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1001  ctx->encode_config.rcParams.lookaheadDepth,
1002  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1003  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1004  }
1005  }
1006 
1007  if (ctx->strict_gop) {
1008  ctx->encode_config.rcParams.strictGOPTarget = 1;
1009  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1010  }
1011 
1012  if (ctx->nonref_p)
1013  ctx->encode_config.rcParams.enableNonRefP = 1;
1014 
1015  if (ctx->zerolatency)
1016  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1017 
1018  if (ctx->quality) {
1019  //convert from float to fixed point 8.8
1020  int tmp_quality = (int)(ctx->quality * 256.0f);
1021  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1022  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1023 
1024  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1025 
1026  //CQ mode shall discard avg bitrate & honor max bitrate;
1027  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1028  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1029  }
1030 }
1031 
1033 {
1034  NvencContext *ctx = avctx->priv_data;
1035  NV_ENC_CONFIG *cc = &ctx->encode_config;
1036  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1037  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1038 
1039  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1040  vui->colourPrimaries = avctx->color_primaries;
1041  vui->transferCharacteristics = avctx->color_trc;
1042  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1044 
1045  vui->colourDescriptionPresentFlag =
1046  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1047 
1048  vui->videoSignalTypePresentFlag =
1049  (vui->colourDescriptionPresentFlag
1050  || vui->videoFormat != 5
1051  || vui->videoFullRangeFlag != 0);
1052 
1053  h264->sliceMode = 3;
1054  h264->sliceModeData = 1;
1055 
1056  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1057  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1058  h264->outputAUD = ctx->aud;
1059 
1060  if (ctx->dpb_size >= 0) {
1061  /* 0 means "let the hardware decide" */
1062  h264->maxNumRefFrames = ctx->dpb_size;
1063  }
1064  if (avctx->gop_size >= 0) {
1065  h264->idrPeriod = cc->gopLength;
1066  }
1067 
1068  if (IS_CBR(cc->rcParams.rateControlMode)) {
1069  h264->outputBufferingPeriodSEI = 1;
1070  }
1071 
1072  h264->outputPictureTimingSEI = 1;
1073 
1074  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1075  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1076  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1077  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1078  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1079  }
1080 
1081  if (ctx->flags & NVENC_LOSSLESS) {
1082  h264->qpPrimeYZeroTransformBypassFlag = 1;
1083  } else {
1084  switch(ctx->profile) {
1086  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1088  break;
1090  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1091  avctx->profile = FF_PROFILE_H264_MAIN;
1092  break;
1094  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1095  avctx->profile = FF_PROFILE_H264_HIGH;
1096  break;
1098  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1100  break;
1101  }
1102  }
1103 
1104  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1105  if (IS_YUV444(ctx->data_pix_fmt)) {
1106  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1108  }
1109 
1110  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1111 
1112  h264->level = ctx->level;
1113 
1114  if (ctx->coder >= 0)
1115  h264->entropyCodingMode = ctx->coder;
1116 
1117 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1118  h264->useBFramesAsRef = ctx->b_ref_mode;
1119 #endif
1120 
1121 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1122  h264->numRefL0 = avctx->refs;
1123  h264->numRefL1 = avctx->refs;
1124 #endif
1125 
1126  return 0;
1127 }
1128 
1130 {
1131  NvencContext *ctx = avctx->priv_data;
1132  NV_ENC_CONFIG *cc = &ctx->encode_config;
1133  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1134  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1135 
1136  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1137  vui->colourPrimaries = avctx->color_primaries;
1138  vui->transferCharacteristics = avctx->color_trc;
1139  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1141 
1142  vui->colourDescriptionPresentFlag =
1143  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1144 
1145  vui->videoSignalTypePresentFlag =
1146  (vui->colourDescriptionPresentFlag
1147  || vui->videoFormat != 5
1148  || vui->videoFullRangeFlag != 0);
1149 
1150  hevc->sliceMode = 3;
1151  hevc->sliceModeData = 1;
1152 
1153  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1154  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1155  hevc->outputAUD = ctx->aud;
1156 
1157  if (ctx->dpb_size >= 0) {
1158  /* 0 means "let the hardware decide" */
1159  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1160  }
1161  if (avctx->gop_size >= 0) {
1162  hevc->idrPeriod = cc->gopLength;
1163  }
1164 
1165  if (IS_CBR(cc->rcParams.rateControlMode)) {
1166  hevc->outputBufferingPeriodSEI = 1;
1167  }
1168 
1169  hevc->outputPictureTimingSEI = 1;
1170 
1171  switch (ctx->profile) {
1173  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1174  avctx->profile = FF_PROFILE_HEVC_MAIN;
1175  break;
1177  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1179  break;
1181  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1182  avctx->profile = FF_PROFILE_HEVC_REXT;
1183  break;
1184  }
1185 
1186  // force setting profile as main10 if input is 10 bit
1187  if (IS_10BIT(ctx->data_pix_fmt)) {
1188  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1190  }
1191 
1192  // force setting profile as rext if input is yuv444
1193  if (IS_YUV444(ctx->data_pix_fmt)) {
1194  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1195  avctx->profile = FF_PROFILE_HEVC_REXT;
1196  }
1197 
1198  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1199 
1200  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1201 
1202  hevc->level = ctx->level;
1203 
1204  hevc->tier = ctx->tier;
1205 
1206 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1207  hevc->useBFramesAsRef = ctx->b_ref_mode;
1208 #endif
1209 
1210 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1211  hevc->numRefL0 = avctx->refs;
1212  hevc->numRefL1 = avctx->refs;
1213 #endif
1214 
1215  return 0;
1216 }
1217 
1219 {
1220  switch (avctx->codec->id) {
1221  case AV_CODEC_ID_H264:
1222  return nvenc_setup_h264_config(avctx);
1223  case AV_CODEC_ID_HEVC:
1224  return nvenc_setup_hevc_config(avctx);
1225  /* Earlier switch/case will return if unknown codec is passed. */
1226  }
1227 
1228  return 0;
1229 }
1230 
1231 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1232  int sw, sh;
1233 
1234  sw = avctx->width;
1235  sh = avctx->height;
1236 
1237  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1238  sw *= avctx->sample_aspect_ratio.num;
1239  sh *= avctx->sample_aspect_ratio.den;
1240  }
1241 
1242  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1243 }
1244 
1246 {
1247  NvencContext *ctx = avctx->priv_data;
1249  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1250 
1251  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1252  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1253  AVCPBProperties *cpb_props;
1254  int res = 0;
1255  int dw, dh;
1256 
1257  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1258  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1259 
1260  ctx->init_encode_params.encodeHeight = avctx->height;
1261  ctx->init_encode_params.encodeWidth = avctx->width;
1262 
1263  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1264 
1265  nvenc_map_preset(ctx);
1266 
1267  if (ctx->flags & NVENC_DEPRECATED_PRESET)
1268  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
1269 
1270  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1271  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1272 
1273 #ifdef NVENC_HAVE_NEW_PRESETS
1274  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1275 
1276  if (ctx->flags & NVENC_LOWLATENCY)
1277  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1278 
1279  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1280  ctx->init_encode_params.encodeGUID,
1281  ctx->init_encode_params.presetGUID,
1282  ctx->init_encode_params.tuningInfo,
1283  &preset_config);
1284 #else
1285  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1286  ctx->init_encode_params.encodeGUID,
1287  ctx->init_encode_params.presetGUID,
1288  &preset_config);
1289 #endif
1290  if (nv_status != NV_ENC_SUCCESS)
1291  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1292 
1293  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1294 
1295  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1296 
1297  compute_dar(avctx, &dw, &dh);
1298  ctx->init_encode_params.darHeight = dh;
1299  ctx->init_encode_params.darWidth = dw;
1300 
1301  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1302  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1303  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1304  } else {
1305  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1306  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1307  }
1308 
1309  ctx->init_encode_params.enableEncodeAsync = 0;
1310  ctx->init_encode_params.enablePTD = 1;
1311 
1312 #ifdef NVENC_HAVE_NEW_PRESETS
1313  /* If lookahead isn't set from CLI, use value from preset.
1314  * P6 & P7 presets may enable lookahead for better quality.
1315  * */
1316  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1317  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1318 
1319  if (ctx->init_encode_params.tuningInfo == NV_ENC_TUNING_INFO_LOSSLESS)
1320  ctx->flags |= NVENC_LOSSLESS;
1321 #endif
1322 
1323  if (ctx->weighted_pred == 1)
1324  ctx->init_encode_params.enableWeightedPrediction = 1;
1325 
1326  if (ctx->bluray_compat) {
1327  ctx->aud = 1;
1328  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1329  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1330  switch (avctx->codec->id) {
1331  case AV_CODEC_ID_H264:
1332  /* maximum level depends on used resolution */
1333  break;
1334  case AV_CODEC_ID_HEVC:
1335  ctx->level = NV_ENC_LEVEL_HEVC_51;
1336  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1337  break;
1338  }
1339  }
1340 
1341  if (avctx->gop_size > 0) {
1342  if (avctx->max_b_frames >= 0) {
1343  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1344  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1345  }
1346 
1347  ctx->encode_config.gopLength = avctx->gop_size;
1348  } else if (avctx->gop_size == 0) {
1349  ctx->encode_config.frameIntervalP = 0;
1350  ctx->encode_config.gopLength = 1;
1351  }
1352 
1353  nvenc_recalc_surfaces(avctx);
1354 
1355  nvenc_setup_rate_control(avctx);
1356 
1357  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1358  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1359  } else {
1360  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1361  }
1362 
1363  res = nvenc_setup_codec_config(avctx);
1364  if (res)
1365  return res;
1366 
1367  res = nvenc_push_context(avctx);
1368  if (res < 0)
1369  return res;
1370 
1371  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1372  if (nv_status != NV_ENC_SUCCESS) {
1373  nvenc_pop_context(avctx);
1374  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1375  }
1376 
1377 #ifdef NVENC_HAVE_CUSTREAM_PTR
1378  if (ctx->cu_context) {
1379  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1380  if (nv_status != NV_ENC_SUCCESS) {
1381  nvenc_pop_context(avctx);
1382  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1383  }
1384  }
1385 #endif
1386 
1387  res = nvenc_pop_context(avctx);
1388  if (res < 0)
1389  return res;
1390 
1391  if (ctx->encode_config.frameIntervalP > 1)
1392  avctx->has_b_frames = 2;
1393 
1394  if (ctx->encode_config.rcParams.averageBitRate > 0)
1395  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1396 
1397  cpb_props = ff_add_cpb_side_data(avctx);
1398  if (!cpb_props)
1399  return AVERROR(ENOMEM);
1400  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1401  cpb_props->avg_bitrate = avctx->bit_rate;
1402  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1403 
1404  return 0;
1405 }
1406 
1407 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1408 {
1409  switch (pix_fmt) {
1410  case AV_PIX_FMT_YUV420P:
1411  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1412  case AV_PIX_FMT_NV12:
1413  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1414  case AV_PIX_FMT_P010:
1415  case AV_PIX_FMT_P016:
1416  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1417  case AV_PIX_FMT_GBRP:
1418  case AV_PIX_FMT_YUV444P:
1419  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1420  case AV_PIX_FMT_GBRP16:
1421  case AV_PIX_FMT_YUV444P16:
1422  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1423  case AV_PIX_FMT_0RGB32:
1424  return NV_ENC_BUFFER_FORMAT_ARGB;
1425  case AV_PIX_FMT_0BGR32:
1426  return NV_ENC_BUFFER_FORMAT_ABGR;
1427  default:
1428  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1429  }
1430 }
1431 
1432 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1433 {
1434  NvencContext *ctx = avctx->priv_data;
1436  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1437  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1438 
1439  NVENCSTATUS nv_status;
1440  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1441  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1442 
1443  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1444  ctx->surfaces[idx].in_ref = av_frame_alloc();
1445  if (!ctx->surfaces[idx].in_ref)
1446  return AVERROR(ENOMEM);
1447  } else {
1448  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1449 
1451  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1452  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1454  return AVERROR(EINVAL);
1455  }
1456 
1457  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1458  allocSurf.width = avctx->width;
1459  allocSurf.height = avctx->height;
1460  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1461 
1462  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1463  if (nv_status != NV_ENC_SUCCESS) {
1464  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1465  }
1466 
1467  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1468  ctx->surfaces[idx].width = allocSurf.width;
1469  ctx->surfaces[idx].height = allocSurf.height;
1470  }
1471 
1472  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1473  if (nv_status != NV_ENC_SUCCESS) {
1474  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1475  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1476  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1477  av_frame_free(&ctx->surfaces[idx].in_ref);
1478  return err;
1479  }
1480 
1481  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1482 
1483  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1484 
1485  return 0;
1486 }
1487 
1489 {
1490  NvencContext *ctx = avctx->priv_data;
1491  int i, res = 0, res2;
1492 
1493  ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1494  if (!ctx->surfaces)
1495  return AVERROR(ENOMEM);
1496 
1497  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1498  if (!ctx->timestamp_list)
1499  return AVERROR(ENOMEM);
1500 
1502  if (!ctx->unused_surface_queue)
1503  return AVERROR(ENOMEM);
1504 
1506  if (!ctx->output_surface_queue)
1507  return AVERROR(ENOMEM);
1509  if (!ctx->output_surface_ready_queue)
1510  return AVERROR(ENOMEM);
1511 
1512  res = nvenc_push_context(avctx);
1513  if (res < 0)
1514  return res;
1515 
1516  for (i = 0; i < ctx->nb_surfaces; i++) {
1517  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1518  goto fail;
1519  }
1520 
1521 fail:
1522  res2 = nvenc_pop_context(avctx);
1523  if (res2 < 0)
1524  return res2;
1525 
1526  return res;
1527 }
1528 
1530 {
1531  NvencContext *ctx = avctx->priv_data;
1533  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1534 
1535  NVENCSTATUS nv_status;
1536  uint32_t outSize = 0;
1537  char tmpHeader[256];
1538  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1539  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1540 
1541  payload.spsppsBuffer = tmpHeader;
1542  payload.inBufferSize = sizeof(tmpHeader);
1543  payload.outSPSPPSPayloadSize = &outSize;
1544 
1545  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1546  if (nv_status != NV_ENC_SUCCESS) {
1547  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1548  }
1549 
1550  avctx->extradata_size = outSize;
1552 
1553  if (!avctx->extradata) {
1554  return AVERROR(ENOMEM);
1555  }
1556 
1557  memcpy(avctx->extradata, tmpHeader, outSize);
1558 
1559  return 0;
1560 }
1561 
1563 {
1564  NvencContext *ctx = avctx->priv_data;
1566  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1567  int i, res;
1568 
1569  /* the encoder has to be flushed before it can be closed */
1570  if (ctx->nvencoder) {
1571  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1572  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1573 
1574  res = nvenc_push_context(avctx);
1575  if (res < 0)
1576  return res;
1577 
1578  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1579  }
1580 
1585 
1586  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1587  for (i = 0; i < ctx->nb_registered_frames; i++) {
1588  if (ctx->registered_frames[i].mapped)
1589  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1590  if (ctx->registered_frames[i].regptr)
1591  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1592  }
1593  ctx->nb_registered_frames = 0;
1594  }
1595 
1596  if (ctx->surfaces) {
1597  for (i = 0; i < ctx->nb_surfaces; ++i) {
1598  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1599  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1600  av_frame_free(&ctx->surfaces[i].in_ref);
1601  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1602  }
1603  }
1604  av_freep(&ctx->surfaces);
1605  ctx->nb_surfaces = 0;
1606 
1607  av_frame_free(&ctx->frame);
1608 
1609  if (ctx->nvencoder) {
1610  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1611 
1612  res = nvenc_pop_context(avctx);
1613  if (res < 0)
1614  return res;
1615  }
1616  ctx->nvencoder = NULL;
1617 
1618  if (ctx->cu_context_internal)
1619  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1620  ctx->cu_context = ctx->cu_context_internal = NULL;
1621 
1622 #if CONFIG_D3D11VA
1623  if (ctx->d3d11_device) {
1624  ID3D11Device_Release(ctx->d3d11_device);
1625  ctx->d3d11_device = NULL;
1626  }
1627 #endif
1628 
1629  nvenc_free_functions(&dl_fn->nvenc_dl);
1630  cuda_free_functions(&dl_fn->cuda_dl);
1631 
1632  dl_fn->nvenc_device_count = 0;
1633 
1634  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1635 
1636  return 0;
1637 }
1638 
1640 {
1641  NvencContext *ctx = avctx->priv_data;
1642  int ret;
1643 
1644  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1645  AVHWFramesContext *frames_ctx;
1646  if (!avctx->hw_frames_ctx) {
1647  av_log(avctx, AV_LOG_ERROR,
1648  "hw_frames_ctx must be set when using GPU frames as input\n");
1649  return AVERROR(EINVAL);
1650  }
1651  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1652  if (frames_ctx->format != avctx->pix_fmt) {
1653  av_log(avctx, AV_LOG_ERROR,
1654  "hw_frames_ctx must match the GPU frame type\n");
1655  return AVERROR(EINVAL);
1656  }
1657  ctx->data_pix_fmt = frames_ctx->sw_format;
1658  } else {
1659  ctx->data_pix_fmt = avctx->pix_fmt;
1660  }
1661 
1662  ctx->frame = av_frame_alloc();
1663  if (!ctx->frame)
1664  return AVERROR(ENOMEM);
1665 
1666  if ((ret = nvenc_load_libraries(avctx)) < 0)
1667  return ret;
1668 
1669  if ((ret = nvenc_setup_device(avctx)) < 0)
1670  return ret;
1671 
1672  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1673  return ret;
1674 
1675  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1676  return ret;
1677 
1678  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1679  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1680  return ret;
1681  }
1682 
1683  return 0;
1684 }
1685 
1687 {
1688  NvencSurface *tmp_surf;
1689 
1690  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1691  // queue empty
1692  return NULL;
1693 
1694  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1695  return tmp_surf;
1696 }
1697 
1698 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1699  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1700 {
1701  int dst_linesize[4] = {
1702  lock_buffer_params->pitch,
1703  lock_buffer_params->pitch,
1704  lock_buffer_params->pitch,
1705  lock_buffer_params->pitch
1706  };
1707  uint8_t *dst_data[4];
1708  int ret;
1709 
1710  if (frame->format == AV_PIX_FMT_YUV420P)
1711  dst_linesize[1] = dst_linesize[2] >>= 1;
1712 
1713  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1714  lock_buffer_params->bufferDataPtr, dst_linesize);
1715  if (ret < 0)
1716  return ret;
1717 
1718  if (frame->format == AV_PIX_FMT_YUV420P)
1719  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1720 
1721  av_image_copy(dst_data, dst_linesize,
1722  (const uint8_t**)frame->data, frame->linesize, frame->format,
1723  avctx->width, avctx->height);
1724 
1725  return 0;
1726 }
1727 
1729 {
1730  NvencContext *ctx = avctx->priv_data;
1732  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1733  NVENCSTATUS nv_status;
1734 
1735  int i, first_round;
1736 
1738  for (first_round = 1; first_round >= 0; first_round--) {
1739  for (i = 0; i < ctx->nb_registered_frames; i++) {
1740  if (!ctx->registered_frames[i].mapped) {
1741  if (ctx->registered_frames[i].regptr) {
1742  if (first_round)
1743  continue;
1744  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1745  if (nv_status != NV_ENC_SUCCESS)
1746  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1747  ctx->registered_frames[i].ptr = NULL;
1748  ctx->registered_frames[i].regptr = NULL;
1749  }
1750  return i;
1751  }
1752  }
1753  }
1754  } else {
1755  return ctx->nb_registered_frames++;
1756  }
1757 
1758  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1759  return AVERROR(ENOMEM);
1760 }
1761 
1763 {
1764  NvencContext *ctx = avctx->priv_data;
1766  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1767 
1768  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1769  NV_ENC_REGISTER_RESOURCE reg;
1770  int i, idx, ret;
1771 
1772  for (i = 0; i < ctx->nb_registered_frames; i++) {
1773  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1774  return i;
1775  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1776  return i;
1777  }
1778 
1779  idx = nvenc_find_free_reg_resource(avctx);
1780  if (idx < 0)
1781  return idx;
1782 
1783  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1784  reg.width = frames_ctx->width;
1785  reg.height = frames_ctx->height;
1786  reg.pitch = frame->linesize[0];
1787  reg.resourceToRegister = frame->data[0];
1788 
1789  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1790  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1791  }
1792  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1793  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1794  reg.subResourceIndex = (intptr_t)frame->data[1];
1795  }
1796 
1797  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1798  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1799  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1800  av_get_pix_fmt_name(frames_ctx->sw_format));
1801  return AVERROR(EINVAL);
1802  }
1803 
1804  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1805  if (ret != NV_ENC_SUCCESS) {
1806  nvenc_print_error(avctx, ret, "Error registering an input resource");
1807  return AVERROR_UNKNOWN;
1808  }
1809 
1810  ctx->registered_frames[idx].ptr = frame->data[0];
1811  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1812  ctx->registered_frames[idx].regptr = reg.registeredResource;
1813  return idx;
1814 }
1815 
1817  NvencSurface *nvenc_frame)
1818 {
1819  NvencContext *ctx = avctx->priv_data;
1821  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1822 
1823  int res;
1824  NVENCSTATUS nv_status;
1825 
1826  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1827  int reg_idx = nvenc_register_frame(avctx, frame);
1828  if (reg_idx < 0) {
1829  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1830  return reg_idx;
1831  }
1832 
1833  res = av_frame_ref(nvenc_frame->in_ref, frame);
1834  if (res < 0)
1835  return res;
1836 
1837  if (!ctx->registered_frames[reg_idx].mapped) {
1838  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1839  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1840  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1841  if (nv_status != NV_ENC_SUCCESS) {
1842  av_frame_unref(nvenc_frame->in_ref);
1843  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1844  }
1845  }
1846 
1847  ctx->registered_frames[reg_idx].mapped += 1;
1848 
1849  nvenc_frame->reg_idx = reg_idx;
1850  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1851  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1852  nvenc_frame->pitch = frame->linesize[0];
1853 
1854  return 0;
1855  } else {
1856  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1857 
1858  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1859  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1860 
1861  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1862  if (nv_status != NV_ENC_SUCCESS) {
1863  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1864  }
1865 
1866  nvenc_frame->pitch = lockBufferParams.pitch;
1867  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1868 
1869  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1870  if (nv_status != NV_ENC_SUCCESS) {
1871  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1872  }
1873 
1874  return res;
1875  }
1876 }
1877 
1879  NV_ENC_PIC_PARAMS *params,
1880  NV_ENC_SEI_PAYLOAD *sei_data,
1881  int sei_count)
1882 {
1883  NvencContext *ctx = avctx->priv_data;
1884 
1885  switch (avctx->codec->id) {
1886  case AV_CODEC_ID_H264:
1887  params->codecPicParams.h264PicParams.sliceMode =
1888  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1889  params->codecPicParams.h264PicParams.sliceModeData =
1890  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1891  if (sei_count > 0) {
1892  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1893  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
1894  }
1895 
1896  break;
1897  case AV_CODEC_ID_HEVC:
1898  params->codecPicParams.hevcPicParams.sliceMode =
1899  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1900  params->codecPicParams.hevcPicParams.sliceModeData =
1901  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1902  if (sei_count > 0) {
1903  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1904  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
1905  }
1906 
1907  break;
1908  }
1909 }
1910 
1911 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1912 {
1913  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
1914 }
1915 
1916 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1917 {
1918  int64_t timestamp = AV_NOPTS_VALUE;
1919  if (av_fifo_size(queue) > 0)
1920  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
1921 
1922  return timestamp;
1923 }
1924 
1926  NV_ENC_LOCK_BITSTREAM *params,
1927  AVPacket *pkt)
1928 {
1929  NvencContext *ctx = avctx->priv_data;
1930 
1931  pkt->pts = params->outputTimeStamp;
1933 
1934  pkt->dts -= FFMAX(ctx->encode_config.frameIntervalP - 1, 0) * FFMAX(avctx->ticks_per_frame, 1);
1935 
1936  return 0;
1937 }
1938 
1940 {
1941  NvencContext *ctx = avctx->priv_data;
1943  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1944 
1945  uint32_t slice_mode_data;
1946  uint32_t *slice_offsets = NULL;
1947  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1948  NVENCSTATUS nv_status;
1949  int res = 0;
1950 
1951  enum AVPictureType pict_type;
1952 
1953  switch (avctx->codec->id) {
1954  case AV_CODEC_ID_H264:
1955  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1956  break;
1957  case AV_CODEC_ID_H265:
1958  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1959  break;
1960  default:
1961  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1962  res = AVERROR(EINVAL);
1963  goto error;
1964  }
1965  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1966 
1967  if (!slice_offsets) {
1968  res = AVERROR(ENOMEM);
1969  goto error;
1970  }
1971 
1972  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1973 
1974  lock_params.doNotWait = 0;
1975  lock_params.outputBitstream = tmpoutsurf->output_surface;
1976  lock_params.sliceOffsets = slice_offsets;
1977 
1978  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1979  if (nv_status != NV_ENC_SUCCESS) {
1980  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1981  goto error;
1982  }
1983 
1984  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
1985 
1986  if (res < 0) {
1987  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1988  goto error;
1989  }
1990 
1991  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1992 
1993  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1994  if (nv_status != NV_ENC_SUCCESS) {
1995  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1996  goto error;
1997  }
1998 
1999 
2000  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2001  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2002  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2003  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2004  if (nv_status != NV_ENC_SUCCESS) {
2005  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2006  goto error;
2007  }
2008  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2009  res = AVERROR_BUG;
2010  goto error;
2011  }
2012 
2013  av_frame_unref(tmpoutsurf->in_ref);
2014 
2015  tmpoutsurf->input_surface = NULL;
2016  }
2017 
2018  switch (lock_params.pictureType) {
2019  case NV_ENC_PIC_TYPE_IDR:
2020  pkt->flags |= AV_PKT_FLAG_KEY;
2021  case NV_ENC_PIC_TYPE_I:
2022  pict_type = AV_PICTURE_TYPE_I;
2023  break;
2024  case NV_ENC_PIC_TYPE_P:
2025  pict_type = AV_PICTURE_TYPE_P;
2026  break;
2027  case NV_ENC_PIC_TYPE_B:
2028  pict_type = AV_PICTURE_TYPE_B;
2029  break;
2030  case NV_ENC_PIC_TYPE_BI:
2031  pict_type = AV_PICTURE_TYPE_BI;
2032  break;
2033  default:
2034  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2035  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2036  res = AVERROR_EXTERNAL;
2037  goto error;
2038  }
2039 
2040 #if FF_API_CODED_FRAME
2042  avctx->coded_frame->pict_type = pict_type;
2044 #endif
2045 
2047  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2048 
2049  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2050  if (res < 0)
2051  goto error2;
2052 
2053  av_free(slice_offsets);
2054 
2055  return 0;
2056 
2057 error:
2059 
2060 error2:
2061  av_free(slice_offsets);
2062 
2063  return res;
2064 }
2065 
2066 static int output_ready(AVCodecContext *avctx, int flush)
2067 {
2068  NvencContext *ctx = avctx->priv_data;
2069  int nb_ready, nb_pending;
2070 
2071  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
2072  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
2073  if (flush)
2074  return nb_ready > 0;
2075  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2076 }
2077 
2078 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2079 {
2080  NvencContext *ctx = avctx->priv_data;
2081  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2082  NVENCSTATUS ret;
2083 
2084  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2085  int needs_reconfig = 0;
2086  int needs_encode_config = 0;
2087  int reconfig_bitrate = 0, reconfig_dar = 0;
2088  int dw, dh;
2089 
2090  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2091  params.reInitEncodeParams = ctx->init_encode_params;
2092 
2093  compute_dar(avctx, &dw, &dh);
2094  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2095  av_log(avctx, AV_LOG_VERBOSE,
2096  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2097  ctx->init_encode_params.darWidth,
2098  ctx->init_encode_params.darHeight, dw, dh);
2099 
2100  params.reInitEncodeParams.darHeight = dh;
2101  params.reInitEncodeParams.darWidth = dw;
2102 
2103  needs_reconfig = 1;
2104  reconfig_dar = 1;
2105  }
2106 
2107  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2108  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2109  av_log(avctx, AV_LOG_VERBOSE,
2110  "avg bitrate change: %d -> %d\n",
2111  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2112  (uint32_t)avctx->bit_rate);
2113 
2114  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2115  reconfig_bitrate = 1;
2116  }
2117 
2118  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2119  av_log(avctx, AV_LOG_VERBOSE,
2120  "max bitrate change: %d -> %d\n",
2121  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2122  (uint32_t)avctx->rc_max_rate);
2123 
2124  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2125  reconfig_bitrate = 1;
2126  }
2127 
2128  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2129  av_log(avctx, AV_LOG_VERBOSE,
2130  "vbv buffer size change: %d -> %d\n",
2131  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2132  avctx->rc_buffer_size);
2133 
2134  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2135  reconfig_bitrate = 1;
2136  }
2137 
2138  if (reconfig_bitrate) {
2139  params.resetEncoder = 1;
2140  params.forceIDR = 1;
2141 
2142  needs_encode_config = 1;
2143  needs_reconfig = 1;
2144  }
2145  }
2146 
2147  if (!needs_encode_config)
2148  params.reInitEncodeParams.encodeConfig = NULL;
2149 
2150  if (needs_reconfig) {
2151  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2152  if (ret != NV_ENC_SUCCESS) {
2153  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2154  } else {
2155  if (reconfig_dar) {
2156  ctx->init_encode_params.darHeight = dh;
2157  ctx->init_encode_params.darWidth = dw;
2158  }
2159 
2160  if (reconfig_bitrate) {
2161  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2162  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2163  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2164  }
2165 
2166  }
2167  }
2168 }
2169 
2170 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2171 {
2172  NVENCSTATUS nv_status;
2173  NvencSurface *tmp_out_surf, *in_surf;
2174  int res, res2;
2175  NV_ENC_SEI_PAYLOAD sei_data[8];
2176  int sei_count = 0;
2177  int i;
2178 
2179  NvencContext *ctx = avctx->priv_data;
2181  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2182 
2183  NV_ENC_PIC_PARAMS pic_params = { 0 };
2184  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2185 
2186  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2187  return AVERROR(EINVAL);
2188 
2189  if (frame && frame->buf[0]) {
2190  in_surf = get_free_frame(ctx);
2191  if (!in_surf)
2192  return AVERROR(EAGAIN);
2193 
2194  res = nvenc_push_context(avctx);
2195  if (res < 0)
2196  return res;
2197 
2198  reconfig_encoder(avctx, frame);
2199 
2200  res = nvenc_upload_frame(avctx, frame, in_surf);
2201 
2202  res2 = nvenc_pop_context(avctx);
2203  if (res2 < 0)
2204  return res2;
2205 
2206  if (res)
2207  return res;
2208 
2209  pic_params.inputBuffer = in_surf->input_surface;
2210  pic_params.bufferFmt = in_surf->format;
2211  pic_params.inputWidth = in_surf->width;
2212  pic_params.inputHeight = in_surf->height;
2213  pic_params.inputPitch = in_surf->pitch;
2214  pic_params.outputBitstream = in_surf->output_surface;
2215 
2216  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2217  if (frame->top_field_first)
2218  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2219  else
2220  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2221  } else {
2222  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2223  }
2224 
2225  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2226  pic_params.encodePicFlags =
2227  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2228  } else {
2229  pic_params.encodePicFlags = 0;
2230  }
2231 
2232  pic_params.inputTimeStamp = frame->pts;
2233 
2234  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2235  void *a53_data = NULL;
2236  size_t a53_size = 0;
2237 
2238  if (ff_alloc_a53_sei(frame, 0, (void**)&a53_data, &a53_size) < 0) {
2239  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2240  }
2241 
2242  if (a53_data) {
2243  sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2244  sei_data[sei_count].payloadType = 4;
2245  sei_data[sei_count].payload = (uint8_t*)a53_data;
2246  sei_count ++;
2247  }
2248  }
2249 
2251  void *tc_data = NULL;
2252  size_t tc_size = 0;
2253 
2254  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, (void**)&tc_data, &tc_size) < 0) {
2255  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2256  }
2257 
2258  if (tc_data) {
2259  sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2260  sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2261  sei_data[sei_count].payload = (uint8_t*)tc_data;
2262  sei_count ++;
2263  }
2264  }
2265 
2266  nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data, sei_count);
2267  } else {
2268  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2269  }
2270 
2271  res = nvenc_push_context(avctx);
2272  if (res < 0)
2273  return res;
2274 
2275  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2276 
2277  for ( i = 0; i < sei_count; i++)
2278  av_freep(&sei_data[i].payload);
2279 
2280  res = nvenc_pop_context(avctx);
2281  if (res < 0)
2282  return res;
2283 
2284  if (nv_status != NV_ENC_SUCCESS &&
2285  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2286  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2287 
2288  if (frame && frame->buf[0]) {
2289  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2291  }
2292 
2293  /* all the pending buffers are now ready for output */
2294  if (nv_status == NV_ENC_SUCCESS) {
2295  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2296  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2297  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2298  }
2299  }
2300 
2301  return 0;
2302 }
2303 
2305 {
2306  NvencSurface *tmp_out_surf;
2307  int res, res2;
2308 
2309  NvencContext *ctx = avctx->priv_data;
2310 
2311  AVFrame *frame = ctx->frame;
2312 
2313  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2314  return AVERROR(EINVAL);
2315 
2316  if (!frame->buf[0]) {
2317  res = ff_encode_get_frame(avctx, frame);
2318  if (res < 0 && res != AVERROR_EOF)
2319  return res;
2320  }
2321 
2322  res = nvenc_send_frame(avctx, frame);
2323  if (res < 0) {
2324  if (res != AVERROR(EAGAIN))
2325  return res;
2326  } else
2327  av_frame_unref(frame);
2328 
2329  if (output_ready(avctx, avctx->internal->draining)) {
2330  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2331 
2332  res = nvenc_push_context(avctx);
2333  if (res < 0)
2334  return res;
2335 
2336  res = process_output_surface(avctx, pkt, tmp_out_surf);
2337 
2338  res2 = nvenc_pop_context(avctx);
2339  if (res2 < 0)
2340  return res2;
2341 
2342  if (res)
2343  return res;
2344 
2345  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2346  } else if (avctx->internal->draining) {
2347  return AVERROR_EOF;
2348  } else {
2349  return AVERROR(EAGAIN);
2350  }
2351 
2352  return 0;
2353 }
2354 
2356 {
2357  NvencContext *ctx = avctx->priv_data;
2358 
2359  nvenc_send_frame(avctx, NULL);
2361 }
const GUID guid
Definition: nvenc.c:650
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:1899
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
int no_scenecut
Definition: nvenc.h:198
#define NULL
Definition: coverity.c:32
const struct AVCodec * codec
Definition: avcodec.h:545
AVRational framerate
Definition: avcodec.h:2071
BI type.
Definition: avutil.h:280
void * nvencoder
Definition: nvenc.h:184
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:84
int support_dyn_bitrate
Definition: nvenc.h:182
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1562
int twopass
Definition: nvenc.h:192
#define CHECK_CU(x)
Definition: nvenc.c:39
static enum AVPixelFormat pix_fmt
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:83
int height
Definition: nvenc.h:79
This structure describes decoded (raw) audio or video data.
Definition: frame.h:318
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1218
AVFifoBuffer * timestamp_list
Definition: nvenc.h:167
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:820
static void flush(AVCodecContext *avctx)
NvencFunctions * nvenc_dl
Definition: nvenc.h:89
int mapped
Definition: nvenc.h:173
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:321
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:741
AVFrame * in_ref
Definition: nvenc.h:76
#define P1
Definition: cavsdsp.c:39
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
misc image utilities
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:200
int64_t bit_rate
the average bitrate
Definition: avcodec.h:586
#define RC_MODE_DEPRECATED
Definition: nvenc.h:41
Memory handling functions.
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:543
AVBufferRef * buf[AV_NUM_DATA_POINTERS]
AVBuffer references backing the data for this frame.
Definition: frame.h:509
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2170
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:99
const char * desc
Definition: nvenc.c:90
int max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: avcodec.h:459
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:796
int forced_idr
Definition: nvenc.h:199
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:1171
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:64
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:168
int num
Numerator.
Definition: rational.h:59
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:168
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:654
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1488
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:91
NvencDynLoadFunctions nvenc_dload_funcs
Definition: nvenc.h:150
ID3D11Device * d3d11_device
Definition: nvenc.h:157
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel...
Definition: avcodec.h:915
int width
The allocated dimensions of the frames in this pool.
Definition: hwcontext.h:229
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:746
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:209
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2304
#define FF_ARRAY_ELEMS(a)
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:237
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:848
int init_qp_b
Definition: nvenc.h:210
AVPacket * pkt
Definition: movenc.c:59
static void error(const char *err)
#define PRESET(name,...)
Definition: nvenc.c:657
int profile
profile
Definition: avcodec.h:1858
int preset
Definition: nvenc.h:186
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB)
Definition: pixfmt.h:513
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:848
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:817
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1686
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:887
static const Preset presets[]
int pitch
Definition: nvenc.h:80
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:122
int nvenc_device_count
Definition: nvenc.h:92
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:1909
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:75
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented...
Definition: avcodec.h:659
NVENCSTATUS nverr
Definition: nvenc.c:88
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:739
AVBufferRef * hw_frames_ctx
For hwaccel-format frames, this should be a reference to the AVHWFramesContext describing the frame...
Definition: frame.h:657
int aq
Definition: nvenc.h:197
#define AV_PIX_FMT_P016
Definition: pixfmt.h:449
int b_ref_mode
Definition: nvenc.h:215
#define AV_PIX_FMT_P010
Definition: pixfmt.h:448
CUcontext cu_context
Definition: nvenc.h:154
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:1897
static const struct @102 nvenc_errors[]
#define DEFAULT
Definition: avdct.c:28
struct NvencContext::@108 registered_frames[MAX_REGISTERED_FRAMES]
uint8_t
AVFifoBuffer * unused_surface_queue
Definition: nvenc.h:164
#define av_cold
Definition: attributes.h:88
#define av_malloc(s)
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:191
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:46
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:805
int init_qp_p
Definition: nvenc.h:209
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:260
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:1946
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:444
int64_t pts
Presentation timestamp in time_base units (time when frame should be shown to user).
Definition: frame.h:411
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:637
float quality
Definition: nvenc.h:206
NV_ENC_INITIALIZE_PARAMS init_encode_params
Definition: nvenc.h:152
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:92
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1432
#define height
#define av_clip
Definition: common.h:122
ID3D11Device * device
Device used for texture creation and access.
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:40
uint8_t * data
Definition: packet.h:369
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1529
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
#define AVERROR_EOF
End of file.
Definition: error.h:55
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:210
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:351
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:412
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1762
int buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: avcodec.h:486
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:96
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:25
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:1947
AVFifoBuffer * output_surface_ready_queue
Definition: nvenc.h:166
#define av_log(a,...)
CUcontext cu_context_internal
Definition: nvenc.h:155
An API-specific header for AV_HWDEVICE_TYPE_CUDA.
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:410
int ptr_index
Definition: nvenc.h:171
#define P3
int async_depth
Definition: nvenc.h:195
enum AVCodecID id
Definition: codec.h:211
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:272
void * ptr
Definition: nvenc.h:170
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:194
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:826
int coder
Definition: nvenc.h:214
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:1911
int rc
Definition: nvenc.h:190
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
int nb_registered_frames
Definition: nvenc.h:176
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:204
int qmax
maximum quantizer
Definition: avcodec.h:1387
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:120
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:213
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:1901
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:616
GLenum GLint * params
Definition: opengl_enc.c:113
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
simple assert() macros that are a bit more flexible than ISO C assert().
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:377
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:841
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:79
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1129
GLsizei count
Definition: opengl_enc.c:108
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1407
#define FFMAX(a, b)
Definition: common.h:103
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:708
#define fail()
Definition: checkasm.h:133
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:422
int level
Definition: nvenc.h:188
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:375
int bluray_compat
Definition: nvenc.h:208
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1401
int aq_strength
Definition: nvenc.h:205
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:298
int refs
number of reference frames
Definition: avcodec.h:1124
int flags
Definition: nvenc.h:194
enum AVPictureType pict_type
Picture type of the frame.
Definition: frame.h:401
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:418
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1816
NV_ENC_REGISTERED_PTR regptr
Definition: nvenc.h:172
#define FFMIN(a, b)
Definition: common.h:105
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1245
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:51
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:149
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1639
#define width
Definition: af_afade.c:54
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:1939
int width
picture width / height.
Definition: avcodec.h:709
int dpb_size
Definition: nvenc.h:218
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames...
Definition: avcodec.h:2218
#define NVENC_CAP
Definition: nvenc.c:41
AVFormatContext * ctx
Definition: movenc.c:48
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:1150
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1698
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:79
int dummy
Definition: motion.c:64
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:668
int profile
Definition: nvenc.h:187
AVFifoBuffer * output_surface_queue
Definition: nvenc.h:165
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:155
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:56
HW acceleration through CUDA.
Definition: pixfmt.h:235
#define AV_CODEC_ID_H265
Definition: codec_id.h:224
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1032
int tuning_info
Definition: nvenc.h:219
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:180
Full range content.
Definition: pixfmt.h:586
if(ret)
CudaFunctions * cuda_dl
Definition: nvenc.h:88
enum AVPixelFormat data_pix_fmt
Definition: nvenc.h:180
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:74
int format
format of the frame, -1 if unknown or unset Values correspond to enum AVPixelFormat for video frames...
Definition: frame.h:391
This structure describes the bitrate properties of an encoded bitstream.
Definition: avcodec.h:453
#define AV_LOG_INFO
Standard information.
Definition: log.h:205
NV_ENC_CONFIG encode_config
Definition: nvenc.h:153
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:249
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:146
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:77
int linesize[AV_NUM_DATA_POINTERS]
For video, size in bytes of each picture line.
Definition: frame.h:349
int strict_gop
Definition: nvenc.h:204
int temporal_aq
Definition: nvenc.h:201
main external API structure.
Definition: avcodec.h:536
uint8_t * data
The data buffer.
Definition: buffer.h:92
int qmin
minimum quantizer
Definition: avcodec.h:1380
#define BD
int init_qp_i
Definition: nvenc.h:211
int extradata_size
Definition: avcodec.h:638
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:50
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:82
This struct is allocated as AVHWDeviceContext.hwctx.
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:334
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:1164
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:1157
int width
Definition: nvenc.h:78
int multipass
Definition: nvenc.h:220
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:124
#define IS_CBR(rc)
Definition: nvenc.c:42
AVPictureType
Definition: avutil.h:272
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2355
int flags
Definition: nvenc.c:651
int nonref_p
Definition: nvenc.h:203
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:818
int cbr
Definition: nvenc.h:191
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1728
int averr
Definition: nvenc.c:89
int s12m_tc
Definition: nvenc.h:217
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:554
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:602
#define flags(name, subs,...)
Definition: cbs_av1.c:561
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1231
uint8_t * data[AV_NUM_DATA_POINTERS]
pointer to the picture/channel planes.
Definition: frame.h:332
int reg_idx
Definition: nvenc.h:77
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:1878
uint8_t level
Definition: svq3.c:204
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:329
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:313
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:731
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info...
Definition: utils.c:1067
int
int b_adapt
Definition: nvenc.h:200
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:1916
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:83
common internal api header.
int weighted_pred
Definition: nvenc.h:213
int rc_lookahead
Definition: nvenc.h:196
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2066
Bi-dir predicted.
Definition: avutil.h:276
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
attribute_deprecated AVFrame * coded_frame
the picture in the bitstream
Definition: avcodec.h:1764
NvencSurface * surfaces
Definition: nvenc.h:162
int den
Denominator.
Definition: rational.h:60
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:71
NV_ENC_MAP_INPUT_RESOURCE in_map
Definition: nvenc.h:174
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1027
#define AV_INPUT_BUFFER_PADDING_SIZE
Required number of additionally allocated bytes at the end of the input bitstream for decoding...
Definition: avcodec.h:215
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2078
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:1949
void * priv_data
Definition: avcodec.h:563
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:1925
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:664
#define av_free(p)
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:84
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:43
int top_field_first
If the content is interlaced, is top field displayed first.
Definition: frame.h:470
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:205
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:468
int avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: avcodec.h:477
CUstream cu_stream
Definition: nvenc.h:156
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:571
#define P2
Definition: cavsdsp.c:38
int device
Definition: nvenc.h:193
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed...
Definition: packet.h:368
This struct is allocated as AVHWDeviceContext.hwctx.
int nb_surfaces
Definition: nvenc.h:161
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:135
int aud
Definition: nvenc.h:207
int cqp
Definition: nvenc.h:212
#define av_freep(p)
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:803
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:63
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:188
#define FFSWAP(type, a, b)
Definition: common.h:108
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2489
int tier
Definition: nvenc.h:189
int ldkfs
Definition: nvenc.h:221
int a53_cc
Definition: nvenc.h:216
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied...
Definition: fifo.c:71
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later.That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another.Frame references ownership and permissions
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:2270
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:222
AVFrame * frame
Definition: nvenc.h:159
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:57
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
static double val(void *priv, double ch)
Definition: aeval.c:76
This structure stores compressed data.
Definition: packet.h:346
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:82
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:362
for(j=16;j >0;--j)
int i
Definition: input.c:407
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
Predicted.
Definition: avutil.h:275
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:659
int zerolatency
Definition: nvenc.h:202
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:376
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1416
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:160
void * av_mallocz_array(size_t nmemb, size_t size)
Definition: mem.c:190
const char * name
Definition: opengl_enc.c:102